MECHANISM FOR THE OPERATION OF AN LED MODULE

Method for seismic interpretation using seismic texture attributes

Method for generating a new family of seismic attributes sensitive to seismic texture that can be used for classification and grouping of seismic data into seismically similar regions. A 2D or 3D data analysis window size is selected (23), and for each of multiple positions (25) of the analysis window in the seismic data volume, the data within the window are transformed to a wavenumber domain spectrum (26). At least one attribute of the seismic data is then defined based on one or more spectral properties, and the attribute is computed (28) for each window, generating a multidimensional spectral attribute data volume (29). The attribute data volume can be used for inferring hydrocarbon potential, preferably after classifying the data volume cells based on the computed attribute, partitioning the cells into regions based on the classification, and prioritizing of the regions within a classification.

ENCAPSULATION OF PIGMENTS WITH POLYMER LATEX PREPARED BY MINI-EMULSION POLYMERIZATION

A process for preparing a polymer latex comprising encapsulated pigment particles, said process comprising the steps of: a) Providing a first dispersion comprising water, at least one surfactant and at least one particulate, inorganic pigment of which the particles have a mean diameter of from 200 nm to 10 µm; b) Providing a second dispersion comprising water, a dispersant, a hydrophobe and at least two polymerizable monomers, of which monomers at least one is an acrylic monomer; c) Independently homogenizing the first and / or second dispersions; d) Mixing said first and second dispersions and homogenizing said mixture until the particles of pigment are encapsulated by monomer droplets; and e) Initiating polymerization of the monomers.In an embodiment, the at least two polymerizable monomers comprise at least one acrylic monomer and at least one monomer being vinyl acetate, styrene or another non-acrylic monomer comprising a polymerizable double bond.

METHOD FOR SEISMIC INTERPRETATION USING SEISMIC TEXTURE ATTRIBUTES

Method for generating a new family of seismic attributes sensitive to seismic texture that can be used for classification and grouping of seismic data into seismically similar regions. A 2D or 3D data analysis window size is selected (23), and for each of multiple positions (25) of the analysis window in the seismic data volume, the data within the window are transformed to a wavenumber domain spectrum (26). At least one at-tribute of the seismic data is then defined based on one or more spectral properties, and the attribute is computed (28) for each window, generating a multidimensional spectral attribute data volume (29). The attribute data volume can be used for inferring hydrocarbon potential, preferably after classifying the data volume cells based on the computed attribute, parti-tioning the cells into regions based on the classification, and prioritizing of the regions within a classification.

SYSTEMS AND METHODS FOR DETERMINING GEOLOGIC PROPERTIES USING ACOUSTIC ANALYSIS

Systems and methods which determine geologic properties using acoustic analysis are shown. Acoustic signals are collected during processing (e.g., crushing, shearing, striking, compressing, etc.) of geologic media, such as rock samples, for determining geologic properties according to embodiments. The acoustic signals collected may include frequency information, amplitude information, time information, etc. which may be utilized in determining geologic properties, such as geologic media properties (e.g., mineralogy, porosity, permeability, sealing capacity, fracability, compressive strength, compressibility, Poisson's Ratio, Youngs Modulus, Bulk Modulus, Shear Modulus), geologic structure properties (e.g., lithology, seal quality, reservoir quality), geologic acoustic properties (e.g., acoustic logging effectiveness, acoustic response, natural or harmonic frequencies, etc.). Embodiments may be used to provide determination of geologic properties from a variety of geologic media samples, ...

Dry type air reactor monitoring device based on SVM

The invention discloses a dry type air reactor monitoring device based on SVM. The dry type air reactor monitoring device based on the SVM comprises envelopes (1), guide pulling bars (2) inserted on the envelopes (1), a support (3) of a supporting structure and ventilating ducts (4) located below the envelopes (1), optical fibers (11) are arranged in each envelope (1), the bottom portions and the top portions of the optical fibers (11) are respectively provided with a substrate (5), a substrate (5) is also arranged on the middle symmetrical positions of the optical fibers (11), an optical fiber coupler (7) is connected with the optical fibers (11), an ASE broadband light source (6) is connected with the optical fiber coupler (7), the optical fiber coupler (7) is connected with an optical fiber Bragg grating demodulation device (8) through wire jumpers, and the optical fiber Bragg grating demodulation device (8) is connected with an industrial personal computer (10) through an RS485 (9).

Flexible inchworm-like robot

The invention provides a flexible inchworm-like robot, comprising two rotating capture mechanism and a waist bending and stretching mechanism; each rotating capture mechanism comprises a capture mechanism module an a rotating mechanism module; the capture mechanism module comprises a capture mechanism mounting body and a capture mechanism rotating motor; the rotating mechanism module comprises a motor mounting frame and a rotating body motor; the waist bending and stretching mechanism comprises two rope brake motor mounting frames, at least nine waist rotating plates, two ropes, two rope winding wheels and two rope brake motors; the flexible inchworm-like robot is capable of bending and stretching with large amplitude as well as turning with a large angle, has strong adaptability to intersected and complex pipelines, can be widely applied to detection and maintenance of complex pipelines in industry and life and has great practical value.

Intelligent defect detection method for lithium iron phosphate battery charger

The invention relates to the technical field of image data processing, and provides an intelligent defect detection method for a lithium iron phosphate battery charger, which comprises the following steps: acquiring a thermal imaging image of the lithium iron phosphate battery charger to obtain a thermal image sequence; according to the local temperature value distribution of each pixel point in each frame of heat map, obtaining a fluctuation surrounding coefficient and a temperature interpolation, obtaining a first similarity of any two adjacent frames of heat maps, and obtaining a target heat map; acquiring a color scale value of each pixel point in the target heat map, dividing the target heat map into a plurality of image blocks, acquiring a defect index of each pixel point according to color scale value distribution in the image blocks, acquiring a defect area according to the defect index, and acquiring a fusion detection map in combination with the target heat map; and obtaining ...

Infrared temperature calibration device for molecular pump

The invention discloses an infrared temperature calibration device for a molecular pump, and the device comprises a detection unit which is attached to the surface of a turbine of the molecular pump, and is used for detecting the temperature of the surface of the turbine, converting the temperature into an electric signal, and outputting the electric signal; the floating positioning unit is used for elastically abutting against the detection unit and keeping the detection unit on the surface of the turbine, and the floating positioning unit comprises a fixing assembly and a floating assembly; the fixing assembly is fixedly installed on the molecular pump. The detection unit is movably installed on the end portion of the fixing assembly through the floating assembly, and the floating assembly is suitable for applying elastic bias pressure tending to the turbine direction to the detection unit so that the detection unit can elastically abut against the surface of the turbine. According to ...

Underwater concrete apparent laser line three-dimensional scanning measurement method

The invention discloses an underwater concrete apparent laser ray three-dimensional scanning measurement method, which comprises the following steps: S1, carrying out laser ray plane calibration on laser ray scanning imaging equipment in a clear water replacement device, and constructing a laser plane equation; s2, establishing a light ray tracing model of light rays on different medium surfaces, and further establishing a multi-medium refraction model between a real image point and a camera imaging point; s3, fusing the multi-medium refraction model with the camera imaging model to obtain a normalized model of underwater imaging; and S4, converting the obtained underwater concrete apparent laser line image into a corresponding laser line image in the air by using the normalized model and the laser plane equation to realize underwater concrete apparent laser line three-dimensional scanning measurement. According to the method, the influence of a muddy water environment on laser line scanning ...

Wheat seedling growth cabin spraying controller and control method

The invention relates to the technical field of wheat seedling planting, and discloses a wheat seedling growth cabin spraying controller and a control method.The wheat seedling growth cabin spraying controller comprises a wheat seedling growth cabin and a planting groove, a spraying mechanism is arranged at the top of the wheat seedling growth cabin, a ventilation mechanism is arranged in the wheat seedling growth cabin, and a control mechanism is arranged outside the wheat seedling growth cabin; the spraying mechanism comprises a water tank, the water tank is fixedly mounted at the top of the wheat seedling growth cabin, and a water pump is fixedly mounted at the top of the wheat seedling growth cabin. According to the wheat seedling growth cabin spraying controller and the control method, by arranging the spraying mechanism and the control mechanism, manual watering is replaced, the watering time and the watering quantity of each time can be controlled, and by controlling the temperature ...

Wheat seedling growth cabin lighting controller and control method

The invention relates to a wheat seedling growth cabin lighting controller which comprises a protection box body, a controller body is arranged on the inner side of the protection box body, a heat dissipation installation mechanism is arranged on the protection box body, and a light module is arranged on the protection box body. The controller body comprises a microcontroller, a short circuit protection module, a real-time clock, a sensor, an angle adjusting module, a monitoring module and a signal transmission module, the heat dissipation mounting mechanism comprises two fixing cylinders fixedly connected with the controller body. According to the daylighting controller for the wheat seedling growth cabin and the control method, daylighting control and angle illumination control are carried out when seedlings are cultivated in the growth cabin through the arranged controller body, cultivation work of the seedlings in the growth cabin is more convenient, no corresponding daylighting controller ...

Approach to minimization of strain loss in strained fin field effect transistors

A method of fabricating a vertical fin field effect transistor with a strained channel, including, forming a strained vertical fin on a substrate, forming a plurality of gate structures on the strained vertical fin, forming an interlevel dielectric on the strained vertical fin, forming a source/drain contact on the vertical fin adjacent to each of the plurality of gate structures, and selectively removing one or more of the source/drain contacts to form a trench adjacent to a gate structure.

Formation of semiconductor devices with dual trench isolations

A method for fabricating a semiconductor device with dual trench isolations includes forming a deep trench located between a first region associated with a first array of transistors and a second region associated with a second array of transistors, forming a first shallow trench located between transistors of the first array and a second shallow trench located between transistors of the second array, and forming, by a single dielectric material fill process, a deep trench isolation (DTI) region in the deep trench, a first shallow trench isolation (STI) region in the first shallow trench, and a second STI region in the second shallow trench.

ANTENNA MODULE AND MOBILE TERMINAL

The present disclosure provides an antenna module and a mobile terminal. The antenna module includes a tuning switch and a matching circuit. The antenna module operates in one of a plurality of operating states by controlling the tuning switch, the antenna module operates in different LTE bands in different ones of the plurality of operating states, and in any of the plurality of operating states, the antenna module operates in a GPS band simultaneously. The antenna module provided by the present disclosure integrates an LTE antenna and a GPS antenna that have different bands into one antenna through the design of a matching circuit, and supports the low frequency band, the medium frequency band and the high frequency band of LTE and the frequency bands of the GPS antenna.

Cold spray chromium coating for nuclear fuel rods

A method is provided for coating the substrate of a component, such as a zirconium alloy cladding tube, for use in a water cooled nuclear reactor under normal operating conditions and under high temperature oxidation conditions. The method includes heating a pressurized carrier gas to a temperature between 200° C. and 1200° C., adding chromium or chromium-based alloy particles having an average diameter of 20 microns or less to the heated carrier gas, and spraying the carrier gas and particles onto the substrate at a velocity, preferably from 800 to 4000 ft./sec. (about 243.84 to 1219.20 meters/sec.), to form a chromium and/or chromium-based alloy coating on the substrate to a desired thickness.

Phase drift compensation for sampled signals

Methods for processing a signal of interest in an electrical power system are provided, as well as systems and computer program products for carrying out the methods. The methods include obtaining a representative window of data points from the signal of interest; obtaining a window of interest containing data points from the signal of interest; and comparing a phase drift compensated window to the representative window, wherein the compensated window is calculated in accordance with the window of interest and a phase drift that is present in the window of interest relative to the representative window.

Stacked silicon nanotubes

Embodiments of the present invention are directed to a method that incorporates a germanium pull-out process to form semiconductor structures having stacked silicon nanotubes. In a non-limiting embodiment of the invention, a sacrificial layer is formed over a substrate. The sacrificial layer includes a first type of semiconductor material. A pull-out layer is formed on the sacrificial layer. The first type of semiconductor material from the sacrificial layer is removed to form a silicon-rich layer on a surface of the sacrificial layer. The sacrificial layer can be removed such that the silicon-rich layer defines a silicon nanotube.

PROCEDURE AND CIRCUIT FOR THE CONTROLLING OF THE RIVER OF LIGHT EMITTING DIODES

CURRENT DELIVERY SYSTEM WITH CASCADED DOWNWARD STAGES

SYSTEM AND METHOD FOR MACHINE LEARNING WITH LONG-RANGE DEPENDENCY

A system, electronic device and method for improved neural network training are provided. The improved system is adapted for tracking long range dependence in sequential data during training, and includes bootstrapping a lower bound on the mutual information (MI) over groups of variables (segments or sentences) and subsequently applying the bound to encourage high MI.

Fish source collagen antioxidant peptide beauty mask and preparation method thereof

The invention discloses a fish source collagen antioxidant peptide beauty mask and a preparation method thereof. The fish source collagen antioxidant peptide beauty mask is characterized by comprising the following components in parts by weight: 5-10 parts of fish source collagen antioxidant peptide, 10-15 parts of bletilla striata gelatin, 1-2 parts of procyanidine, 8-10 parts of radix asparagi extract, 5-10 parts of glycerinum, 2-5 parts of jojoba oil, 1-2 parts of vitamin E acetate mixture, 0.2-1.0 part of essence, 1-2 parts of surfactant and 0.15-0.2 part of corrosion remover. The collagen antioxidant peptide extracted from scales or fish bones are modified by TGase (transglutaminase) and compositely crosslinked with the bletilla striata gelatin, so that the tenacity, the ductility, the conglutination and the thermal stability are greatly improved. The fish source collagen antioxidant peptide beauty mask is mainly prepared from macromolecular substances in natural animals and plants ...

Electromagnetic pilot operated valve with internal waterproof structure

An electromagnetic pilot operated valve with an internal waterproof structure comprises an electromagnet. The electromagnet comprises an electromagnet body, an end cover and ejector rods, wherein the electromagnet body comprises a first end face, the end cover is fixedly connected to the first end face of the electromagnet body, a wire connection hole is formed in the first end face of the electromagnet body, the two ejector rods are arranged in the electromagnet body and stretch out from the first end face, two front ejector rod holes corresponding to the two ejector rods and a wire connection cavity corresponding to the wire connection hole are formed in the end cover, a front annular sealing groove is formed in the end cover, the front annular sealing groove surrounds the two front ejector rod holes and the wire connection cavity, and a first sealing element is arranged in the front annular sealing groove.

Macadamia integrifolia branching-after-topping seedling cultivation method

The invention discloses a macadamia integrifolia branching-after-topping seedling cultivation method. The method includes the steps that first, a disease and insect pest-free branch with a robust branch trunk is selected from a macadamia integrifolia mother tree with excellent quality; then, girdling is carried out at the position 15-20 cm away from a branch fork, a liquid medical combination used for promoting root growth is smeared on a girdling opening by a circle, a moist matrix is then attached to the girdling position, the outside of the girdling position is tightly wrapped with a thin film, and the two ends of the girdling position are bundled through ropes; after 25-35 days when branching-after-topping treatment is carried out, a diluted ethephon solution is added into a thin film packet; after three months, root systems are growth gradually at the girdling opening, and after 90-120 days when branching-after-topping treatment is carried out, branch half-shearing treatment is conducted ...

Filmed plate production line

The invention relates to a filmed plate production line which comprises an uncoiling machine, a sewing machine, a flattening machine, a tightening machine I, a front storage rack, a tightening machine II, a front processor, a thermal flashing machine, a coating machine, a moisture drying machine, a cold flashing machine, a tightening machine III, a centering machine, a primary coating machine, a primary coating curing furnace, a PVC (Polyvinyl Chloride) filming guide machine, a PVC filming machine, a fine coating compulsive cooling machine, a wiping centering machine, a tightening machine IV, a protecting film coating machine, a rear storage rack, a tightening machine V and a coiling machine which are densely arranged in sequence. The filmed plate production line is characterized by further comprising a film trimming machine, wherein the film trimming machine is arranged between the protecting film coating machine and the rear storage rack. The filmed plate production line has the advantages ...

SBC-oriented malformation SIP message detection method and system

The invention provides an SBC-oriented malformation SIP message detection method and system, and belongs to the field of core network safety detection. The SBC-oriented malformation SIP message detection method comprises the steps that 101, a malformation SIP message detection module is added for the SBC, and a malformation SIP message database is built; 102, the SBC forwards the received SIP message to the malformation SIP message detection module, and the malformation SIP message detection module detects the SIP message; 103, the malformation SIP message detection module sends a replay message to the SBC according to the detection result; 104, the SBC is in communication with an IMS core network according to the message returned to the malformation SIP message detection module.

DC generator set

The invention provides a DC generator set based on multipath series-parallel non-isolation switch power supply circuit technology; the DC generator set comprises a permanent magnetism generator and a rectifier controller; the permanent magnetism generator comprises three or more phase windings, and a pole number is bigger than two; the rectifier controller comprises a full bridge rectifier circuit, and a non-isolation voltage reduction switch power supply circuit; the full bridge rectifier circuit is used for converting AC current into DC current, and outputting the DC current, wherein the AC current is generated by the permanent magnetism generator; the non-isolation voltage reduction switch power supply circuit is used for carrying out voltage reduction process for the DC current outputted by the full bridge rectifier circuit, thus realizing stable DC output, improving whole generator power generation efficiency, reducing oil consumption, improving output voltage stability, realizing ...

System and method for estimating network security situation based on index logarithm analysis

The invention discloses a system and method for estimating network security situation based on index logarithm analysis. The system is characterized by comprising a data acquisition sub-system, a network security situation understanding sub-system, a network security situation estimation sub-system and a security reinforcement scheme sub-system. The method comprises the following steps: A, carrying out statistical data fusion and correlation analysis on data of a network system in the aspects of asset, threat and vulnerability so as to obtain standardized data, wherein the data is acquired by a transducer; and B, carrying out the network security situation estimation on the fused standardized data in the step A based on the index logarithm analysis. The confidentiality, the integrity and the availability of the network security situation are estimated in the aspects of the asset, the threat and the vulnerability, and the estimation result is output. The system and method provided by the ...

Travel scheme planning method and device, electronic equipment and storage medium

The invention provides a travel scheme planning method and device, electronic equipment and a storage medium, relates to the field of artificial intelligence, in particular to the technical fields of intelligent transportation, automatic driving and the like, and can be applied to scenes such as travel scheme recommendation and the like. According to the specific implementation scheme, a first travel scheme is generated based on a departure place, a destination and first route information, the first route information is route data of a non-automatic driving vehicle, and the first travel scheme is a scheme for traveling by using the non-automatic driving vehicle; target route information related to the first travel scheme is screened out from second route information, and the second route information is route data of the autonomous vehicle; and generating a second travel plan based on the first travel plan and the target route information, the second travel plan being a plan for traveling ...

Active power distribution network loss reduction method and device, terminal and storage medium

The invention relates to the technical field of distributed power grid regulation and control, in particular to an active power distribution network loss reduction method and device, a terminal and a storage medium. Then, according to the bus voltage data set and a plurality of feeder current data sets corresponding to a plurality of feeders, determining a plurality of feeder current feature sets; then, according to the plurality of feeder current feature sets, determining a power supply relationship between the plurality of loads and the plurality of distributed power supplies; and finally, balancing the output current of the near-end distributed power supply and the output current of the far-end distributed power supply of the load according to the power supply relationship. According to the embodiment of the invention, the power supply relationship between the load and the plurality of distributed power supplies is determined by analyzing the relevance of the characteristics of the load ...

Drainage method based on mining drainage equipment with intelligent detection system

The invention discloses a drainage method based on mining drainage equipment with an intelligent detection system, which comprises a movable base, an advancing mechanism is arranged on the movable base, a lifting mechanism is arranged on the advancing mechanism, a detection support rod extending outwards is arranged on the lifting mechanism, a detection shaft is downwards arranged on the detection support rod, and the detection shaft is arranged on the detection support rod. The water depth detection device comprises a water depth detection plate, the water depth detection plate is provided with a detection shaft, the detection shaft is sleeved with a detection ring, the lower end of the detection shaft is downwards provided with a telescopic mechanism, one side of the water depth detection plate is connected with a water pumping device fixing plate, and a plurality of water pumping mechanisms are evenly distributed on the water pumping device fixing plate in the axis direction of the detection ...

High-performance spectrum sharing configuration method of radar communication spectrum coexistence system

The invention relates to the technical field of radar communication, particularly discloses a high-performance spectrum sharing configuration method of a radar communication spectrum coexistence system, and designs a target function (original problem) in order to maximize the signal to interference plus noise ratio (SINR) under a plurality of constraint conditions and suppress the mutual interference of the coexistence system. Based on the non-convex objective function, the method further derives an iterative process to calculate a series of sub-problems, and allows each original variable to have a low-complexity analytical solution. The method comprises the following steps: firstly, solving a communication system codebook with a maximum signal to interference plus noise ratio under the constraint of finite power of a communication system; and then, obtaining an optimal filtering weight vector of a radar system according to a signal to interference plus noise ratio maximization criterion ...

Reduced resistance source and drain extensions in vertical field effect transistors

Semiconductor devices and methods of forming the same include forming first charged spacers on sidewalls of a semiconductor fin. A gate stack on the fin is formed over the first charged spacers. Second charged spacers are formed on sidewalls of the fin above the gate stack. The fin is recessed to a height below a top level of the second charged spacers.

Electronic device with graphical user interface

DATA STORAGE AND CALLING METHODS AND DEVICES

Data storage and calling methods and devices are provided. One of the methods includes: receiving first motion data and business data; establishing an association relationship between the first motion data and the business data and storing the association relationship; receiving second motion data; and determining first motion data that matches the second motion data, and returning, to a sender of the second motion data, business data associated with the matched first motion data.

TRANSISTOR WITH ASYMMETRIC SPACERS

A field-effect transistor device including an asymmetric spacer assembly allows lower parasitic capacitance on the drain side of the device and lower resistance on the source side. The asymmetric spacer assembly is formed by a self-aligned process, resulting in less gate/junction overlap on the drain side of the device and greater gate/junction overlap on the source side of the device. Asymmetric transistors having small gate lengths can be obtained without overlay/misalignment issues.

Vertical transistor with back bias and reduced parasitic capacitance

A method of making a vertical transistor device includes forming a front gate and a back gate opposite a major surface of a substrate. The front gate and the back gate are symmetric and arranged on opposing sides of a channel between the front gate and the back gate. The channel extends from a drain to a source. The method includes disposing a mask to cover the front gate and removing the back gate. The method further includes replacing the back gate with a layer of insulator and another back gate stack. The another back gate stack only covers a junction between the channel and the source, and remaining portions of the back gate are the layer of insulator.

COMPOSITE FUEL WITH ENHANCED OXIDATION RESISTANCE

An improved nuclear fuel that has enhanced oxidation resistance and a process for making it are disclosed. The fuel comprises a composite of U235 enriched U3Si2 particles and an amount less than 30% by weight of UO2 particles positioned along the surface of the U3Si2 particles. The composite may be compressed into a pellet form. The process comprises forming a layer of UO2 on the surface of U3Si2 particles, either by exposing U3Si2 particles to an atmosphere of up to 15% oxygen by volume dispersed in an inert gas for a period of time and at a temperature sufficient to form UO2 at the U3Si2 particle surface, or by mixing U3Si2 particles with an amount up to 30% by weight of UO2 particles.

Process for preparing multi-color dispersions and multi-color dispersions made thereof

A process for making multi-color dispersion, a dispersion made thereof and a coating composition comprising the dispersion are provided. The process comprises: contacting a first colorant, a first aqueous dispersion of polymer particles, a first polysaccharide and a second polysaccharide to make a first colorant dispersion; contacting the first colorant dispersion with a composition to obtain a dispersion of protected first colorant particles; obtaining a dispersion of protected second colorant particles by the same way; mixing the two dispersions to obtain a multi-color dispersion.

SILK-HYALURONIC ACID BASED TISSUE FILLERS AND METHODS OF USING THE SAME

Hyaluronic acid and silk protein fragments based tissue fillers and methods of the same are provided herein.

HETEROAROMATIC DERIVATIVES FOR USE AS REGULATOR, PREPARATION METHOD THEREFOR AND USE THEREOF

The present invention relates to heteroaromatic derivatives for use as a regulator, a preparation method therefor and a use thereof. In particular, disclosed are compounds represented by general formula (I), preparation methods therefor, pharmaceutical compositions comprising said compounds, and a use thereof as Janus kinase inhibitors in treating inflammatory diseases and tumor-related diseases.

Polyurethane wool anti-felting finish agent and preparation method thereof

The present invention is one wool felting preventing polyurethane finishing agent and its preparation process. Polyisocyanate, polyol compound and polyether modified polysiloxane are reacted to generate polyurethane pre-polymer with end isocyanate radical; the polyurethane pre-polymer with end isocyanate radical is then end blocked and emulsified with sodium sulfite solution and one or several kinds of organic solvent, and finally pH regulated with acid to 2-6 to obtain the anion type reactive organosilicon modified water soluble wool felting preventing polyurethane finishing agent. The polyurethane finishing agent is used in the felting preventing finishing of wool fabric and is one kind of green assistant. The polyurethane finishing agent has the general expression of NaSO3OCHN-R-NHCOSO3Na.

Line connector insulating partition plate

The invention discloses a line connector insulating partition plate which includes an insulating partition plate body (1) and a cross arm fixing member (2). The insulating partition plate body (1) is provided with an installing installation slot which is used for installation of an insulating ceramic casing pipe (11); and the cross arm fixing member includes a plurality of cross arm clamps (21) which are installed on the insulating partition plate body (1) and are respectively provided with a mounting hole (21d), and also includes a clamp fastener (22) which can be screwed into / screwed out of the mounting hole (21d) so that the cross arm clamp (21) is rotatably arranged on the cross arm or can be disassembled from the cross arm clamp (21). The line connector insulating partition plate is simple in structure and convenient in operation, can be disassembled, and is convenient in transportation and installation; and an operation arm is operated to realize remote installation and fixation ...

Low-damage well completion fluid applicable to deep coal seam

The invention discloses a low-damage well completion fluid applicable to deep coal seam. The low-damage well completion fluid comprises the following components in parts by weight: 100 parts of fresh water, 0.6-1.8 parts of tackifier, 10-60 parts of density modifier, 0.5-1.5 parts of corrosion inhibitor, 1-3 parts of inhibitor, 0.3-0.5 part of water blocking preventer, 0.02-0.05 part of defoaming agent, 0.7-1.5 parts of reservoir protecting agents. The fresh water is derived from tap water or stratum discharge water, the tackifier is a mixture of xanthan gum and high-viscosity polyanionic cellulose or high-viscosity sodium carboxymethylcellulose, the density modifier is hollow glass beads, the corrosion inhibitor is 1,3-dimethyl-2-imidazolidinone, the inhibitor is an organic amine inhibitor, the water blocking preventer is non-ylphenolpolyoxyethylene ether, the defoaming agent is an organosilicon defoaming agent, and the reservoirprotecting agent is a mixture of calcium carbonate and paper ...

Indirect measuring system for electricity consumption of end device of air conditioning system of public building

The invention relates to an indirect measuring system for electricity consumption of an end device of an air conditioning system of a public building. The system comprises a public building information acquiring module for acquiring building type and distribution branch information, an electricity energy sub-item measuring module for acquiring the electricity consumption data of each sub-item, a end device energy consumption decomposing module for receiving the building type, distribution branch information and sub-item electricity consumption data as well as decomposing the air conditioning system end device mixed in the electricity consumption sub-item of a lighting socket and/ or a power electricity consumption sub-item so as to obtain the electricity consumption dismounting result of the air conditioning system end device, and an energy consumption discomposing result evaluation module for receiving the energy consumption decomposing result of the air conditioning system end device ...

Externally-hung type high-altitude aerial photography platform

The invention relates to an externally-hung type high-altitude aerial photography platform which comprises a platform mounting component and a bearing rod component. The platform mounting component comprises a mounting plate. The bearing rod component comprises a cantilever beam and a mounting beam, the mounting plate and the mounting beam are arranged at the two ends of the cantilever beam respectively, and the mounting beam is connected with a plane through a plurality of fuselage connecting pieces. According to the externally-hung type high-altitude aerial photography platform, an aerial photography instrument is arranged on the mounting plate, and is connected with the plane through the cantilever beam and the mounting beam. When the aerial photography platform is used, only the aerial photography platform needs to be additionally arranged on the plane directly, and the aerial photography instrument can be mounted in the aerial photography platform to carry out high-altitude high-speed ...

Field sunflower threshing machine

The invention relates to the technical field of agricultural machines, and discloses a field sunflower threshing machine. The field sunflower threshing machine comprises a hopper, a support, a roller, a screen box and a sunflower seed bagging mechanism. The front end of a rack is in a triangular pyramid shape, one face of the triangular pyramid is in contact with the ground, the hopper is arranged above the rack, the lower portion of a discharge port of the bottom end of the hopper is connected with one end of a first lifting device, the other end of the first lifting device is connected with an inlet of the roller, a rolling shaft is arranged in the roller, the screen box is arranged below the roller, a sunflower seed outlet is formed in the screen box, the sunflower seed outlet is connected with one end of a second lifting device, the other end of the second lifting device is connected with the sunflower seed bagging mechanism, and the top end of the second lifting device is connected ...

Electrical part cigarette packing box

The invention discloses an electrical part cigarette packing box, belonging to the field of modern tobacco logistics and providing a new message perception platform based on the Internet of things (IOT). The electrical part cigarette packing box comprises a radio frequency tag and a packing box; the inlay of the radio frequency tag mainly comprises chips and antennas, and is packaged by different materials; and a plurality of different positions on the six faces of the packing box are provided with slots, concave stations or bayonets which are matched with the overall dimension of the tag, or the radio frequency tag is implanted in a box material by adopting the modes of injection sealing, pasting, film-coating, covering, and direct fusing. The electrical part cigarette packing box is a carrier for goods, and also a carrier of goods information data; the box material of the packing box is high in surface layer intensity; packing tapes are pasted and stripped repeatedly, so residuals basically ...

Algal filament and shell length measurement's composite set

The utility model provides an algal filament and shell length measurement's composite set, including the chassis, support the center pillar, the combination center pillar, the mid -game is taken overa business, the chassis is equipped with the cockscomb structure upper surface, and chassis central authorities are equipped with the horizontal scale chi, it is connected with the chassis to supportthe center pillar, the combination center pillar is equipped with perpendicular scale and screw rod, the mid -game is equipped with the cockscomb structure lower surface, take over a business and makeup the center pillar and be connected, an algal filament and shell length measurement's composite set has easy operation, measurement of efficiency is high, advantages such as measured data accuracyheight.

Nut layering is dried in air and is really put up

The utility model relates to a nut layering is dried in air and is really put up, its support are multilayer structure, and four crossbeams of looks co -altitude form individual layer square frame with the stand welding, the both ends that individual layer square frame is close to discharging device's crossbeam are equipped with spacing draw -in groove, and other three crossbeams are angle -steelstructure, and its vertical face is set up the stage as flourishing fruit bed as striker plate, horizontal plane, flourishing fruit bed is taken and is put on the crossbeam, flourishing fruit bed oneend is together articulated with the crossbeam that is close to discharging device, connecting plate one end is connected with the crossbeam that is close to discharging device, and a feed cylinder isconnected to the connecting plate other end, the baffle is inserted in spacing draw -in groove, hoisting control device includes the lift cylinder and is used for controlling the flexible cylinder controller ...

Human-computer interaction method for forestry ecological environment multi-source information fusion

The invention discloses a human-computer interaction method for forestry ecological environment multi-source information fusion, which comprises the following steps: a forest region is divided into a plurality of subcompartments, image information obtained by aerial photography is transmitted to a human-computer interaction platform, and the human-computer interaction platform comprises a control decision center, an image processing unit, a resource checking unit, a water quality detection unit and a database; the image processing unit carries out image migration and vectorization processing on the image; performing data analysis on the resources in the forest region by using a resource checking unit; the water quality detection unit is used for detecting and analyzing water quality data in the forest region; the control decision center compares existing data and then sends out corresponding signals, and meanwhile deep learning is carried out to optimize the database. Through the man-machine ...

COATED U3Si2 PELLETS WITH ENHANCED WATER AND STEAM OXIDATION RESISTANCE

A method of forming a water resistant boundary on a fissile material for use in a water cooled nuclear reactor is described. The method comprises coating the fissile material, such as a pellet of U3Si2 and/or the grain boundaries, to a desired thickness with a suitable coating material, such as atomic layer deposition or a thermal spray process. The coating material may be any non-reactive material with a solubility at least as low as that of UO2. Exemplary coating materials include ZrSiO4, FeCrAl, Cr, Zr, Al—Cr, CrAl, ZrO2, CeO2, TiO2, SiO2, UO2, ZrB2, Na2O—B2O3—SiO2—Al2O3 glass, Al2O3, Cr2O3, carbon, and SiC, and combinations thereof. The water resistant layer may be overlayed with a burnable absorber layer, such as ZrB2 or B2O3—SiO2 glass.

GATE CUT DEVICE FABRICATION WITH EXTENDED HEIGHT GATES

Methods of forming semiconductor devices include forming a lower dielectric layer to a height below a height of a dummy gate hardmask disposed across multiple device regions. The dummy gate structure includes a dummy gate and a dummy gate hardmask. A protective layer is formed on the dielectric layer to the height of the dummy gate hardmask. The dummy gate hardmask is etched back to expose the dummy gate.

VERTICAL TRANSPORT FIN FIELD EFFECT TRANSISTORS ON A SUBSTRATE WITH VARYING EFFECTIVE GATE LENGTHS

A method of forming vertical transport fin field effect transistors, including, forming a bottom source/drain layer on a substrate, forming a channel layer on the bottom source/drain layer, forming a recess in the channel layer on a second region of the substrate, wherein the bottom surface of the recess is below the surface of the channel layer on a first region, forming a top source/drain layer on the channel layer, where the top source/drain layer has a greater thickness on the second region of the substrate than on the first region of the substrate, and forming a vertical fin on the first region of the substrate, and a vertical fin on the second region of the substrate, wherein a first top source/drain is formed on the vertical fin on the first region, and a second top source/drain is formed on the vertical fin on the second region.

TRENCH CONTACT RESISTANCE REDUCTION

A method is presented for forming a semiconductor device. The method includes forming source/drain over a semiconductor substrate, forming a sacrificial layer over the source/drain, and forming an inter-level dielectric (ILD) layer over the sacrificial layer. The method further includes forming trenches that extend partially into the sacrificial layer, removing the sacrificial layer to expose an upper surface of the source/drain, and filling the trenches with at least one conducting material. The sacrificial layer is germanium (Ge) and the at least one conducting material includes three conducting materials.

Hybrid-channel nano-sheet FETs

Semiconductor devices and methods of forming a first layer cap at ends of layers of first channel material in a stack of alternating layers of first channel material and second channel material. A second layer cap is formed at ends of the layers of second channel material. The first layer caps are etched away in a first device region. The second layer caps are etched away in a second device region. First source/drain regions are grown in the first device region from exposed ends of the layers of the first channel material. Second source/drain regions are grown in the second device region from exposed ends of the layers of the second channel material.

Fabrication of an isolated dummy fin between active vertical fins with tight fin pitch

A method of forming an arrangement of active and inactive fins on a substrate, including forming at least three vertical fins on the substrate, forming a protective liner on at least three of the at least three vertical fins, removing at least a portion of the protective liner on the one of the at least three of the at least three of vertical fins, and converting the one of the at least three of the at least three vertical fins to an inactive vertical fin.

Method for making VFET devices with ILD protection

A method of forming a semiconductor device and resulting structures having an etch-resistant interlayer dielectric (ILD) that maintains height during a top epitaxy clean by forming a dielectric layer on a semiconductor structure; wherein the dielectric layer includes a first dielectric material; converting at least a portion of the dielectric layer to a second dielectric material; and exposing the portion of the dielectric layer to an etch material; wherein the etch material includes a first etch characteristic defining a first rate at which the etch material etches the first dielectric material; and wherein the etch material further includes a second etch characteristic defining a second rate at which the etch material etches the portion of the dielectric layer; wherein the first rate is different than the second rate.

Vertical silicon/silicon-germanium transistors with multiple threshold voltages

A method of forming vertical fin field effect transistors, including, forming a silicon-germanium cap layer on a substrate, forming at least four vertical fins and silicon-germanium caps from the silicon-germanium cap layer and the substrate, where at least two of the at least four vertical fins is in a first subset and at least two of the at least four vertical fins is in a second subset, forming a silicon-germanium doping layer on the plurality of vertical fins and silicon-germanium caps, removing the silicon-germanium doping layer from the at least two of the at least four vertical fins in the second subset, and removing the silicon-germanium cap from at least one of the at least two vertical fins in the first subset, and at least one of the at least two vertical fins in the second subset.

A tubular ceramic component suitable for being used in a nuclear reactor

A tubular ceramic component is provided for being used in a nuclear reactor. The component comprises an inner layer of silicon carbide, an intermediate layer of silicon carbide fibres in a fill material of silicon carbide, and an outer layer of silicon carbide. The intermediate layer adjoins the inner layer. The outer layer adjoins the intermediate layer. The silicon carbide of the inner layer, the fill material and the outer layer is doped and comprises at least one dopant in solid solution within crystals of the silicon carbide.

SHADING DEVICES

This disclosure provides a new type of shading device for windows. The shading device comprises two sheets of glass, a blind with a plurality of slates, and an actuating device rotating them. The slates are painted with a low reflectivity coating on one side and a high reflectivity coating on the other side. The blind is installed inside the air tight chamber formed by two sheets of glass. In addition, a low emissivity film can be applied on the wall of the air tight chamber. The shade device employs a control system to adjust the angle of the blind slats in response to various input signals.

Buffer regions for blocking unwanted diffusion in nanosheet transistors

Embodiments of the invention are directed to a method of fabricating a semiconductor device. A non-limiting example of the method includes performing fabrication operations to form a nanosheet field effect transistor device. The fabrication operations include forming a sacrificial nanosheet and a channel nanosheet over a substrate, forming a diffusion barrier layer between the sacrificial nanosheet and the channel nanosheet, wherein a diffusion coefficient of the diffusion barrier layer is selected to substantially prevent a predetermined semiconductor material from diffusing through the diffusion barrier layer.

Methods and structures for cutting lines or spaces in a tight pitch structure

A method for manufacturing a semiconductor device includes forming a hardmask layer on a substrate, forming a plurality of spacers on the hardmask layer, wherein the plurality of spacers comprise a first set of spacers and a second set of spacers, reducing a height of each spacer of the second set of spacers to be less than a height of each spacer of the first set of spacers, removing one or more spacers from at least one of the first set of spacers and the second set of spacers, transferring a pattern of remaining spacers to the hardmask layer to form a plurality of patterned hardmask portions, and transferring a pattern of the plurality of patterned hardmask portions to the substrate to form one of a plurality of patterned substrate portions and a plurality of openings in the substrate.

Reduced resistance source and drain extensions in vertical field effect transistors

Semiconductor devices and methods of forming the same include forming a bottom source/drain region in a semiconductor substrate under a semiconductor fin. First charged spacers are formed on sidewalls of the semiconductor fin. A gate stack is formed on the fin, over the first charged spacers. Second charged spacers are formed on sidewalls of the fin above the gate stack. The fin is recessed to a height below a top level of the second charged spacers. A top source/drain region is grown from the recessed fin.

Vertical silicon/silicon-germanium transistors with multiple threshold voltages

A method of forming vertical fin field effect transistors, including, forming a silicon-germanium cap layer on a substrate, forming at least four vertical fins and silicon-germanium caps from the silicon-germanium cap layer and the substrate, where at least two of the at least four vertical fins is in a first subset and at least two of the at least four vertical fins is in a second subset, forming a silicon-germanium doping layer on the plurality of vertical fins and silicon-germanium caps, removing the silicon-germanium doping layer from the at least two of the at least four vertical fins in the second subset, and removing the silicon-germanium cap from at least one of the at least two vertical fins in the first subset, and at least one of the at least two vertical fins in the second subset.

Conjugating amines

The disclosure provides directly conjugated polysaccharide vaccine molecules and methods related thereto.

Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap

A method of forming a vertical transport fin field effect transistor with self-aligned dielectric separators, including, forming a bottom source/drain region on a substrate, forming at least two vertical fins on the bottom source/drain region, forming a protective spacer on the at least two vertical fins, forming a sacrificial liner on the protective spacer, forming an isolation channel in the bottom source/drain region and substrate between two of the at least two vertical fins, forming an insulating plug in the isolation channel, wherein the insulating plug has a pinch-off void within the isolation channel, and forming the dielectric separator on the insulating plug.

Anoden-Modul und Strahlenröhren-Vorrichtung

Anoden-Modul in verkleinerter Ausführung, welches ein Zielteil, ein Rotormodul, eine erste Drehachse, eine zweite Drehachse sowie ein wärmeisolierendes Teil umfasst. Das vorstehend bezeichnete Zielteil dient dem Empfang eines Elektronenstrahls, um einen Strahl zu erzeugen, während das vorstehend bezeichnete Rotormodul dem Antrieb des vorstehend bezeichneten Zielteils zur Drehung dient, wobei die vorstehend bezeichnete erste Drehachse mit dem vorstehend bezeichneten Zielteil gekoppelt ist. Die vorstehend bezeichnete zweite Drehachse ist mit der vorstehend bezeichneten ersten Drehachse und dem vorstehend bezeichneten Rotormodul gekoppelt, so dass das vorstehend bezeichnete Rotormodul durch die vorstehend bezeichnete zweite Drehachse, die vorstehend bezeichnete erste Drehachse und das vorstehend bezeichnete Zielteil zur gemeinsamen Drehung antreibt. Das vorstehend bezeichnete wärmeisolierende Teil ist zwischen der vorstehend bezeichneten ersten Drehachse und der vorstehend bezeichneten zweiten ...

STROMABLIEFERUNGSSYSTEM MIT KASKADIERTEN ABWÄRTSSTUFEN

Gossypium anomalum-sourced ssr sequence associated with high lint percentage and drought tolerance and application thereof

Provided is a gossypium anomalum-sourced SSR sequence associated with high lint percentage and drought tolerance and an application thereof. Provided is a gossypium anomalum-sourced chromosome segment which is a DNA segment from an SSR molecular marker JAAS6365 to an SSR molecular marker JAAS5604 on chromosome 5 of the gossypium anomalum. The nucleotide sequence of the SSR molecular marker JAAS6365 is shown as SEQ ID No. 1, and the nucleotide sequence of the SSR molecular marker JAAS5604 is shown as SEQ ID No. 2.

DRILLING ADVISORY SYSTEMS AND METHODS BASED ON AT LEAST TWO CONTROLLABLE DRILLING PARAMETERS

Methods and systems for controlling drilling operations include using a statistical model to identify at least two controllable drilling parameters having significant correlation to one or more drilling performance measurements. The methods and systems further generate operational recommendations for at least two controllable drilling parameters based at least in part on the statistical model. The operational recommendations are selected to optimize one or more drilling performance measurements.

Method and device for controlling built-in automatic control shading double-layer glass window

The invention discloses a method and a device for controlling a built-in automatic control shading double-layer glass window. The device comprises a window body and a shading automatic control circuit, wherein the window body comprises a window body with double-layer glasses and a built-in shading shutter window body mounted between the double-layer glasses; the shading automatic control circuit comprises a shutter height control actuator, a shutter angle control actuator, an actuator controller, a light sensor, a temperature sensor and a direct-current power source; the output ends of the shutter height control actuator and the shutter angle control actuator are respectively connected with a shutter angle and lifting control stay guy rotating shaft of the shutter; the actuator controlleris a microcomputer circuit; and the input end of the actuator controller is connected with the light sensor and the temperature sensor. The invention can solve the technical problems that the traditional ...

Dual-voltage amplifying high-gain high-frequency rectifying isolating converter

The invention discloses a dual-voltage amplifying high-gain high-frequency rectifying isolating converter and belongs to the technical field of power electronic converters. The dual-voltage amplifying high-gain high-frequency rectifying isolating converter is composed of a primary circuit, a transformer and a rectifying circuit. The rectifying circuit is composed of four diodes, two switch tubes, two auxiliary capacitors, two output filter capacitors, a high-frequency inductor and a load. According to the dual-voltage amplifying high-gain high-frequency rectifying isolating converter, a rectifying circuit has the controllable boosting and rectifying ability through the high-frequency inductor and the switch tubes, an embedded voltage amplifying rectifying circuit is formed through the auxiliary capacitors and the diodes, and a voltage amplifying output circuit is formed through the two output capacitors; in this way, the dual-voltage amplifying high-gain high-frequency rectifying isolating ...

Protection device and loops thereof detection method under no-power-failure line condition

The invention discloses a protection device and loops thereof detection method under a no-power-failure line condition. The protection device and the loops thereof detection method under the no-power-failure line condition mainly comprises the following steps of carrying out detection of line protection and the loops thereof under the no-power-failure line condition; respectively detecting bilateral line protection and the loops thereof; respectively detecting dually configured two sets of line protection and the loops thereof; comparing the two sets of line protection devices to check current and voltage values; existing a line pilot protection channel to be detected and disconnecting an alternating voltage switch thereof; respectively performing A-phase tripping, B-phase tripping, C-phase tripping and reclosing tests through a method of a test box and the small signal analog quantity; printing a protective action report. According to the protection device and the loops thereof detection ...

Sol-gel anti-ultraviolet finishing method for cotton fabric

The present invention performs anti-ultraviolet finishing of cotton fabric by means of sol-gel technology, and in a rolling-stoving-roasting process with tetrabutyl titanate as precursor for preparing titanium-containing nanometer solution. At the same time, fluorescent whitening agent and synthetic latex are used to make the fabric possess excellent lasting anti-ultraviolet performance while producing few influence on the hand feeling and mechanical and physical performance of the fabric.

Intermittent impact jet flow separately-shaped-fin cooling device

The invention relates to an intermittent impact jet flow separately-shaped-fin cooling device. According to the intermittent impact jet flow separately-shaped-fin cooling device of the invention, a jet flow cooling technology and a fin radiator are combined with each other so as to form an efficient, compounded and enhanced heat transfer system. The intermittent impact jet flow separately-shaped-fin cooling device mainly comprises an intermittent jet flow generation device and a separately-shaped-fin radiator. The intermittent impact jet flow separately-shaped-fin cooling device is characterized in that gas is adopted as a cooling medium; the intermittent jet flow generation device forms unsteady and intermittent gas flow; the unsteady and intermittent gas flow directly impacts the surfaces of fins; and therefore, an electronic device with high heat flux can be cooled rapidly, and energy consumption can be reduced. A separately-shaped-fin network has excellent planar space filling ability ...

Dynamic searchable symmetrical encryption method supporting physical deletion

The invention discloses a dynamic searchable symmetrical encryption method supporting physical deletion, and belongs to the technical field of cryptology and cloud storage. The method enables a user to realize retrieval of cryptograph data and a dynamic updating function of researchable cryptograph in a cloud storage environment, in a dynamic updating process, information of the researchable cryptograph is not leaked, an existing index structure is not damaged, according to the method, when file deletion is performed, first logic deletion is performed to protect the existing index structure from being leaked and damaged, and then physical deletion is completed in a retrieval process, thereby reducing the storage overhead of a system. The dynamic searchable symmetrical encryption method supporting physical deletion provides a balanced solution for the three problems of security, efficiency and practicability existing in a researchable symmetrical encryption scheme.

Mobile hard disc enciphering system of SCM controlling MEMS strong chain

The invention discloses a mobile hard disk encrypting system based on single chip microcomputer controlled MEMS discriminator, belonging to the field of micro-electro-mechanical system. An identity authentication module communicates with a USB interface chip which converts a USB bus instruction into an internal instruction, a signal is outputted to a driving circuit by an I/O interface to drive a discriminator to decode. At the same time, the discriminator generates a key signal, a key processing module reads a key and judges the key is a correct code or a erroneous code: if the key is a correct code, the key processing module sends the key to a data encrypting/decrypting module, and returns a normal running signal to a host, the identity authentication succeeds, the host recognizes the mobile hard disk and can read/write the encrypting information therein; or else, the key processing module sends a rest phase to the I/O interface, controls the reset of the discriminator, returns a running ...

Device and method for measuring diameter of nozzle of aircraft engine tail

The present invention relates to a device and a method for measuring the diameter of a nozzle of an aircraft engine tail, and belongs to the technical field of aircraft engines. The device comprises a feedback sensor, wherein one end of the feedback sensor connected with a power supply is connected with the input end of a first voltage isolation module; a tap end of the feedback sensor is connected with the input end of a second voltage isolation module; the output ends of the voltage isolation modules are connected with the input ends of a PXI acquisition card respectively; and the output ends of the PXI acquisition card are connected with an industrial personal computer through a PXI case respectively. The measuring method comprises the following steps of: 1, judging whether to calibrate the tail nozzle, if so, calling a tail nozzle calibration subroutine, and otherwise, measuring the diameter of the tail nozzle to acquire a signal measurement value, and executing step 3; 2, returning ...

Lamp decoration cap with show and light emission function

The utility model relates to a lamp decoration cap with show and light emission function, including the cap body, the surface of cap body is buckled to bond through nylon and is bent to curved display screen, the back and the laminating of cap body surface of display screen, and the cap body is provided with waterproof intermediate layer, is suitable for in the waterproof intermediate layer and places control module, the control module constitute including control chip, with power module and wireless communication module that the control chip is connected, the display screen is connected with control chip. This lamp decoration cap is provided with curved display screen, shows that the content is abundanter, has improved the pleasing to the eye degree and the decorative effect of lamp decoration cap. Be provided with wireless module among the control module of lamp decoration cap, can is connected with the it carryes out through the cell -phone to to show that the content passes through ...

Adjustable overspeed device tensioner of lifting and horizontal moving formula stereo garage motor drive chain

The utility model provides an adjustable overspeed device tensioner of lifting and horizontal moving formula stereo garage motor drive chain, including take -up pulley, take -up pulley fixing base, round pin axle, split pin, plain washer, the take -up pulley is located between the take -up pulley fixing base, and the take -up pulley fixing base comprises two parts of symmetry, is equipped with the pinhole between the take -up pulley fixing base, corresponds the middle through -hole that is equipped with of take -up pulley, and the round pin axle passes take -up pulley fixing base and take -up pulley, and the both sides of round pin axle are equipped with the trompil, and the trompil of split pin and round pin axle cooperatees, is equipped with the plain washer between take -up pulley fixing base inboard and the take -up pulley, the utility model discloses simple structure, installation convenient to use, low in cost adjust effectually, and through the coarse adjusting in rectangular hole ...

Method for judging casting and forging state of stainless steel component for power equipment based on laminating metallographic method

The invention relates to a method for judging the casting and forging state of a stainless steel component for power equipment based on a laminating metallographic method, which is used for carrying out on-site nondestructive judgment on the casting and forging state of a service component and comprises the following steps of: selecting a local detection area on the surface of the service component, and preprocessing the local detection area to obtain a detection micro-area; performing field preparation by adopting a metallographic structure laminating technology to obtain a surface metallographic phase of the detection micro-area and a corresponding metallographic structure picture; acquiring element component distribution of a certain matrix array and hardness distribution of a certain matrix array in the detection micro-area; and comprehensively judging the casting and forging state of the service component based on the metallographic structure picture, the element component distribution ...

Intelligent material taking cabinet and intelligent material taking and recycling system

The invention relates to an intelligent material taking cabinet and an intelligent material taking and recycling system.The intelligent material taking cabinet comprises a taking cabinet body, an intelligent control screen is arranged on the taking cabinet body, a plurality of drawers are arranged on the taking cabinet body in a sliding mode, and a plurality of partition plates are arranged on the drawers in the sliding direction of the drawers; a power driving device is arranged behind each layer of drawer, a lock control device is arranged at the rear end of each drawer, the lock control devices are arranged between the drawers and the power driving devices, and the intelligent control screen is electrically connected with the power driving devices and the lock control devices. An instruction is given through the intelligent control screen, the drawer is divided into a plurality of spaces by partition plates in the drawer, the pushed drawer and the pushed distance are determined by the ...

Construction method for foam concrete roadbed of expressway

The invention discloses a construction method for a foam concrete roadbed of an expressway. The construction method comprises the steps of construction lofting, step excavation, longitudinal and transverse blind ditch arrangement, formwork erecting, foam concrete preparation, pumping pouring, manual surface finishing and covering maintenance. Foam concrete is adopted for backfilling the roadbed, material preparation is simple, construction is conducted through piping pumping, the occupied space of construction is small, construction is convenient and fast, the construction period is short, the construction progress is accelerated, the construction period is shortened, labor input is reduced, the construction cost is reduced, and large economic benefits are generated; compared with a digging ash-doped backfill process, the foam concrete roadbed construction method does not need large equipment and lime, the digging ash-doped backfill construction period is 20 days, the foam concrete roadbed ...

Heteroaromatic derivative regulator as well as preparation method and application thereof

The invention relates to a heteroaromatic derivative regulator as well as a preparation method and application thereof. In particular, the present invention relates to a compound represented by general formula (I), a preparation method thereof, a pharmaceutical composition containing the compound, and uses of the compound as a Janus kinase inhibitor in the treatment of inflammatory related diseases and tumor related diseases, each substituent in the general formula (VIII) being as defined in the specification.

SIC MATRIX FUEL CLADDING TUBE WITH SPARK PLASMA SINTERED END PLUGS

A method of providing an end-capped tubular ceramic composite for containing nuclear fuel (34) in a nuclear reactor involves the steps of providing a tubular ceramic composite (40), providing at least one end plug (14, 46, 48), applying (42) the at least one end plug material to the ends of the tubular ceramic composite, applying electrodes to the end plug and tubular ceramic composite and applying current in a plasma sintering means (10, 50) to provide a hermetically sealed tube (52). The invention also provides a sealed tube made by this method.

Method for automatic focus and PTZ camera

Embodiments of the present application provide an automatic focusing method and a PTZ camera. The method is applicable to the PTZ camera and comprises: calculating a current target object distance from a lens of the PTZ camera to a monitored target monitoring plane based on a pre-established spatial object distance parameter; wherein, the spatial object distance parameter contains a spatial plane equation of a reference monitoring plane; the reference monitoring plane is an equivalent plane of the target monitoring plane; searching in a preset relation table based on the current target object distance, a current magnification of the PTZ camera, determining a position information corresponding to a focus motor of the PTZ camera, the preset relation table including the relationship of the object distance, the magnification and the position information of the focus motor, and driving the focus motor to a position corresponding to the determined position information. Embodiments of the present ...

Field effect device with reduced capacitance and resistance in source/drain contacts at reduced gate pitch

A method of forming source/drain contacts with reduced capacitance and resistance, including, forming a source/drain and a channel region on an active region of a substrate, forming a dielectric fill on the source/drain, forming a trench in the dielectric fill, forming a source/drain contact in the trench, forming an inner contact mask section on a portion of an exposed top surface of the source/drain contact, removing a portion of the source/drain contact to form a channel between a sidewall of the dielectric fill and a remaining portion of the source/drain contact, where a surface area of the remaining portion of the source/drain contact is greater than the surface area of the exposed top surface of the source/drain contact, and forming a source/drain electrode fill on the remaining portion of the source/drain contact.

Switching regulator with automatic multi mode conversion

Methods and apparatus are disclosed for efficient switching regulators that adapt automatically to, and operate with, input voltages that are above, below, or equal to the output voltage. The disclosed switching regulators demonstrate advantages of both buck and boost converters at high efficiency.

VERTICAL FIELD EFFECT TRANSISTOR WITH REDUCED GATE TO SOURCE/DRAIN CAPACITANCE

A method of forming a fin field effect transistor device is provided. The method includes forming a vertical fin layer on a bottom source/drain layer, and forming one or more fin templates on the vertical fin layer. The method further includes forming a vertical fin below each of the one or more fin templates. The method further includes reducing the width of each of the vertical fins to form one or more thinned vertical fins, wherein at least a portion of the fin template overhangs the sides of the underlying thinned vertical fin. The method further includes depositing a bottom spacer layer on the bottom source/drain layer, wherein the bottom spacer layer has a non-uniform thickness that tapers in a direction towards the thinned vertical fins.

VERTICAL TRANSISTOR WITH BACK BIAS AND REDUCED PARASITIC CAPACITANCE

A method of making a vertical transistor device includes forming a front gate and a back gate opposite a major surface of a substrate. The front gate and the back gate are symmetric and arranged on opposing sides of a channel between the front gate and the back gate. The channel extends from a drain to a source. The method includes disposing a mask to cover the front gate and removing the back gate. The method further includes replacing the back gate with a layer of insulator and another back gate stack. The another back gate stack only covers a junction between the channel and the source, and remaining portions of the back gate are the layer of insulator.

High aspect ratio gates

Embodiments are directed to a method of forming a feature of a semiconductor device. In one or more embodiments, the feature is a gate, and the method includes forming a substrate and forming a gate material extending over a major surface of the substrate. The method further includes forming a trench extending through the gate material and into the substrate in a first direction, wherein the trench further extends through the gate material and the substrate in a second direction. The method further includes filling the trench with a fill material and forming individual gates from the gate material, wherein the individual gates extend along a third direction.

Training acoustic models using distributed computing techniques

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training acoustic models. Speech data and data identifying a transcription for the speech data are received. A phonetic representation for the transcription is accessed. Training sequences are identified for a particular phone in the phonetic representation. Each of the training sequences includes a different set of contextual phones surrounding the particular phone. A partitioning key is identified based on a sequence of phones that occurs in each of the training sequences. A processing module to which the identified partitioning key is assigned is selected. Data identifying the training sequences and a portion of the speech data are transmitted to the selected processing module.

Dialog generation method, apparatus, and electronic device

A dialog generation method includes: training a sequence to sequence (seq2seq)-based dialog model using a loss function including topic range constraint information; and generating a dialog using the trained dialog model. With the dialog generation method, topic range constraint information is introduced in the process of dialog model training using a loss function including the topic range constraint information, thus helping to prevent the trained model from producing low-quality meaningless replies.

Forming vertical transport field effect transistors with uniform bottom spacer thickness

A method of forming a vertical transport field effect transistors with uniform bottom spacer thickness, including, forming a plurality of vertical fins on a substrate, forming a protective liner layer on the plurality of vertical fins, forming a sacrificial liner on the protective liner layer, forming a spacer liner on a portion of the sacrificial liner, wherein at least a top surface of the sacrificial liner on each of the vertical fins is exposed, converting the exposed portion of the sacrificial liner on each of the vertical fins to a conversion cap, and removing the conversion cap from each of the vertical fins to expose an upper portion of each vertical fin.

Method for seismic interpretation using seismic texture attributes

Encoding and adaptive, scalable accessing of distributed models

Systems, methods, and apparatus for accessing distributed models in automated machine processing, including using large language models in machine translation, speech recognition and other applications.

Systems and methods for determining geologic properties using acoustic analysis

Heteroaromatic derivatives for use as regulator, preparation method therefor and use thereof

The present invention relates to heteroaromatic derivatives for use as a regulator, a preparation method therefor and a use thereof. In particular, disclosed are compounds represented by general formula (I), preparation methods therefor, pharmaceutical compositions comprising said compounds, and a use thereof as Janus kinase inhibitors in treating inflammatory diseases and tumor-related diseases.

Malformed SIP generation method and system based on SIP processing mode

The invention provides a malformed SIP (Session Initial Protocol) generation method and system based on an SIP processing mode and belongs to the field of security detection of an IP multimedia subsystem (IMS) core network. The method comprises the following steps: firstly designing malformation types and custom build rules according to the IMS network entity SIP processing mode, then generating malformed SIP messages, detecting the ability of an IMS network entity to resist the malformed SIP messages under different session models.

SERVER

A server includes a rack, a slide rail, an input/output (I/O) dock, and a chassis. The rack has a front end and a rear end. The slide rail is disposed in the rack. The I/O dock is located at the rear end of the rack and fixed to an end of the slide rail. The chassis is slidably disposed on the slide rail. Here, the chassis moves relatively to the rack along the slide rail to come into contact with the I/O dock or to be away from the I/O dock. 1. A server comprising:a rack having a front end and a rear end;a slide rail disposed in the rack;an input/output dock located at the rear end of the rack and fixed to an end of the slide rail; anda chassis slidably disposed on the slide rail, wherein the chassis moves relatively to the rack along the slide rail to come into contact with the input/output dock or to be away from the input/output dock.2. The server as claimed in claim 1 , wherein the input/output dock has an opening claim 1 , a first connector is disposed at a rear end of the chassis claim 1 , and the server further comprises:a circuit board disposed on the input/output dock, wherein a second connector is disposed on one surface of the circuit board facing the chassis, the opening exposes the second connector, a plurality of input/output ports are fixed on the other surface of the circuit board back towards the chassis, and the input/output ports are electrically connected to the second connector;a hard disc array disposed in the chassis and electrically connected to the first connector; anda motherboard module array disposed in the chassis and electrically connected to the first connector, wherein when the chassis comes into contact with the input/output dock, the first connector connects the second connector, so as to electrically connect the hard disc array and the motherboard module array to the input/output ports.3. The server as claimed in further comprising a cushion element disposed on a surface of the input/output dock facing the chassis.4. The server as ...

BLADE SERVER MODULE

A blade server module applicable to be inserted into a blade server system. The blade server module includes a motherboard tray having a first connector, a motherboard, an extension dock and an adaptor card having a second connector corresponding to the first connector and electrically connect to the first connector via a cable so as to connect the motherboard and the adaptor card. Compared with prior arts, since utilization of the cable, the blade server module is not restricted by smaller motherboard and more and more concentrative electronic elements. Since arrangement of the cable does not occupy space of the motherboard and connects the motherboard and the adaptor card integrally, signals of the motherboard output via the adaptor card and then link the inserted blade server system. Hence the blade server module of the present invention efficiently decreases overall manufacturing cost and its occupation volume. 1. A blade server module applicable to be inserted into a blade server system , comprising:a motherboard tray having a bottom plate and a front panel perpendicular in position to the bottom plate and formed on a first end of the motherboard tray;a motherboard placed on the bottom plate and having at least one first connector;an extension dock fastened to a second end of the motherboard tray; andan adaptor card placed on the extension dock and having at least one second connector corresponding to the first connector, wherein the second connector is electrically connected to the first connector via a cable, and an end of the adaptor card away from the motherboard has a gold finger electrically connected to the second connector for being inserted into the blade server system.2. The blade server module of claim 1 , further comprising a PCI module fastened to the first end of the motherboard tray and comprising:a PCI support disposed above the motherboard and fastened to the front panel via one end thereof and fastened to a side of the motherboard tray via the ...

Rack server

A rack server includes a chassis having a front and a rear ends which are divided by a partition board into a first and a second chambers; a mother board module, located in the first chamber; a hard drive module, disposed in the second chamber. The hard drive module includes a hard drive cage, slidably disposed in the second chamber from the front end, in which the hard drive cage has a first and a second sides parallel to the partition board and the second side has a hard drive port; a hard drive backplane, vertically fixed to the first side of the hard drive cage; a plurality of hard drives, pluggably disposed in the hard drive cage and electrically connected to the hard drive backplane. An extendable/retractable support arm and a wire set arranged inside it maintain an electrical connection of the hard drive cage.

Drilling Advisory Systems And Methods Utilizing Objective Functions

Methods and systems for controlling drilling operations include using a statistical model to identify at least one controllable drilling parameter having significant correlation to an objective function incorporating two or more drilling performance measurements. The methods and systems further generate operational recommendations for at least one controllable drilling parameter based at least in part on the statistical model. The operational recommendations are selected to optimize the objective function. 1. A method of drilling a wellbore , the method comprising:receiving data regarding drilling parameters characterizing ongoing wellbore drilling operations; wherein at least one of the drilling parameters is controllable;utilizing a statistical model to identify at least one controllable drilling parameter having significant correlation to an objective function incorporating two or more drilling performance measurements;generating operational recommendations for at least one controllable drilling parameter; wherein the operational recommendations are selected to optimize the objective function;determining operational updates to at least one controllable drilling parameter based at least in part on the generated operational recommendations; andimplementing at least one of the determined operational updates in the ongoing drilling operations.2. The method of claim 1 , wherein the statistical model is a correlation model.3. The method of claim 1 , wherein the objective function is based on one or more of: rate of penetration claim 1 , mechanical specific energy claim 1 , and mathematical combinations thereof.4. The method of claim 1 , wherein the statistical model is a windowed principal component analysis model adapted to update the identification of significantly correlated parameters at least periodically during the ongoing drilling operations.5. The method of claim 4 , wherein the generated operational recommendations provide quantitative recommendations of ...

Drilling Advisory Systems and Methods Based on At Least Two Controllable Drilling Parameters

Methods and systems for controlling drilling operations include using a statistical model to identify at least two controllable drilling parameters having significant correlation to one or more drilling performance measurements. The methods and systems further generate operational recommendations for at least two controllable drilling parameters based at least in part on the statistical model. The operational recommendations are selected to optimize one or more drilling performance measurements. 1. A method of drilling a wellbore , the method comprising:receiving data regarding drilling parameters characterizing ongoing wellbore drilling operations; wherein at least two of the drilling parameters are controllable;utilizing a statistical model to identify at least two controllable drilling parameters having significant correlation to one or more drilling performance measurements; 'wherein the operational recommendations are selected to optimize one or more drilling performance measurements;', 'generating operational recommendations for at least two controllable drilling parameters;'}determining operational updates to at least one controllable drilling parameter based at least in part on the generated operational recommendations; andimplementing at least one of the determined operational updates in the ongoing drilling operations.2. The method of claim 1 , wherein the statistical model is a correlation model.3. The method of claim 1 , wherein the one or more drilling performance measurements are objective functions based on one or more of: rate of penetration claim 1 , mechanical specific energy claim 1 , and mathematical combinations thereof.4. The method of claim 1 , wherein the statistical model is a windowed principal component analysis model adapted to update the identification of significantly correlated parameters at least periodically during the ongoing drilling operations.5. The method of claim 4 , wherein the generated operational recommendations provide at ...

Providing Alternative Translations

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for presenting alternative translations. In one aspect, a method includes receiving source language text; receiving translated text corresponding to the source language text from a machine translation system; receiving segmentation data for the translated text, wherein the segmentation data includes a first segmentation of the translated text, the first segmentation dividing the translated text into two or more segments; receiving one or more alternative translations for each of the two or more segments; presenting the source text and the translated text to a user in a user interface; and in response to a user selection of a first portion of the translated text, displaying, in the user interface, one or more alternative translations for a first segment to which the first portion of translated text corresponds according to the first segmentation. 1. A method performed by a data processing apparatus , the method comprising:receiving data identifying source language text;receiving a translation for the source language text from a machine translation system, the translation including translated text corresponding to the source language text and segmentation data for the translated text, wherein the segmentation data includes a first segmentation of the translated text, the first segmentation dividing the translated text into two or more segmentsreceiving one or more alternative translations for each of the two or more segments of the first segmentation; and presenting the source language text and the translated text in a user interface; and', 'in response to a user selection of a first portion of the translated text, presenting in the user interface one or more alternative translations for a first segment to which the first portion of the translated text corresponds according to the first segmentation., 'sending executable instructions that, when executed by a user device, ...

SERVER

A server including a rack, chassis, a power module, first copper columns, and second copper columns is provided. The rack has a front end and an opposite back end. The chassis are disposed in the rack and suitable for being pulled out from the front end. Each chassis contains a motherboard module. The power module is disposed in the rack. The first copper columns are fixed on the rack, electrically connected to the power module, and are suitable for electrically connecting an external power supply. The second copper columns are fixed on the rack and electrically connected to the power module and the motherboard modules. A high voltage from the external power supply is transmitted to the power module via the first copper columns. The power module converts the high voltage into a low voltage and transmits the low voltage to the motherboard modules via the second copper columns. 1. A server , comprising:a rack, having a front end and an opposite back end;a plurality of chassis, disposed in the rack, suitable for being pulled out from the front end, wherein each of the chassis contains a motherboard module;a power module, disposed in the rack;at least one first copper column, fixed on the rack and electrically connected to the power module, wherein the first copper column is suitable for electrically connecting an external power supply; andat least one second copper column, fixed on the rack and electrically connected to the power module and the motherboard modules, wherein a high voltage supplied by the external power supply is transmitted to the power module via the first copper column, and the power module converts the high voltage into a low voltage and transmits the low voltage to the motherboard modules via the second copper column.2. The server according to claim 1 , wherein the first copper column and the second copper column are disposed at the back end of the rack.3. The server according to claim 1 , wherein the first copper column and the second copper column ...

METHOD AND SYSTEM FOR PLAYING ORDER PROGRAM AND SERVER ENDPOINT FOR SENDING ORDER PROGRAM

For playing an order program in the present invention, an order program request signal is sent from a digital television receiving terminal. Then linkage program request information is generated and parsed according to the order program request signal. Search the preset recording list according to user identification information to locate a program breakpoint time, wherein the recording list is used for storing and correlating user identification information to program breakpoint time. The located program breakpoint time is set as a playback start time specified in the parsed linkage program request information, and then the linkage program request information is reformed. The digital television receiving terminal is controlled to play the order program from the playback start time specified in the reformed linkage program request information, thereby accomplishing breakpoint resuming of the order program so as to allow a user to watch the order program as desired. 1. A method for playing an order program , comprising steps of:receiving an order program request signal sent from a digital television receiving terminal;generating linkage program request information and parsing the linkage program request information according to the order program request signal;searching a preset recording list according to user identification information included in the parsed linkage program request information to locate a program breakpoint time, wherein the recording list stores and correlates the user identification information and the program breakpoint time;setting the located program breakpoint time as a playback start time specified in the parsed linkage program request information, and then reforming the linkage program request information; andcontrolling the digital television receiving terminal to play the order program from the playback start time specified in the reformed linkage program request information.2. The method for playing an order program according to claim 1 ...

SWITCHING MODE POWER SUPPLY WITH VIRTUAL CURRENT SENSING AND ASSOCIATED METHODS

The present technology is related generally to a switching mode power supply with virtual current sensing. The switching mode power supply comprises a power stage that includes a first power switch and a second power switch coupled in series. The switching mode power supply senses a first current flowing through the first power switch during on-time and provides a virtual current sense signal that is proportional to a second current flowing through the second power switch during on-time. The switching mode power supply further combines the real current sense signal and the virtual current sense signal to form a current sense signal, which is sent to the controller to realize desired control. 1. A switching mode power supply , comprising:a power stage comprising a first power switch and a second power switch coupled in series;a real current sense circuit configured to monitor a current flowing through the first power switch during a first power switch on time, wherein the real sense circuit has an input terminal and an output terminal, and wherein the input terminal is coupled to the first power switch, and wherein the real current sense circuit is configured to provide a real current sense signal at the output terminal, the real current sense signal corresponding to the current flowing through the first power switch during the first power switch on time;a virtual current sense circuit configured to monitor a current flowing through the second power switch during a second power switch on time, wherein the virtual current sense circuit is configured to provide a virtual current sense signal that is related to the current flowing through the second power switch during the second power switch on time;a sense capacitor coupled to the real current sense circuit and the virtual current sense circuit to receive the real current sense signal during the first power switch on time and the virtual current sense signal during the second power switch on time, and to provide a ...

Voltage converters with reduced output frequency variations and associated methods

Switch-mode voltage converters and associated methods are disclosed herein. In one embodiment, a switch-mode voltage converter includes a switching transistor coupled between an input voltage (V in ) and the ground and a controller coupled directly between the input voltage (V in ) and the ground. The controller is configured to periodically turn on the switching transistor for a generally constant period of time. The controller is further coupled to a DC bias voltage (V bias ) and configured to generate a control current based on the input voltage (V in ) and the DC bias voltage (V bias ) for generating a switching signal to the switching transistor.

SERVER RACK SYSTEM

A server rack system includes a rack, a power transmission module, a power supply module, and operating units. The power transmission module configured at the rack includes first, second, and third conductive pillars. When the power supply module slidably configured in the rack is completely installed in the rack, the power supply module electrically connects the first, second, and third conductive pillars to receive high-voltage direct-current (DC) electric power through the first conductive pillar electrically connecting an external power supply. When the operating units slidably configured in the rack are completely installed in the rack, the operating units electrically connect the second and third conductive pillars. The completely installed operating units transmit signals indicating the complete installation to the power supply module, such that the power supply module converts the high-voltage DC electric power into low-voltage DC electric power and transmits the low-voltage DC electric power to the operating units. 1. A server rack system comprising:a rack having a plurality of pairs of guiding rails, a front end, and a rear end opposite to the front end; at least one first conductive pillar configured at the rear end and electrically connected to an external power supply;', 'at least one second conductive pillar configured at the rear end; and', 'a third conductive pillar configured at the rear end;, 'a power transmission module comprisinga power supply module adapted for sliding into the rack from the front end and being slidably configured on one of the pairs of the guiding rails, when the power supply module is completely installed in the rack, the power supply module being electrically connected to the at least one first conductive pillar, the at least one second conductive pillar, and the third conductive pillar and receiving high-voltage direct-current electric power from the external power supply through the at least one first conductive pillar; ...

SWITCHING REGULATORS WITH ADAPTIVE CLOCK GENERATORS AND ASSOCIATED METHODS OF CONTROL

Various embodiments of switch mode power supplies, circuits, and methods of control are described herein. In one embodiment, a method of operating a switch mode power supply having a switching circuit coupled to an inductor includes modulating a duty cycle of the switching circuit to charge the inductor using pulse width modulation, supplying an output voltage from the inductor to the load, performing a comparison between the output voltage and a reference voltage, and deriving an error signal based on the comparison between the output voltage and the reference voltage. The method also includes generating a clock signal for the pulse width modulation based on the received error signal. 1. A switching mode power supply , comprising:a switching circuit coupled between an input voltage and ground;an inductor coupled to the switching circuit, the inductor being configured to supply an output voltage to a load;a voltage feedback circuit coupled to the inductor, the voltage feedback circuit being configured to generate an error signal based on a comparison of the output voltage of the inductor and a reference voltage;a pulse width modulation (PWM) controller operatively coupled to the switching circuit, the PWM controller being configured to modulate a duty cycle of the switching circuit to charge the inductor based at least in part on the error signal from the voltage feedback circuit; andan oscillator having an oscillator input coupled to the voltage feedback circuit and an oscillator output coupled to the PWM controller, the oscillator being configured to receive the error signal at the oscillator input and supply a clock signal to the PWM controller based on the received error signal.2. The switching mode power supply of wherein:the switching circuit includes a first switch and a second switch;the first switch has a first source, a first drain, and a first gate;the second switch has a second source, a second drain, and a second gate;the PWM controller has a first ...

User Behavior Model for Contextual Personalized Recommendation

A user behavior model provides personalized recommendations based in part on time and location, particularly to users of mobile devices. Entity types are ranked according to relevance to the user. Example entity types are restaurant, hotel, etc. The relevance may be based on reference to a large-scale database containing queries from other users. Additionally, entities within each entity type may be ranked based on relevance to the user and the time and location context. A user interface may display a ranked list of entity types, such as restaurant, hotel, etc., wherein each entity type is represented by a highest-ranked entity with the entity type. Thus, the user interface may display a highest-ranked restaurant, a highest-ranked hotel, etc. Upon user selection of one such entity type the user interface is replaced with a second user interface, for example showing a ranked hierarchy of restaurants, headed by the highest-ranked restaurant. 1. A method , comprising:receiving context information about a user of a mobile device;ranking entity types according to relevance to the user, the relevance to the user of the ranked entity types based in part on mass user behavior defined within a query database and based in part on the context information;ranking entities within each entity type according to relevance to the user, the relevance to the user of ranked entities within each entity type based in part on mass user behavior defined within the query database and based in part on the context information;displaying, within a user interface, a listing of entity types according to the ranking of the entity types; andrepresenting each listed entity type with a most relevant entity within the entity type according to the ranking of entities within each entity type.2. The method as recited in claim 1 , wherein receiving context information comprises receiving a location of the mobile device of the user and a local time at the location.3. The method as recited in claim 1 , ...

TRAINING ACOUSTIC MODELS

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training acoustic models. Speech data and data identifying a transcription for the speech data are received. A phonetic representation for the transcription is accessed. Training sequences are identified for a particular phone in the phonetic representation. Each of the training sequences includes a different set of contextual phones surrounding the particular phone. A partitioning key is identified based on a sequence of phones that occurs in each of the training sequences. A processing module to which the identified partitioning key is assigned is selected. Data identifying the training sequences and a portion of the speech data are transmitted to the selected processing module. 1. A system comprising: receiving speech data and data identifying a transcription for the speech data;', 'accessing a phonetic representation for the transcription;', 'extracting training sequences from the phonetic representation for a particular phone in the phonetic representation, each of the training sequences including a different set of contextual phones surrounding the particular phone;', 'identifying a partitioning key based on a sequence of phones that occurs in each of the training sequences;', 'selecting, from among a plurality of processing modules, a processing module to which the identified partitioning key is assigned, the processing module being designated to train a portion of an acoustic model that corresponds to the identified partitioning key; and', 'transmitting, to the selected processing module, (i) data identifying the training sequences and (ii) a portion of the speech data that corresponds to the training sequence that includes the most contextual phones., 'one or more computers and one or more storage devices storing instructions that are operable, when executed by the one or more computers, to cause the one or more computers to perform operations comprising2. ...

SPEECH RECOGNITION USING VARIABLE-LENGTH CONTEXT

Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for recognizing speech using a variable length of context. Speech data and data identifying a candidate transcription for the speech data are received. A phonetic representation for the candidate transcription is accessed. Multiple test sequences are extracted for a particular phone in the phonetic representation. Each of the multiple test sequences includes a different set of contextual phones surrounding the particular phone. Data indicating that an acoustic model includes data corresponding to one or more of the multiple test sequences is received. From among the one or more test sequences, the test sequence that includes the highest number of contextual phones is selected. A score for the candidate transcription is generated based on the data from the acoustic model that corresponds to the selected test sequence. 1. A system comprising: receiving speech data and data indicating a candidate transcription for the speech data;', 'accessing a phonetic representation for the candidate transcription;', 'extracting, from the phonetic representation, multiple test sequences for a particular phone in the phonetic representation, each of the multiple test sequences including a different set of contextual phones surrounding the particular phone;', 'receiving data indicating that an acoustic model includes data corresponding to one or more of the multiple test sequences;', 'selecting, from among the one or more test sequences for which the acoustic model includes data, the test sequence that includes the highest number of contextual phones;', 'accessing data from the acoustic model corresponding to the selected test sequence; and', 'generating a score for the candidate transcription based on the accessed data from the acoustic model that corresponds to the selected test sequence., 'one or more computers and one or more storage devices storing instructions that are operable, ...

ENCODING AND ADAPTIVE, SCALABLE ACCESSING OF DISTRIBUTED MODELS

Systems, methods, and apparatus for accessing distributed models in automated machine processing, including using large language models in machine translation, speech recognition and other applications. 1. A system comprising:a plurality of machine translation resource servers, each machine translation resource server storing and operable to serve a partition of a collection of machine translation resource data for translation from a source language to a target language, the respective partitions together constituting the collection of machine translation resource data and each respective partition being less than the collection of machine translation resource data; andat least one translation server operable to receive source text in the source language to be translated into the target language, the translation server further operable to obtain machine translation resource data from the plurality of machine translation resource servers and to use the obtained machine translation resource data to translate the source text into the target language, at least one translation front end operable to divide the source text into a plurality of segments in the source language, and', 'a plurality of segment translation servers, each segment translation server operable to obtain at least a portion of the obtained machine translation resource data and to translate a segment in the source language into the target language, each segment translation server comprising (i) a first segment translation server cache operable to store at least part of the obtained machine translation resource data, and (ii) a second segment translation server cache which stores a selected portion of the machine translation resource data, each segment translation server being further operable to obtain data from the plurality of machine translation resource servers that is not part of the stored selected portion in the second segment translation server cache., 'wherein the translation server comprises2. ...

SERVER

A server includes a case, a fan module, and a main board module unit. The fan module is disposed in the case and divides the case into first and second spaces. An air flow is sucked into and blown out of the fan module along a first direction. The main board module unit includes a main board module back plate and main board modules. The main board module back plate is horizontally laid in the first space. Each main board module having a hard disk is detachably inserted in the main board module back plate along a second direction, and electrically connected to the main board module back plate. Two maximum area surfaces of each main board module are parallel with the first direction. Air flow channels are formed between the main board modules extending along the first direction. 1. A server , comprising:a case, comprising a bottom board;a fan module, disposed in the case and dividing the case into a first space and a second space, wherein an air flow is sucked into and blown out of the fan module along a first direction; and a main board module back plate, horizontally laid in the first space; and', 'a plurality of main board modules, wherein each main board module comprises a hard disk, the main board modules are detachably inserted in the main board module back plate along a second direction, wherein two maximum area surfaces of each main board module are parallel with the first direction, and a plurality of air flow channels are formed between the main board modules, wherein the air flow channels are extending along the first direction, and the main board modules are electrically connected to the main board module back plate., 'at least one main board module unit, disposed in the first space, and comprising2. The server according to claim 1 , wherein the case comprises a plurality of detachable upper covers claim 1 , the number of the at least one main board module unit is multiple claim 1 , and the upper covers respectively cover the fan module and the main board ...

SCALABLE MULTIPHASE-REGULATOR POWER-INTEGRATED CIRCUIT SYSTEM AND METHOD FOR PROVIDING SCALABLE POWER TO THE SAME

In one embodiment, a modular master chip includes an output module, a phase control module in communication with the output module, the phase control module including a master chip switch, wherein the phase control module is adapted for regulating the master chip switch at one or more interleaved clock speeds with one or more phase shifts, and a control module in communication with the output module and the phase control module, the control module being adapted for monitoring an amount of current drawn by a current load, determining one or more interleaved clock speeds, sending the one or more interleaved clock speeds, and regulating a scalable amount of current supplied to the current load by adjusting a number of output modules contributing to the scalable amount of current supplied to the current load. More methods and systems are described according to other embodiments. 1. A circuit , comprising: monitoring an amount of current drawn by a current load; and', 'regulating a scalable amount of current supplied to the current load by adjusting a number of slave chips contributing to the scalable amount of current supplied to the current load., 'a modular master chip being adapted for2. The circuit as recited in claim 1 , wherein the scalable amount of current supplied to the current load is regulated by adjusting an output current from each of the number of slave chips.3. The circuit as recited in claim 1 , wherein the modular master chip comprises:an output module adapted for outputting a current;a phase control module in communication with the output module, the phase control module comprising a master chip switch, wherein the phase control module is adapted for regulating the master chip switch at one or more interleaved clock speeds with one or more phase shifts; and determining the one or more interleaved clock speeds; and', 'sending the one or more interleaved clock speeds to the master switch and a slave chip switch of each slave chip., 'a control module in ...

METHODS FOR SENSING CURRENT IN A SWITCHING REGULATOR

In one embodiment, a current sensing circuit includes a differential current sensing amplifier adapted for sensing a voltage drop across a main transistor, the differential current sensing amplifier being adapted for providing a switched current output to a timing circuit which is adapted for providing a timing signal to one or more switching current sample-and-hold circuits based on a current waveform of the switched current output, and the one or more switching current sample-and-hold circuits, each of which are adapted for producing a substantially continuous output current. In another embodiment, a method for detecting a current includes driving a main transistor with a first current, driving one or more sensing transistors with a second current, measuring a sensing inductor current of the one or more sensing transistors, and determining the first current based on the sensing inductor current, wherein the sensing inductor current is related to the first current. 1. A current sensing circuit , comprising:a differential current sensing amplifier adapted for sensing a voltage drop across a main transistor, the differential current sensing amplifier being adapted for providing a switched current output to a timing circuit;the timing circuit, wherein the timing circuit is adapted for providing a timing signal to one or more switching current sample-and-hold circuits based on a current waveform of the switched current output; andthe one or more switching current sample-and-hold circuits, each of the one or more switching current sample-and-hold circuits being adapted for producing a substantially continuous output current.2. The current sensing circuit as recited in claim 1 , wherein the differential current sensing amplifier comprises:the main transistor; andone or more sensing transistors, each sensing transistor being adapted for providing a sensing inductor current.3. The current sensing circuit as recited in claim 2 , wherein the main transistor and each of the ...

Switching-Mode Power Supply with Ripple Mode Control and Associated Methods

The present invention discloses a SMPS. The SMPS comprises an output port, configured to supply a load; a control signal generator, having an input and an output configured to provide a first control signal; a first switch configured to receive the first control signal and regulate the voltage at the output port; and a ramp signal generator, comprising an input and an output, wherein the input is configured to receive the control signal and the output is configured to provide a current signal simulating an output signal at the output port, and wherein the output of the ramp signal generator is further coupled to the input of the means for generating control signal. 1. A switching-mode power supply (SMPS) , comprising:an output port configured to supply a load;a control signal generator having an input and an output, wherein the output is configured to provide a first control signal;a first switch configured to receive the first control signal, wherein the first switch is configured to regulate an output voltage at the output port; anda ramp signal generator comprising an input and an output, wherein the input of the ramp signal generator is configured to receive the control signal, wherein the output of the ramp signal generator is configured to provide a current signal in accordance with the control signal, and wherein the output of the ramp signal generator is coupled to the input of the control signal generator.2. The SMPS of claim 1 , wherein the current signal simulates an output signal at the output port.3. The SMPS of comprising a buck converter claim 1 , wherein the current signal simulates an output inductor current when the output inductor current decreases.4. The SMPS of claim 1 , wherein the output of the ramp signal generator is coupled to a resistor module configured to generate a ramp voltage signal claim 1 , and wherein the ramp voltage signal is coupled to the input of the control signal generator.5. The SMPS of claim 1 , further comprising a ...

Determining Interwell Communication

There is provided a system and method for determining interwell communication in a hydrocarbon-producing field that has a plurality of wells. An exemplary method comprises determining communication relationships for the plurality of wells using a multivariate dynamic joint analysis algorithm based on data representing properties of each of the plurality of wells. The multivariate dynamic joint analysis algorithm may employ a self-response of each of the plurality of wells and an interwell response between combinations of the plurality of wells. Data representative of the communication relationships is provided. 1. A method for determining interwell communication in a hydrocarbon-producing field that has a plurality of wells , the method comprising:determining communication relationships for the plurality of wells using a multivariate dynamic joint analysis algorithm based on data representing properties of each of the plurality of wells, the multivariate dynamic joint analysis algorithm employing a self-response of each of the plurality of wells and an interwell response between combinations of the plurality of wells; andproviding data representative of the communication relationships.2. The method recited in claim 1 , wherein the self-response comprises a pressure-rate response.3. The method recited in claim 1 , comprising solving for the self-response of each of the plurality of wells and the interwell responses using a cost function.4. The method recited in claim 1 , wherein the data representative of the communication relationships comprises a superposition based on the self-response of each of the plurality of wells and the interwell response between combinations of the plurality of wells.5. The method recited in claim 1 , comprising calculating a model system response based on the self-response of each of the plurality of wells and the interwell response between combinations of the plurality of wells.6. The method recited in claim 1 , wherein determining ...

BLADE SERVER

A blade server includes a casing, a plurality of blade modules, and a function module. The casing has a first end and a second end being opposite to each other. The blade modules are configured on the first end of the casing, and may be moved in or moved out from the first end of the casing. Each blade module includes a first tray, a main board module, and a plurality of hard disk modules. The main board module is configured on the first tray. The hard disk modules are detachably disposed on the first tray, and are electrically connected to the main board module. The function module is configured on the second end of the casing, and may be moved in or moved out from the second end of the casing. 1. A blade server , comprising:a casing, comprising a first end and a second end being opposite to each other; a first tray;', 'a main board module, configured on the first tray; and', 'a plurality of hard disk modules, detachably disposed on the first tray, and electrically connected to the main board module; and, 'a plurality of blade modules, configured on the first end of the casing, being moved in or moved out from the first end of the casing, and each blade module comprisinga function module, configured on the second end of the casing, being moved in or moved out from the second end of the casing.2. The blade server according to claim 1 , wherein each hard disk module comprises:a transfer board, electrically connected to the main board module;a second tray, detachably disposed on the first tray; andat least one hard disk, disposed on the second tray, and electrically connected to the transfer board.3. The blade server according to claim 1 , wherein the second tray is moved in or moved out from the first end of the casing.4. The blade server according to claim 1 , wherein the blade module further comprises a hard disk backplane claim 1 , the main board module is placed on one side of the hard disk backplane claim 1 , the hard disk modules are placed on the other side of ...

IDENTIFICATION OF POWER SYSTEM EVENTS USING FUZZY LOGIC

A method for analyzing an electrical power system using fuzzy logic includes: (a) acquiring data representing a signal of interest of the power system; (b) analyzing the signal using at least one fuzzy logic rule; and (c) based on the analysis, detecting and classifying at least one power system event within the power system. 1. A method for analyzing an electrical power system using fuzzy logic , comprising:(a) acquiring data representing a signal of interest of the power system;(b) analyzing the data using at least one fuzzy logic rule; and(c) based on the analysis, detecting and classifying at least one power system event within the power system.2. The method of further comprising claim 1 , prior to step (b) claim 1 , segmenting the signal into a plurality of segments.3. The method of further comprising extracting selected features from the signal claim 2 , wherein the analysis is carried out on the extracted features.4. The method of wherein the fuzzy logic rules are arranged in a hierarchy of at least two levels.5. The method of wherein the fuzzy logic rules include:(a) phase level rules which are based on features extracted from a particular phase on the electric power system;(b) segment level rules which are evaluated using information from different phases; and(c) capture level rules which combine truth values obtained from one or more segments.6. The method of wherein the segment level rules are evaluated using features that are not associated with any single phase on the electric power system.7. The method of wherein the capture level rules are based on features that are common to all segments.8. The method of wherein the signal of interest is a derived parameter.9. The method of wherein the fuzzy logic rules comprise a plurality of selected rules claim 1 , wherein the selected rules are collectively determinative of a particular type of event.10. The method of wherein step (b) includes computing a confidence value which associates the signal with a ...

LED Driving System for Driving Multi-String LEDS and the Method Thereof

A LED driving system comprising: an input port to receive an input signal; a switch node to provide a switching signal; an energy storage component coupled between the input port and the switch node; a main switch coupled between the switch node and ground; n output lines coupled in parallel, and each output line having a first and second terminals, and wherein the first terminal is coupled to the switch node, and the second terminal is coupled the reference ground, and wherein each output line having an output switch, a diode and a LED string coupled in series between the first and second terminals, and wherein each output line having a capacitor coupled in parallel with the LED string; and a controller providing a control signal to the main switch and providing corresponding n control signals to the corresponding n output switches in the corresponding n output lines. 1. A LED driving system for driving multi-string LEDs , comprising:an input port configured to receive an input signal;a switch node configured to provide a switching signal;an energy storage component coupled between the input port and the switch node;a main switch coupled between the switch node and a reference ground;n output lines coupled in parallel, wherein n is a natural number, and each output line having a first terminal and a second terminal, and wherein the first terminal is coupled to the switch node, and the second terminal is coupled the reference ground, and wherein each output line having an output switch, a diode and a LED string coupled in series between the first and second terminals, and wherein each output line having a capacitor coupled in parallel with the LED string; anda controller configured to provide a control signal to the main switch and to provide corresponding n control signals to the corresponding n output switches in the corresponding n output lines.2. The LED driving system of claim 1 , wherein the turn-on order of the main switch and each of the corresponding output ...

Metal Layout of an Integrated Power Transistor and the Method Thereof

The present disclosure discloses a metal layout of an integrated power transistor. The metal layout comprises a 1metal layer, a 2metal layer, and a 3metal layer. The metal layout couples the 1metal layer to the 2metal layer through vias, and couples the 2metal layer to the 3metal layer through super vias. By such interconnection, the metallization resistance is highly reduced by using thick 2and 3metal layers. 1. A metal layout of an integrated power transistor , comprising:{'sup': st', 'nd', 'rd', 'st', 'nd', 'nd', 'rd, 'a 1metal layer, a 2metal layer, and a 3metal layer, wherein the 1metal layer is coupled to the 2metal layer through vias, while the 2metal layer is coupled to the 3metal layer through super vias.'}2. The metal layout of claim 1 , wherein the 2metal layer comprises a 1chess-shaped plane and a 2chess-shaped plane claim 1 , wherein either chess-shaped plane comprises holes claim 1 , wherein each hole has an island inside it.3. The metal layout of claim 2 , wherein the 1metal layer comprises metal stripe lines placed in parallel claim 2 , which are alternatively connected to source or the areas of individual power transistor cells.4. The metal layout of claim 3 , wherein the metal stripes are n-doped source regions or n-doped drain regions in a p-type well or substrate.5. The metal layout of claim 3 , wherein the metal stripes are p-doped source regions or p-doped drain regions in an n-type well or substrate.6. The metal layout of claim 3 , wherein{'sup': st', 'nd', 'st', 'nd', 'st, 'the 1chess-shaped plane of the 2metal layer connects to the stripes of the 1metal layer at drain potential, and the island of the 2metal layer connects to stripes of the 1metal layer at source potential; and'}{'sup': nd', 'nd', 'st', 'nd', 'st, 'the 2chess-shaped plane of the 2metal layer connects to the stripes of the 1metal layer at source potential, and the island of the 2metal layer connects to the stripes of the 1metal layer at drain potential.'}7. The metal layout of ...

DELAY CIRCUIT AND ASSOCIATED METHOD

The embodiments of the present invention disclose a delay circuit. The delay circuit comprises an inverter, a load capacitor, and a first voltage clamping module, wherein the first voltage clamping module generates a voltage drop configured to prolong the propagation delay time of the delay circuit as the power supply voltage decreases. The power supply dependent delay circuit may have a much larger propagation delay time at low power supply voltage than it at high power supply voltage at the rising-edge or falling-edge of an input signal. 1. A delay circuit , comprising:an inverter, having an input end, an output end, and power supply end and a ground end, wherein the input end is coupled to an input signal and wherein the output end is configured to provide an output signal;a load capacitor, coupled between the output end of the inverter and a reference ground;a first voltage clamping module, coupled between a power supply voltage and the power supply end of the inverter, or coupled between the ground end of the inverter and the reference ground, wherein the first voltage clamping module generates a voltage drop when a current flows through the first voltage clamping module, and wherein the first voltage clamping module is configured to prolong the propagation delay time of the delay circuit as the power supply voltage decreases.2. The delay circuit according to claim 1 , wherein the inverter comprises a complementary metal oxide semiconductor (CMOS) inverter.3. The delay circuit according to claim 2 , wherein the load capacitor comprises a parasitic capacitor of the CMOS inverter.4. The delay circuit according to claim 1 , wherein the power supply voltage is at a low level claim 1 , a total propagation delay time of the delay circuit at rising-edge or falling edge of the input signal is 5-to-20 times larger than that of a CMOS inverter delay circuit.5. The delay circuit according to claim 1 , wherein the voltage clamping module is a diode-connected metal-oxide ...

HOLDER OF A PORTABLE ELECTRIC DEVICE

A holder of a portable electric device includes a main body formed integrally. The main body has an intermediate portion formed with a recessed wire-collecting portion, having one end provided with a holding portion having an outer wall disposed with a crevice and a wire-positioning hole bored under the crevice, and another end formed with a clamping portion having an outer wall cut with a clamping opening, a crevice, and a wire-positioning hole bored inside the crevice. Thus, the clamping opening can clamp the portable electric device and the holding portion can be fixed on a table top to have the portable electric device positioned obliquely at an appropriate angle for facilitating browsing and operating. Further, the wires of the portable electric device or of its peripheral products can be positioned in the wire-collecting holes and orderly wound on the wire-collecting portion. 1. A holder of a portable electric device comprising a bar-shaped main body formed integrally , said main body having an intermediate portion formed with a recessed wire-collecting section , said main body having one end provided with a holding portion , said holding portion having an outer wall cut with a crevice , a wire-positioning hole bored under said crevice , said main body having another end provided with a clamping portion , said clamping portion having an outer wall cut with a clamping opening , a crevice , and a wire-positioning hole. bored inside said crevice2. The holder of a portable electric device as claimed in claim 1 , wherein said main body is made of soft gelatinous substance.3. The holder of a portable electric device as claimed in claim 1 , wherein said holding portion of said main body has an outer edge provided with a hanging hole. 1. Field of the InventionThis invention relates to a holder of a portable electric device, particularly to one formed integral with a bar-shaped main body having an intermediate portion formed with a recessed wire-collecting section. The ...

LARGE LANGUAGE MODELS IN MACHINE TRANSLATION

Systems, methods, and computer program products for machine translation are provided. In some implementations a system is provided. The system includes a language model including a collection of n-grams from a corpus, each n-gram having a corresponding relative frequency in the corpus and an order n corresponding to a number of tokens in the n-gram, each n-gram corresponding to a backoff n-gram having an order of n−1 and a collection of backoff scores, each backoff score associated with an n-gram, the backoff score determined as a function of a backoff factor and a relative frequency of a corresponding backoff n-gram in the corpus. 1. A system comprising: a collection of n-grams from a corpus, each n-gram having a corresponding relative frequency in the corpus and an order n corresponding to a number of tokens in the n-gram, each n-gram corresponding to a backoff n-gram having an order of n−1; and', 'a collection of backoff scores, each backoff score associated with an n-gram, the backoff score determined as a function of a backoff factor and a relative frequency of a corresponding backoff n-gram in the corpus., 'a language model including2. The system of claim 1 , where the backoff factors comprise a constant penalty value.3. The system of claim 1 , where the backoff factors depend on the n-gram order.4. The system of claim 3 , where the backoff factors are derived using a number of n-grams of each order occurring within sample data.5. The system of claim 1 , where the backoff factors are derived using discriminative training of the translation model.6. The system of claim 5 , where indicator feature functions are used to identify the backoff factors.7. A method comprising: identifying a collection of n-grams from a corpus of training data, each n-gram of the collection having a corresponding relative frequency of occurring in the corpus and an order n corresponding to a number of tokens in the n-gram, each n-gram corresponding to a backoff n-gram having an order ...

Method for Correcting Orientation of Magnetometer

A method for correcting an orientation of a magnetometer includes obtaining current position information through a global positioning system. A geomagnetic inclination angle list is queried according to the current position information to acquire a geomagnetic inclination angle δ corresponding to a current position. A deviation Δψ of an orientation is calculated according to the geomagnetic inclination angle δ and correcting the orientation is corrected based on the deviation Δψ of the orientation. 112-. (canceled)13. A method for correcting an orientation of a magnetometer , the method comprising:obtaining current position information through a global positioning system;querying a geomagnetic inclination angle list according to the current position information to acquire a geomagnetic inclination angle corresponding to a current position;calculating a deviation of an orientation according to the geomagnetic inclination angle; andcorrecting the orientation based on the deviation of the orientation.14. The method according to claim 13 , wherein before obtaining the current position information claim 13 , the method further comprises:obtaining the geomagnetic inclination angle list from a server, wherein the server updates the geomagnetic inclination angle list in real time.15. The method according to claim 13 , wherein obtaining the current position information through the global positioning system comprises periodically triggering the obtaining the current position information through the global positioning system.16. The method according to claim 13 , wherein after obtaining the current position information claim 13 , the method further comprises:comparing the current position information with existing position information; andquerying the geomagnetic inclination angle list according to the current position information if a difference between the current position information and the existing position information exceeds a preset range; andending the process of ...

System and method of securing sharing of resources which require consent of multiple resource owners using group uri's

In accordance with various embodiments, services gatekeeper systems and methods allow mapping and protecting communication services APIs with OAuth and group access to user information. Such a system can include a plurality of applications, executing on one or more application servers. The services gatekeeper is operable to define a group of members using a group URI, intercept requests for access to communication services APIs, obtain authorization from a group owner for access to a specified communication services API for each member of the group, and enable access to the specified communication services API of each member of the group in accordance with the scope authorized by the group owner.

WATER-PROOF STRUCTURE PROVIDED WITH INTERNAL BAROMETER FOR TERMINAL DEVICE AND METHOD FOR CONTROLLING A WATER-PROOF STRUCTURE

A water-proof structure has an internal barometer for a terminal device. The water-proof structure is an internal cavity of the terminal device. The water-proof structure is provided with an opening on a casing of the terminal device. Abarometer is arranged inside the water-proof structure. A water drop detection device is arranged between a water-proof mesh net and the barometer. The water drop detection device is electrically connected to a control valve, and when a water volume detected by the water drop detection device reaches a water volume threshold value, the control valve is closed. 18-. (canceled)9. A water-proof structure provided with an internal barometer for a terminal device , wherein the water-proof structure is an internal cavity of the terminal device , the water-proof structure is provided with an opening on a casing of the terminal device so that a barometric pressure inside the water-proof structure is communicated with an external barometric pressure , the water-proof structure comprising:a barometer arranged inside the water-proof structure;a dust-proof net arranged between the opening and the barometer;a water-proof mesh net is arranged between the dust-proof net and the barometer;a water drop detection device arranged between the water-proof mesh net and the barometer; anda control valve arranged between the water drop detection device and the barometer, wherein the water drop detection device is electrically connected to the control valve and is configured to cause the control valve to close when a water volume detected by the water drop detection device reaches a water volume threshold value.10. The water-proof structure according to claim 9 , wherein the control valve comprises two ferromagnetic clapboards and an electromagnet claim 9 ,wherein the two ferromagnetic clapboards are symmetrically fixed on an inner cavity wall of the internal cavity, and the electromagnet is arranged on the same side as the two ferromagnetic clapboards; ...

SERVER RACK SYSTEM AND SERVER

The server rack system includes multiple the servers, a central power supply module and an integrated network controller module. Each of the servers includes a case, multiple motherboard modules and a connector module. The case has an accommodating space. The motherboard modules are disposed side by side in the accommodating space. Each of the motherboard modules has a power port and a network portal. The connector module has a power distribution circuit and a network distribution unit. The power distribution circuit is electrically connected to each of the power ports. The network distribution unit is connected to each of the network portals. The power distribution circuit is electrically connected to the central power supply module. The network distribution unit is connected to the integrated network controller module for managing the data exchange information between each of the motherboard modules and the integrated network controller module. 1. A server rack system , comprising:a plurality of servers horizontally disposed in a rack;a central power supply module configured for obtaining a power from the exterior power source and distributing the power to the servers respectively; andan integrated network controller module configured for communicating the network information of the servers respectively;wherein each of the servers comprises:a case having an accommodating space and a first lateral side;a plurality of motherboard modules disposed in the accommodating space side by side, each of the motherboard modules having a power port and a network port; anda connector module having a power distribution circuit and a network distribution unit, wherein the connector module being pluggably disposed on the first lateral side of the case, the power distribution circuit being electrically connected to the power ports of the motherboard modules, the network distribution unit being connected to the network ports of the motherboard modules;wherein the central power ...

STORAGE SERVER RACK SYSTEM AND STORAGE SERVERS

A storage server rack system includes a rack and multiple storage servers assembled inside the rack. The rack includes an integrated power module and a fan wall. The integrated power module distributes a power to the storage servers. The fan wall is disposed by a side of the storage servers for dissipating heat. Each storage server includes a case, an electrical connection module, a motherboard and multiple storage units. The case has a first lateral side and a second lateral side disposed oppositely to each other. The electrical connection module is disposed on the first lateral side and connected to the integrated power module. The motherboard is disposed inside a first heat dissipation space in the case and electrically connected to the electrical connection module. The storage units are disposed outside the first heat dissipation space in the case and electrically connected to the electrical connection module. 1. A storage server rack system , comprising:a rack comprising an integrated power module and a fan wall; and a case having a first lateral side and a second lateral side disposed oppositely to each other, a direction from the first lateral side to the second lateral side being defined as a first direction, the fan wall being configured for extracting an air current from the case oppositely along the first direction or blowing an air current toward the inside of the case along the first direction;', 'an electrical connection module disposed on the first lateral side of the case and connected to the integrated power module;', 'a motherboard disposed inside a first heat dissipation space in the case and electrically connected to the electrical connection module, the first heat dissipation space extending from the first lateral side toward the second lateral side along the first direction; and', 'a plurality of storage units disposed outside the first heat dissipation space in the case and electrically connected to the electrical connection module which is ...

SERVER

A server, for being disposed in a server cabinet removably, includes a shell, a mother board, a power input port and a connecting element. The mother board is disposed in the shell. The power input port, disposed on the shell, is electrically connected to the mother board. The power input port is used for inputting power to the mother board. The connecting element is disposed on the power input port and electrically connected to the mother board. The connecting element is used for making the mother board communicate with a rack management controller so the rack management controller determines the position of the server in the server cabinet according to the communication. With the server removed from the server cabinet, the power input port and the connecting element are separated from the electrically conductive component and the one of the connectors, respectively, to stop the electrical connection. 1. A server , for being disposed in a server cabinet removably , the server cabinet comprising a power supply , an electrically conductive component , a rack management controller and a signal connecting base , the power supply being electrically connected to the conductive component , the rack management controller being electrically connected to the signal connecting base , the signal connecting base including a plurality of connectors , the server comprising:a shell;a mother board disposed in the shell;a power input port disposed on a side of the shell and electrically connected to the mother board, wherein the power input port is used for being electrically connected to the electrically conductive component to input power to the mother board; anda connecting element disposed on the power input port and electrically connected to the mother board, wherein the connecting element is used for being connected to one of the connectors to make the mother board communicate with the rack management controller such that the rack management controller determines the position ...

SERVER SYSTEM

A server system includes a rack, multiple servers, an electrically conductive component, a switch, a rack management controller and a power supply. The rack has a first storage area, a middle storage area and a second storage area. The servers are positioned in the first storage area and the second storage area. The electrically conductive component is installed inside the rack and includes a first power supply part disposed in the first storage area and a second power supply part disposed in the second storage area. The switch is installed in the middle storage area. The rack management controller is installed in the middle storage area. The power supply, installed in the middle storage area, is electrically connected to the rack management controller and the switch which is disposed farther away from the electrically conductive component than the power supply. 1. A server system , comprising:a rack having a first storage area, a middle storage area and a second storage area, the middle storage area being disposed between the first storage area and the second storage area;a plurality of servers positioned in the first storage area and the second storage area;an electrically conductive component installed inside the rack, the electrically conductive component comprising a first power supply part and a second power supply part, wherein the first power supply part is disposed in the first storage area and the second power supply part is disposed in the second storage area;a switch installed in the middle storage area;a rack management controller installed in the middle storage area; anda power supply installed in the middle storage area, wherein the power supply is electrically connected to the rack management controller and the switch respectively, and wherein the power supply is disposed between the switch and the rack management controller, and the switch is disposed farther away from the electrically conductive component than the power supply, and wherein the ...

SERVER AND HOST MODULE THEREOF

A server comprises a cabinet and a host module placed inside or taken outside the cabinet along a rail. The host module comprises a supporting tray, a motherboard, a system storage device, a processing module and a stored data controlling module. The motherboard and the system storage device are disposed in the supporting tray and are electrically connected with each other. The processing module for executing an operating system stored in the system storage device is electrically connected to the system storage device via the motherboard. The stored data controlling module is disposed in the supporting tray and electrically connected to the motherboard. When the host module is placed inside the cabinet, the stored data controlling module is electrically connected to a data storage device. The stored data controlling module is controlled by the processing module to access data from or store data in the data storage device. 1. A server , comprising: a frame;', 'a rail disposed inside the frame; and', 'a data storage device accommodating rack disposed inside the frame, the data storage device accommodating rack being adapted to accommodate a data storage device; and, 'a cabinet, comprising a supporting tray;', 'a motherboard disposed in the supporting tray;', 'a system storage device disposed in the supporting tray and electrically connected to the motherboard, the system storage device being adapted to store an operating system;', 'a processing module disposed on the motherboard and electrically connected to the system storage device via the motherboard, the processing module being adapted to run the operating system; and', 'a stored data controlling module disposed in the supporting tray and electrically connected to the motherboard, when the host module is inserted in the cabinet, the stored data controlling module is electrically connected to the data storage device, and the stored data controlling module is controlled by the processing module to access data from ...

SERVER

A server comprises a frame, a middle plate fixed inside the frame, a vertical plate vertically erected on the middle plate and electrically connected to the middle plate, a mainframe detachably disposed inside the frame, a hard disk module and a power supply detachably disposed inside the frame. The vertical plate comprises a first electrical connector. The mainframe comprises a second electrical connector. The second electrical connector is electrically connected to the first electrical connector. The hard disk module can be detachably disposed inside the frame and electrically connected to the middle plate so that the hard disk module can transmit data to the mainframe via the middle plate and the vertical plate. The power supply is disposed below the mainframe and electrically connected to the middle plate so that the power supply can transmit electric current to the mainframe via the middle plate and the vertical plate. 1. A server , comprising:a frame comprising a bottom plate and two lateral plates disposed by two opposite sides of the bottom plate;a middle plate flatly disposed on the bottom plate;a vertical plate vertically erected on the middle plate and electrically connected to the middle plate, the vertical plate comprising at least one first electrical connector;at least one mainframe detachably disposed inside the frame, the at least one mainframe comprising a second electrical connector, the second electrical connector being electrically connected to the first electrical connector;a hard disk module detachably disposed inside the frame and electrically connected to the middle plate so that the hard disk module is capable of transmitting data to the mainframe via the middle plate and the vertical plate; anda power supply detachably disposed inside the frame, the power supply being disposed below the mainframe and electrically connected to the middle plate so that the power supply is capable of transmitting electric current to the mainframe via the ...

STORAGE SERVE

A storage server includes a cage, a midplane fixed on the cage, a fan module on midplane, at least one host, detachably disposed on the cage and electrically connected to the midplane, a plurality of HDD backplanes, detachably disposed on the cage and electrically connected to the midplane, and a plurality of data HDDs, detachably disposed on the cage and electrically connected to the HDD backplanes. The host can be detached from the cage along a first direction. The HDD backplanes can be detached from the cage along a second direction opposite to the first direction. The data HDDs and the host are respectively located at two opposite sides of the fan module, the data HDDs can be detached from the cage along a third direction intersected with the second direction and the first direction. 1. A storage server , comprising:a cage;a midplane, fixed on the cage;a fan module, disposed on the cage, and located on the midplane;at least one motherboard module, detachably disposed on the cage, and electrically connected to the midplane, the at least one motherboard module being detached from the cage along a first direction leaving the midplane;a plurality of HDD backplanes, detachably disposed on the cage, and electrically connected to the midplane, the HDD backplanes being detached from the cage along a second direction leaving the midplane, and the second direction being opposite to the first direction; anda plurality of data HDDs, divided into a plurality of groups, and detachably disposed on the cage, wherein each group of the data HDDs is respectively electrically connected to one of the HDD backplanes, the data HDDs and the at least one motherboard module are respectively located at two opposite sides of the fan module, the data HDDs are detached from the cage along a third direction leaving the HDD backplanes, and the third direction is intersected with the second direction and the first direction.2. The storage server according to claim 1 , wherein the third ...

Storage server system

A storage server system includes a cage, a midplane, a power supply module, a motherboard module, an HDD backplane, and a data HDD. The cage has a first end and a second end. The midplane is fixed inside the cage. The power supply module is disposed inside the cage. The motherboard module is disposed inside the cage and closer to the first end than the midplane. The HDD backplane is detachably disposed inside the cage. The HDD backplane is closer to the second end than the midplane. The data HDD is detachably disposed inside the cage. After the data HDD and the HDD backplane are detached from each other, the HDD backplane is detached from the cage along a detaching direction towards the second end and away from the first end.

SERVER SYSTEM

A server system includes a rack, a server disposed in the rack, an electronic device and a power supply disposed in the rack. The rack includes a first side and a second side opposite to each other, two first brackets, two second brackets and two lateral rails. Each first brackets, disposed at the first side, includes a heat-dissipation part. Each heat-dissipation part includes at least one ventilating perforation. The second brackets are disposed at the second side. The electronic device is disposed between the lateral rails and at the first side. The power supply is disposed between the two lateral rails and at the second side and includes a main body and at least one fan. The main body includes a plurality of through openings facing the ventilating perforations. The at least one fan draws airstreams from the ventilating perforations via the through openings. 1. A server system , comprising: two first brackets disposed at the first side thereof, each of the first brackets including a heat-dissipation part, and each of the heat-dissipation parts including at least one ventilating perforation;', 'two second brackets disposed at the second side thereof; and', 'two lateral rails, wherein two opposite ends of one of the lateral rails are fixed to one of the first brackets and one of the second brackets, respectively, and wherein two opposite ends of the other lateral rail are fixed to the other first bracket and the other second bracket, respectively;, 'a rack including a first side and a second side opposite to each other, the rack comprisingat least one server disposed in the rack;an electronic device disposed between the two lateral rails as well as at the first side, wherein the electronic device is electrically connected to each server; anda power supply disposed between the two lateral rails, wherein the power supply keeps a distance from the electronic device, and the power supply is farther away from the first side of the rack than the electronic device, and ...

SERVER CABINET

A server cabinet, for containing a removable server including a power input port and a connecting element, includes a container, an electrically conductive component, a power supply, a signal connecting base and a rack management controller. The electrically conductive component is connected to the power input port. The power supply is connected to the electrically conductive component to supply power. The signal connecting base includes connectors connected to the connecting element. With the server removed, the power input port and the connecting element are separated from the electrically conductive component and the connector, respectively. The rack management controller is electrically connected to the signal connecting base. With the connecting element electrically connected to the connector, the rack management controller communicates with the server via the connecting element and the one connector and determines the position of the server according to the position of the connector connected to the server. 1. A server cabinet for containing a removable server , the server comprising a power input port and a connecting element , the server cabinet comprising:a container;an electrically conductive component fixed in the container and for being electrically connected to the power input port;a power supply disposed in the container, and wherein the power supply is electrically connected to the electrically conductive component to supply direct current power;a signal connecting base fixed in the container, the signal connecting base including multiple connectors, wherein one of the connectors is corresponding to the connecting element and is used for being electrically connected to the connecting element, and wherein with the server removed from the container, the power input port and the connecting element are separated from the electrically conductive component and the one of the connectors, respectively; anda rack management controller disposed in the container ...

SERVER SYSTEM

A server system includes a rack, at least one server, a power supply, a network switch device and a power cable and. The rack has a front side and a rear side disposed oppositely. The rack defines an upper area, a middle area and a lower area. The middle area is disposed between the upper and the lower area. The servers are detachably disposed in the upper or the lower area. Each server having a power input port. The power supply is disposed in the middle area and adjacent to the front side. The network switch device is disposed in the middle area and stacked with the power supply. A gap is disposed between the network switch device and the power supply. The power cable penetrates through the gap to the front side. The power supply converts an external alternating current from the power cable to the server. 1. A server system , comprising:a rack having a front side and a rear side disposed oppositely to each other, wherein the rack defines an upper area, a middle area and a lower area, and the middle area is disposed between the upper area and the lower area;several servers detachably disposed in the upper area or the lower area inside the rack, and each server having a power input port;a power supply disposed in the middle area inside the rack and adjacent to the front side of the rack;a network switch device disposed in the middle area inside the rack and stacked with the power supply, wherein the network switch device is kept a distance from the power supply so that a gap is disposed between the network switch device and the power supply; anda power cable penetrating through the gap to the front side of the rack and being electrically connected to the power supply from a front side of the power supply, wherein the power cable is used for transmitting an external alternating current, and the power supply is used for converting the alternating current into a direct current, and wherein the power supply is electrically connected to the power input port of each ...

RACK SERVER SYSTEM

A rack server system includes a container, an electrically conductive component, a power supply, a signal connecting base, a server, and an RMC. The electrically conductive component and the signal connecting base are fixed in the container. The power supply is electrically connected to the electrically conductive component for supplying a direct current power. The signal connecting base includes multiple connectors. The server, disposed in the container removably, includes a power input port and a connecting element. The power input port is electrically connected to the electrically conductive component removably. The connecting element is connected to the connector removably. When the connecting element is electrically connected to the connector, the RMC communicates with the server via the connecting element and the one of the connectors and determines the position of the server in the container according to another position of the connector which is electrically connected to the server. 1. A rack server system , comprising:a container;an electrically conductive component fixed in the container;a power supply disposed in the container, wherein the power supply is electrically connected to the electrically conductive component for supplying a direct current power;a signal connecting base fixed in the container, the signal connecting base including multiple connectors;a server disposed in the container in a removable way, wherein the server comprises a power input port and a connecting element, and wherein the power input port is electrically connected to the electrically conductive component in the removable way, and wherein the connecting element is connected to one of the connectors in the removable way, and wherein with the server removed from the container, the power input port and the connecting element are separated from the electrically conductive component and the one of the connectors, respectively, and with the server installed into the container, the ...

Terminal

A terminal, where the terminal includes a conductive sheet configured to form a capacitor with a hand when the hand holds the terminal, and a processor, connected to the conductive sheet, where the processor is configured to detect a capacitance of the capacitor, and determine a holding gesture for the terminal according to the detected capacitance and a preset correspondence between a capacitance and a holding gesture, and the conductive sheet is disposed in the terminal, and when the hand holds the terminal, the conductive sheet forms a capacitor with the hand. When the terminal is held using different holding gestures, capacitances of capacitors formed between the conductive sheet in the terminal and the hand are different, and a correspondence between a capacitance and a holding gesture is preset using this difference. 1. A terminal , comprising:at least one conductive sheet configured to form at least one capacitor with a hand when the hand holds the terminal; and detect a capacitance of the capacitor; and', 'determine a holding gesture for the terminal according to the detected capacitance and a preset correspondence between a capacitance and a holding gesture., 'a processor connected to the at-least-one-conductive sheet and configured to;'}2. The terminal according to claim 1 , wherein the at least one conductive sheet comprises a first conductive sheet and a second conductive sheet claim 1 , located on or near a left side and a right side of the terminal respectively; wherein the conductive sheet being configured to form at least one capacitor with the hand when the hand holds the terminal claim 1 , wherein when the hand holds the terminal claim 1 , the first conductive sheet and the second conductive sheet form a first capacitor and a second capacitor with the hand respectively claim 1 , wherein the processor is separately connected to the first conductive sheet and the second conductive sheet claim 1 , and wherein the processor is further configured to: ...

ALIGNMENT MASK, METAL MASK ASSEMBLY, AND PREPARATION METHOD THEREFOR

Disclosed are an alignment mask, a metal mask assembly, and a preparation method therefor. The alignment mask includes a mask body. The mask body includes: multiple alignment holes; and, separating parts surrounding at least some alignment holes and used for separating the areas at where the at least some alignment holes are located from other areas, where the separation parts include at least one semi-etched line. 118.-. (canceled)19. An align mask , comprising a mask body , wherein the mask body comprises:a plurality of align holes; andan isolation part, enclosing at least part of the align holes and isolating an area, where the at least part of the align holes are arranged, from other areas;wherein the isolation part comprises one or more half-etch lines.20. The align mask according to claim 19 , whereinthe mask body is strip-shaped, a retention area,', 'two cut-out areas arranged at two ends of the retention area; and', 'two cut-out half-etch lines respectively arranged at junctions between the two cut-out areas and the retention area; and, 'the mask body comprisesthe two cut-out half-etch lines extend in a first direction which is the same as an extending direction of short edges of the mask body.21. The align mask according to claim 20 , wherein the plurality of align holes are arranged in the retention area claim 20 , are close to a first long edge of the mask body and are arrayed along the first long edge.22. The align mask according to claim 21 , wherein two fine align holes close to the two cut-out half-etch lines respectively, and', 'coarse align holes arranged between the two fine align holes;, 'the plurality of align holes compriseeach of the two cut-out half-etch lines is provided with a first part, and a projection of one of the two fine align holes close to the each cut-out half-etch line, on the each cut-out half-etch line, is arranged in the first part; andthe first long edge is provided with two second parts corresponding to the two fine align ...

MASK, METHOD FOR FABRICATING MASK AND DRIVE-BACKPLANE MOTHERBOARD

Provided is a mask, including: a plurality of mask pattern regions, a transition region disposed between the plurality of mask pattern regions, and a mask marginal region surrounding the plurality of mask pattern regions and the transition region; wherein the transition region includes at least one first half-etched sub-region with a thickness less than a thickness of the mask marginal region. 1. A mask , comprising a plurality of mask pattern regions , a transition region disposed between the plurality of mask pattern regions , and a mask marginal region surrounding the plurality of mask pattern regions and the transition region;wherein the transition region comprises at least one first half-etched sub-region with a thickness less than a thickness of the mask marginal region.2. The mask according to claim 1 , wherein a ratio of the thickness of the first half-etched sub-region to the thickness of the mask marginal region is greater than or equal to 20% and less than or equal to 50%.3. The mask according to claim 2 , wherein the thickness of the first half-etched sub-region is greater than or equal to 20 microns and less than or equal to 50 microns.4. The mask according to claim 1 , wherein each of the mask pattern regions comprises a plurality of drive-backplane mask patterns claim 1 , a minimum distance between the first half-etched sub-region and the drive-backplane mask patterns being greater than 1 millimeter.5. The mask according to claim 1 , wherein among the plurality of mask pattern regions claim 1 , at least two first half-etched sub-regions are arranged in the transition region between a first mask pattern region and a second mask pattern region claim 1 , the at least two first half-etched sub-regions being arranged along an arrangement direction of the first mask pattern region and the second mask pattern region.6. The mask according to claim 1 , wherein among the plurality of mask pattern regions claim 1 , at least two first half-etched sub-regions are ...

ELONGATE SiC FUEL ELEMENTS

An elongate fuel element is described that has a silicon carbide cladding enclosing a fuel, such as UO2, wherein the fuel is dimensioned relative to the cladding to define gaps at each lateral end of the enclosure sufficiently large such that upon swelling in use, the fuel does not increase the strain on the cladding beyond the limits of the claddings strain tolerance. The lateral gaps at the ends of the fuel allow lateral expansion during swelling that reduces the strain on the cladding.

HIGH ASPECT RATIO GATES

Embodiments are directed to a method of forming a feature of a semiconductor device. In one or more embodiments, the feature is a gate, and the method includes forming a substrate and forming a gate material extending over a major surface of the substrate. The method further includes forming a trench extending through the gate material and into the substrate in a first direction, wherein the trench further extends through the gate material and the substrate in a second direction. The method further includes filling the trench with a fill material and forming individual gates from the gate material, wherein the individual gates extend along a third direction. 1. A method of forming a feature of a semiconductor device , the method comprising:forming a substrate;forming a feature material extending over a major surface of the substrate;forming a trench having at least one inner sidewall and extending through the feature material and into the substrate in a first direction, wherein the trench further extends through the feature material and the substrate in a second direction;filling the trench with a fill material such that the fill material extends along and physically couples to at least a portion of the at least one inner trench sidewall; andforming individual feature structures from the feature material;wherein each of the individual feature structures comprises:a first sidewall having a height (H) dimension extending along a first direction;a second sidewall formed from a portion of the at least one inner trench sidewall and having a thickness (T) dimension extending along a second direction; anda third sidewall having a length (L) dimension extending along a third direction;where T is less than H;wherein the fill material is physically coupled to the second sidewall of each of the individual feature structures.2. The method of claim 1 , wherein:the feature comprises a gate;the feature material comprises a gate material; andthe feature structure comprises a gate ...

HIGH ASPECT RATIO GATES

Embodiments are directed to a method of forming a feature of a semiconductor device. In one or more embodiments, the feature is a gate, and the method includes forming a substrate and forming a gate material extending over a major surface of the substrate. The method further includes forming a trench extending through the gate material and into the substrate in a first direction, wherein the trench further extends through the gate material and the substrate in a second direction. The method further includes filling the trench with a fill material and forming individual gates from the gate material, wherein the individual gates extend along a third direction. 1. A semiconductor structure comprising:a first trench extending into a substrate in a first direction and a second direction, wherein the first direction is substantially perpendicular to the second direction;a first anchor formed in the first trench;a top portion of the first anchor extending above a major surface of the substrate; andindividual feature structures formed over the major surface of the substrate;wherein the individual features structures extend along a third direction;wherein each of the individual feature structures is physically coupled to the top portion f the first anchor.2. The structure of further comprising a second trench extending into the substrate in the first direction and the second direction.3. The structure of further comprising a second anchor formed in the second trench.4. The structure of further comprising a top portion of the second anchor extending above the major surface of the substrate.5. The structure of claim 4 , wherein each of the individual feature structures is physically coupled to the top portion of the second anchor.6. The structure of claim 5 , wherein a distance from the first trench to the second trench in the third direction matches a selected length dimension of each of the individual feature structures.7. The structure of claim 6 , wherein the length ...

STRAINED AND UNSTRAINED SEMICONDUCTOR DEVICE FEATURES FORMED ON THE SAME SUBSTRATE

Embodiments of the invention are directed to a configuration of semiconductor devices having a substrate and a first feature formed on the substrate, wherein the first feature includes a first preserve region having compressive strain that extends throughout the first preserve region, and wherein the first feature further includes a cut region comprising a dielectric. 1. A configuration of semiconductor devices comprising:a substrate; anda first feature formed on the substrate;wherein the first feature comprises a first preserve region having compressive strain that extends throughout the first preserve region;wherein the first feature further comprises a first cut region comprising a dielectric.2. The semiconductor devices of further comprising a second feature formed on the substrate.3. The semiconductor devices of claim 2 , wherein the second feature comprises a second preserve region having substantially no compressive strain.4. The semiconductor devices of claim 1 , wherein the first feature comprises a first fin.5. The semiconductor devices of claim 4 , wherein the first preserve region comprises a channel region of the first fin.6. The semiconductor devices of claim 5 , wherein the second feature comprises a second fin.7. The semiconductor devices of claim 6 , wherein the second preserve region comprises a channel region of the second fin.8. The semiconductor devices of further comprising a first gate formed over the channel region of the first fin.9. The semiconductor devices of further comprising a second gate formed over the channel region of the second fin.10. The semiconductor devices of claim 3 , wherein the substrate comprises silicon.11. The semiconductor devices of claim 10 , wherein the first preserve region comprises silicon germanium.12. The semiconductor devices of claim 11 , wherein the dielectric of the first cut region comprises an oxide.13. The semiconductor devices of claim 12 , wherein the second preserve region comprises silicon.14. A ...

FORMING FINS UTILIZING ALTERNATING PATTERN OF SPACERS

A method of forming a semiconductor structure includes forming a first pattern of alternating spacers of a first material and a second material on a semiconductor substrate, forming a second pattern of the alternating spacers of the first material and the second material by selectively removing at least a portion of at least one of one or more of the spacers of the first material and one or more of the spacers of the second material to form a remaining pattern of spacers of the first material and the second material on the semiconductor substrate, and transferring the second pattern of the spacers of the first material and the second material to the semiconductor substrate to form two or more fins in the semiconductor substrate by etching the semiconductor substrate selective to the first material and the second material. 1. A semiconductor structure , comprising:a substrate; andtwo or more fins formed in the substrate in a given pattern, each of the two or more fins having a pad layer formed on a top surface thereof and a spacer formed over a top of the pad layer;wherein the given pattern comprises alternating spacers of a first material and a second material with at least a portion of one of the spacers removed via a cut mask.2. The semiconductor structure of claim 1 , wherein a fin pitch between at least two of the fins is less than 30 nanometers.3. The semiconductor structure of claim 1 , wherein the first material comprises a nitride and the second material comprises an oxide.4. The semiconductor structure of claim 1 , wherein the substrate comprises one of bulk semiconductor and a semiconductor-on-insulator.5. The semiconductor structure of claim 1 , wherein the pad layer comprises silicon oxynitride.6. The semiconductor structure of claim 1 , wherein the pad layer comprises at least one of silicon carbide nitride claim 1 , silicon oxy carbide nitride and silicon boron carbide nitride.7. The semiconductor structure of claim 1 , wherein the first material ...

STRAINED AND UNSTRAINED SEMICONDUCTOR DEVICE FEATURES FORMED ON THE SAME SUBSTRATE

Embodiments are directed to a method of forming a feature of a semiconductor device. The method includes forming the feature from a semiconductor material having compressive strain that extends throughout a cut region of the feature and throughout a preserve region of the feature. The method further includes converting the cut region of the feature to a dielectric. 1. A method of forming a feature of a semiconductor device , the method comprising:forming the feature from a semiconductor material;wherein the feature comprises a preserve region and a cut region;wherein the feature comprises compressive strain imparted to the feature by the semiconductor material;wherein the compressive strain extends throughout the cut region of the feature and throughout the preserve region of the feature; andconverting the cut region of the feature to a dielectric.2. The method of claim 1 , wherein the feature comprises a fin.3. The method of claim 2 , wherein the preserve region of the fin comprises a channel region of the semiconductor device.4. The method of further comprising forming a gate over the channel region.5. The method of claim 1 , wherein converting the cut region of the feature to a dielectric comprises oxidizing the cut region.6. The method of claim 1 , wherein:the feature is formed on a silicon substrate; andthe semiconductor material comprises silicon germanium.7. The method of claim 1 , wherein:the compressive strain extending throughout the cut region and the preserve region comprises a predetermined percentage of compressive strain; andconverting the cut region of the feature to a dielectric does not reduce the predetermined percentage.8. The method of claim 7 , wherein converting the cut region of the feature to a dielectric increases the predetermined percentage.9. A method of forming features of semiconductor devices claim 7 , the method comprising:forming a first feature on a substrate, wherein the first feature comprises a first semiconductor material ...

METHOD AND STRUCTURE FOR FORMING MOSFET WITH REDUCED PARASITIC CAPACITANCE

A method (and structure) of fabricating an MOSFET (metal-oxide-semiconductor field-effect transistor), includes, on a gate structure coated with a high-k sidewall spacer film, etching off the high-k sidewall spacer film from a top surface of the gate structure and from a portion of vertical walls of the gate structure. The etched-off high-k sidewall spacer film on the vertical walls is replaced with an ultra low-k material. 1. A method of fabricating an MOSFET (metal-oxide-semiconductor field-effect transistor) , said method comprising:on a gate structure a gate contact metal structure coated with a high-k sidewall spacer film, etching off an upper portion of said high-k sidewall spacer film from vertical walls of said gate structure, leaving in place a lower portion of said high-k sidewall spacer film;replacing at least a portion of said etched-off upper portion of high-k sidewall spacer film on said vertical walls with an ultra low-k material;depositing a layer of metal to serve as a source contact metal or as a drain contact metal such that a first side surface of said ultra low-k material directly contacts a first side surface of the gate contact metal and a second side surface of said ultra low-k material directly contacts a side surface of one of said source contact metal or said drain contact metal; andpolishing a top surface of the MOSFET until the second side surface of the ultra low-k material directly contacts along an entirety of a vertical dimension of the side surface of the source contact metal layer or the drain contact metal layer,wherein a thickness of the upper portion of ultra low-k sidewall spacer film is approximately the same as a thickness of the lower portion of high-k sidewall spacer film.2. The method of claim 1 , wherein said gate structure controls a carrier movement in an underlying channel below said gate structure and said gate structure is adjacent on each of two sides to the epitaxial regions serving as source/drain functions for ...

Field effect transistor devices having gate contacts formed in active region overlapping source/drain contacts

Semiconductor devices and methods are provided to fabricate FET devices having overlapping gate and source/drain contacts while preventing electrical shorts between the overlapping gate and source/drain contacts. For example, a semiconductor device includes a FET device, a vertical source/drain contact, a source/drain contact capping layer, and a vertical gate contact. The FET device includes a source/drain layer, and a gate structure. The vertical source/drain contact is formed in contact with a source/drain layer of the FET device. The source/drain contact capping layer is formed on an upper surface of the vertical source/drain contact. The vertical gate contact is formed in contact with a gate electrode layer of the gate structure. A portion of the vertical gate contact overlaps a portion of the vertical source/drain contact, wherein the source/drain contact capping layer electrically insulates the overlapping portions of the vertical gate and source/drain contacts.

SLEEP CONTROL DEVICE

Systems, apparatus, and methods of monitoring and reducing snore are discussed herein. Some embodiments may provide for a system including a snore detection module, a movement detection module, a control module, and an actuation module. The snore detection module may be configured to detect snore, such as by detecting vibrations caused by snoring. When snoring is detected, the control module may be configured to instruct the actuation module to apply stimulation to the user that is calibrated to cause the user to shift sleeping position without disturbing sleep. The movement detection module may be configured to monitor user movement. If the user fails to move in response to the actuation, the actuation module may increase the intensity of the actuation. If the user responds to the actuation, the process may be repeated after a predetermined delay to provide continuous snore monitoring and correction throughout user sleep. 1. A sleep control system , comprising: detect vibrations caused by snoring of a user; and', 'generate vibration signals indicating the vibrations;, 'a snore detection module configured to determine a vibration strength based upon the vibration signals;', 'determine a vibration strength threshold; and', 'determine whether the vibration strength exceeds the vibration strength threshold; and', 'in response to determining that vibration strength exceeds the vibration strength threshold, provide an actuation signal to an actuation module; and, 'a control module configured tothe actuation module configured to generate an actuation to stimulate movement of the user in response to receiving the actuation signal.2. The system of claim 1 , wherein the control module is further configured to:determine a vibration pattern based on the vibration signals;determine a reference vibration pattern representative of snoring of the user;determine whether the vibration pattern corresponds with the reference vibration pattern; andin response to determining that the ...

Droplet generating apparatus, system

A droplet generating apparatus includes: a micro-pipe having an outlet end and extending along a longitudinal axis; a liquid driving device; a connecting tube with its one end connected to the micro-pipe and the other end extending to the liquid driving device; a container positioned at least in-part below the micro-pipe and containing a second liquid; and a vibrating equipment connected to the micro-pipe and adapted to form a relative periodic vibration between the micro-pipe and the container in a perpendicular direction with respect to the longitudinal axis of the outlet end of the micro-pipe; wherein the vibrating equipment in coordination with the liquid driving device dispense the first liquid from the micro-pipe and form a plurality of droplets of the first liquid in the second liquid which is induced by a force of the second liquid imposed on the first liquid at the outlet end of the micro-pipe.

METHOD FOR OPERATING MULTI-BAR LINKAGE MECHANISM BASED CONVEYOR

The present invention discloses a method for operating a multi-bar linkage mechanism based conveyor. Stretching the mechanism based conveyor comprises: an automatic control system is started to control a first two-drum winch, a second two-drum winch, and hydraulic cylinders in a multi-bar linkage mechanism based conveyor boom to operate together until the mechanism enters an operating state, and the first two-drum winch, the second two-drum winch, and the hydraulic cylinders in the multi-bar linkage mechanism based conveyor boom stop operating. Then, the angle of the multi-bar linkage mechanism based conveyor boom can be adjusted by controlling the operation of the second two-drum winch. Retracting the mechanism based conveyor comprises: the automatic control system is started to control the first two-drum winch, the second two-drum winch, and the hydraulic cylinders in the multi-bar linkage mechanism based conveyor boom to operate together until the mechanism enters a non-operating state. 11234567122012022032322012032012022011111121115161214131114171713141817151612151818181220214121315121317161218020212201201122021620120220120120120142032612012202246462258920120212203122033. A method for operating a multi-bar linkage mechanism based conveyor , comprising a gantry system () , a multi-bar linkage mechanism based conveyor boom () , a boom support () , a first two-drum winch () , a roller unit () , a second two-drum winch () , an automatic control system and a hull () , wherein the gantry system () comprises a gantry , a set of gantry pulleys and a gantry support; wherein the multi-bar linkage mechanism based conveyor boom () comprises multi-bar linkage mechanisms () , hydraulic cylinders () and pulleys () , and is in a composite structure of carbon fibers and carbon steel; the multi-bar linkage mechanism based conveyor boom () is articulated with the boom support () , the multi-bar linkage mechanism based conveyor boom () comprises a plurality of multi-bar linkage ...

DROPLET GENERATING APPARATUS, SYSTEM, AND METHOD

A droplet generating method includes: providing a micro-pipe for dispensing a first liquid and a container containing a second liquid; providing a moving and locating device for positioning the micro-pipe over the container; providing a liquid driving device connecting to the micro-pipe through a connecting tube; providing a vibrating equipment connected to the micro-pipe for vibrating the micro-pipe; forming a relative periodic vibration between the micro-pipe and the container so that the outlet end of the micro-pipe is displaced to touch the second liquid in the container during a relative periodic vibration; and dispensing the first liquid in the micro-pipe out from the outlet end of the micro-pipe during the relative periodic vibration to generate a plurality of droplets of the first liquid in the second liquid which is induced by a force of the second liquid imposed on the first liquid at the outlet end. 1. A droplet generating method , comprising:providing a micro-pipe for dispensing a first liquid and a container containing a second liquid, wherein the first liquid is immiscible with the second liquid;providing a moving and locating device for positioning the micro-pipe over the container;providing a liquid driving device connecting to the micro-pipe through a connecting tube for driving the first liquid through the micro-pipe and out from an outlet end of the micro-pipe;providing a vibrating equipment connected to the micro-pipe for vibrating the micro-pipe;forming a relative periodic vibration between the micro-pipe and the container so that the outlet end of the micro-pipe is displaced to touch the second liquid in the container during a relative periodic vibration; anddispensing the first liquid in the micro-pipe out from the outlet end of the micro-pipe during the relative periodic vibration to generate a plurality of droplets of the first liquid in the second liquid which is induced by a force of the second liquid imposed on the first liquid at the ...

SELF-ALIGNED SILICIDE/GERMANIDE FORMATION TO REDUCE EXTERNAL RESISTANCE IN A VERTICAL FIELD-EFFECT TRANSISTOR

A method for manufacturing a vertical transistor device includes respectively forming a first and second plurality of fins in first and second device regions on a substrate. A plurality of bottom source/drain regions are formed adjacent lower portions of each of the fins, and a sacrificial layer is formed in the first device region on a first bottom source/drain region of the plurality of bottom source/drain regions. In the method, gate structures are formed on the bottom source/drain regions and sacrificial layer, and portions of the gate structures are removed to expose the sacrificial layer in the first device region and a second bottom source/drain region of the plurality of bottom source/drain regions in the second device region. The method further includes depositing a germanium oxide layer on the exposed sacrificial layer and second bottom source/drain region, and converting the germanium oxide layer to a plurality of silicide/germanide layers. 1. A vertical transistor device , comprising:a first plurality of fins in a first device region on a substrate;a second plurality of fins in a second device region on the substrate;a plurality of bottom source/drain regions on the substrate adjacent lower portions of each of the first and second plurality of fins in the first and second device regions;a plurality of gate structures on the plurality of bottom source/drain regions;at least one of a plurality of silicide layers and a plurality of germanide layers on the plurality of bottom source/drain regions adjacent the plurality of gate structures.2. The vertical transistor device according to claim 1 , wherein a plurality of sacrificial layers are positioned on lateral sides each of the at least one of the plurality of silicide layers and the plurality of germanide layers in the first device region.3. The vertical transistor device according to claim 2 , wherein the plurality of sacrificial layers comprise silicon germanium.4. The vertical transistor device according ...

FORMING ON-CHIP METAL-INSULATOR-SEMICONDUCTOR CAPACITOR

A method is presented for forming a semiconductor structure. The method includes forming a plurality of fins on a first region of the semiconductor substrate, forming a bi-polymer structure, selectively removing the first polymer of the bi-polymer structure and forming deep trenches in the semiconductor substrate resulting in pillars in a second region of the semiconductor structure. The method further includes selectively removing the second polymer of the bi-polymer structure, doping the pillars, and depositing a high-k metal gate (HKMG) over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate. 1. A semiconductor structure for forming a metal-insulator-semiconductor (MIS) capacitor on a semiconductor substrate , the semiconductor structure comprising:a plurality of fins formed over a first region of the semiconductor substrate; anda plurality of undoped pillars disposed in the first region of the semiconductor substrate, extending within the semiconductor substrate, and being vertically misaligned with respect to the plurality of fins.2. The structure of claim 1 , wherein a plurality of doped pillars are disposed in a second region of the semiconductor substrate.3. The structure of claim 2 , wherein a high-k metal gate (HKMG) is deposited over the first and second regions to form the MIS capacitor in the second region of the semiconductor substrate.4. The structure of claim 3 , wherein a bottom spacer is disposed over and in direct contact with the plurality of undoped pillars.5. The structure of claim 4 , wherein a top spacer is disposed in direct contact with an upper portion of the plurality of fins.6. The structure of claim 5 , wherein the plurality of doped pillars are encapsulated by the HKMG.7. The structure of claim 6 , wherein the plurality of fins are vertically misaligned with respect to the plurality of doped pillars.8. The structure of claim 7 , wherein the HKMG is deposited between the doped ...

FABRICATION OF AN ISOLATED DUMMY FIN BETWEEN ACTIVE VERTICAL FINS WITH TIGHT FIN PITCH

A method of forming an arrangement of active and inactive fins on a substrate, including forming at least three vertical fins on the substrate, forming a protective liner on at least three of the at least three vertical fins, removing at least a portion of the protective liner on the one of the at least three of the at least three of vertical fins, and converting the one of the at least three of the at least three vertical fins to an inactive vertical fin. 1. A method of forming an arrangement of active and inactive fins on a substrate , comprising:forming at least three vertical fins on the substrate;forming a protective liner on at least three of the at least three vertical fins;removing at least a portion of the protective liner on at least one of the at least three of the at least three vertical fins; andconverting the one of the at least three of the at least three vertical fins to an inactive vertical fin.2. The method of claim 1 , wherein the protective liner is formed by atomic layer deposition.3. The method of claim 1 , wherein the protective liner is silicon oxide (SiO) claim 1 , silicon nitride (SiN) claim 1 , silicon oxynitride (SiON) claim 1 , silicon boronitride (SiBN) claim 1 , or a combinations thereof.4. The method of claim 1 , wherein the protective liner is a silicon oxide claim 1 , and the at least three vertical fins are silicon-germanium (SiGe).5. The method of claim 1 , wherein the protective liner is conformally deposited on the at least three of the at least three vertical fins.6. The method of claim 1 , further comprising forming a gate structure on one or more of the at least three vertical fins.7. The method of claim 6 , further comprising forming at least one source/drain on the one or more of the at least three vertical fins.8. The method of claim 1 , wherein the at least three vertical fins are formed by a sidewall image transfer process.9. A method of forming an arrangement of active and inactive fins on a substrate claim 1 , ...

ENCODING AND ADAPTIVE, SCALABLE ACCESSING OF DISTRIBUTED MODELS

Systems, methods, and apparatus for accessing distributed models in automated machine processing, including using large language models in machine translation, speech recognition and other applications. 1. (canceled)2. A method comprising:receiving a first segment of text in a source language;obtaining a set of candidate translations of the first segment of text in a target language, each candidate translation in the set of candidate translations comprising one or more tokens in the target language; obtaining, from a translation cache, first language model data about the tokens in the candidate translation, and', 'computing an intermediate translation score using the first language model data;, 'for each candidate translation in the set of candidate translations obtaining, from one or more language model servers, second language model data about the tokens in the candidate translation, and', 'computing a final translation score using the intermediate translation score and the second language model data; and, 'for each of one or more of the candidate translations in the set of candidate translationsselecting the candidate translation with a best final translation score.3. The method of claim 2 , further comprising:prior to obtaining the second language model data from the one or more language model servers, removing one or more candidate translations from the set of candidate translations based on the intermediate translation scores, and only obtaining the second language model data for candidate translations that were not removed from the set.4. The method of claim 2 , wherein the first language model data defines a coarse model of the target language claim 2 , and wherein the second language model data defines a detailed model of the target language.5. The method of claim 2 , wherein the first language model data and the second language model data comprise frequencies of occurrence of sequences of tokens in the target language.6. The method of claim 2 , wherein the ...

FABRICATION OF AN ISOLATED DUMMY FIN BETWEEN ACTIVE VERTICAL FINS WITH TIGHT FIN PITCH

A method of forming an arrangement of active and inactive fins on a substrate, including forming at least three vertical fins on the substrate, forming a protective liner on at least three of the at least three vertical fins, removing at least a portion of the protective liner on the one of the at least three of the at least three of vertical fins, and converting the one of the at least three of the at least three vertical fins to an inactive vertical fin. 1. A method of forming an arrangement of active and inactive fins on a substrate , comprising:forming at least three vertical fins on the substrate;forming a protective liner on at least three of the at least three vertical fins;removing at least a portion of the protective liner on at least one of the at least three of the at least three vertical fins; andconverting the at least one of the at least three of the at least three vertical fins to an inactive vertical fin, wherein the at least one of the at least three of the at least three vertical fins is converted to an inactive vertical fin by oxidizing or nitriding the at least one vertical fin.2. (canceled)3. The method of claim 1 , wherein the oxidizing or nitriding is done using a gaseous reactant.4. The method of claim 1 , wherein the protective liner is a silicon nitride.5. The method of claim 4 , wherein the protective liner is conformally deposited on the at least three of the at least three vertical fins.6. The method of claim 1 , further comprising forming a gate structure on one or more of the at least three vertical fins.7. The method of claim 6 , further comprising forming at least one source/drain on the one or more of the at least three vertical fins.8. The method of claim 1 , wherein the plurality at least three vertical fins are formed by a sidewall image transfer process.9. A method of forming an arrangement of active and inactive fins on a substrate claim 1 , comprising:forming at least three vertical fins on the substrate;forming a protective ...

FABRICATION OF AN ISOLATED DUMMY FIN BETWEEN ACTIVE VERTICAL FINS WITH TIGHT FIN PITCH

A method of forming an arrangement of active and inactive fins on a substrate, including forming at least three vertical fins on the substrate, forming a protective liner on at least three of the at least three vertical fins, removing at least a portion of the protective liner on the one of the at least three of the at least three of vertical fins, and converting the one of the at least three of the at least three vertical fins to an inactive vertical fin. 1. An arrangement of active and inactive fins on a substrate , comprising:a plurality of active vertical fins, wherein the active vertical fins are made of a semiconductor material;at least one inactive vertical fin adjacent to at least one of the plurality of active vertical fins, wherein the at least one inactive vertical fin is at least partially made of an insulating material; anda dielectric layer on at least a portion of the plurality of active vertical fins.2. The arrangement of active and inactive fins of claim 1 , wherein at least two of the plurality of active vertical fins are adjacent to each other claim 1 , and the pitch between the at least one inactive vertical fin and the at least one of the plurality of active vertical fins adjacent to the at least one inactive vertical fin is the same as the pitch between the two adjacent active vertical fins.3. The arrangement of active and inactive fins of claim 1 , further comprising a gate fill layer on at least a portion of the dielectric layer to form a gate structure on at least one of the plurality of active vertical fins.4. The arrangement of active and inactive fins of claim 3 , further comprising a source/drain at opposite ends of the plurality of active vertical fins.5. The arrangement of active and inactive fins of claim 1 , further comprising a protective liner on at least a portion of each of the plurality of active vertical fins and on at least a portion of the at least one inactive vertical fin.6. The arrangement of active and inactive fins of ...

Laser spike annealing for solid phase epitaxy and low contact resistance in an sram with a shared pfet and nfet trench

Embodiments are directed to a method of forming a semiconductor device and resulting structures having a shared SRAM trench and a common contact having a low contact resistance. The method includes forming a first semiconductor fin opposite a surface of a substrate and forming a second semiconductor fin opposite the surface of the substrate and adjacent to the first semiconductor fin. A doped region is formed over portions of each of the first and second semiconductor fins and a dielectric layer is formed over the doped regions. A shared trench is formed in the dielectric layer exposing portions of the doped regions. The exposed doped regions are then amorphized and recrystallized.

COATED FUEL PELLETS WITH ENHANCED WATER AND STEAM OXIDATION RESISTANCE

Disclosed herein is a method comprising coating a fissile, uranium-containing ceramic material with a water-resistant layer, the layer being non-reactive with the fissile, uranium-containing ceramic material. The coating is applied to a surface of the fissile, uranium-containing ceramic material. Also disclosed is a fuel for use in a nuclear reactor. 1. A method comprising:coating a fissile, uranium-containing ceramic material with a water-resistant layer, the layer being non-reactive with the fissile, uranium-containing ceramic material, wherein the coating is applied to a surface of the fissile, uranium-containing ceramic material.2. The method recited in claim 1 , wherein the fissile claim 1 , uranium-containing ceramic material comprises a uranium silicide claim 1 , a uranium nitride claim 1 , a uranium carbide claim 1 , a uranium boride claim 1 , a uranium phosphide claim 1 , a uranium sulfides claim 1 , a uranium oxide claim 1 , or a combination thereof.3. The method recited in claim 2 , wherein the fissile claim 2 , uranium-containing ceramic material comprises USi claim 2 , USi claim 2 , USi claim 2 , UN claim 2 , UN claim 2 , UC claim 2 , UB claim 2 , UB claim 2 , UP claim 2 , US claim 2 , UO claim 2 , UCO claim 2 , or a combination thereof.4. The method recited in claim 1 , wherein the fissile claim 1 , uranium-containing ceramic material is in the form of a pellet.5. The method recited in claim 1 , wherein the water resistant layer is selected from the group consisting of ZrSiO claim 1 , FeCrAl claim 1 , Cr claim 1 , Zr claim 1 , Al—Cr claim 1 , CrAl claim 1 , ZrO claim 1 , CeO claim 1 , TiO claim 1 , SiO claim 1 , UO claim 1 , ZrB claim 1 , NaO—BO—SiO—AlOglass claim 1 , AlO claim 1 , CrO claim 1 , carbon claim 1 , SiC claim 1 , Ni claim 1 , Cr claim 1 , and combinations thereof.6. The method recited in claim 1 , wherein the coating is applied by atomic layer deposition.7. The method recited in claim 1 , wherein the coating is applied by an electroless ...

METHODS FOR SURFACE COATING OF CATHODE MATERIAL LiNi0.5-XMn1.5MXO4 FOR LITHIUM-ION BATTERIES

A high-voltage lithium-ion battery cathode material includes LiNiMnMO(0≦x≦0.2, M═Mg, Zn, Co. Cu, Fe, Ti, Zr, Ru, and Cr), which is coated with a coating material, which may be a carbon coating material, a metal phosphate coating material, or a combination thereof. The carbon coating material may be acetylene black, graphene oxide, conductive graphite, glucose, sucrose, starch, lactose, maltose, phenolic resins, polyvinyl alcohol, or a combination thereof, and the metal phosphate coating material may be FePO, LiFePO, CoPO, Mn(PO), LnPO. The coating material may account for 1 to 10% (wt %). Products of the present invention have high reversible capacities. Synthesis methods are disclosed that are simple and controllable, can produce uniform coating, and are suitable for industrial scale production. 1. A cathode material , comprising:{'sub': 0.5-x', '1.5', 'x', '4, 'substrate particles comprising a substance having the formula: LiNiMnMO, wherein 0≦x≦0.2, and M is Mg, Zn, Co, Cu, Fe, Ti, Zr, Ru, or Cr; and'}a coating material coated on surfaces of the substrate particles, wherein the coating material comprises a carbon material, a metal phosphate material, or a combination thereof.2. The cathode material according to claim 1 , wherein the coating material is the carbon material.3. The cathode material according to claim 1 , wherein the coating material is the metal phosphate material.4. The cathode material according to claim 1 , wherein the coating material is a mixture of the carbon material and the metal phosphate material.5. The cathode material according to claim 1 , wherein the coating material is acetylene black claim 1 , graphene oxide claim 1 , conductive graphite claim 1 , glucose claim 1 , sucrose claim 1 , starch claim 1 , lactose claim 1 , maltose claim 1 , a phenolic resin claim 1 , a polyvinyl alcohol claim 1 , FePO claim 1 , LiFePO claim 1 , Co(PO) claim 1 , Mn(PO) claim 1 , LnPO claim 1 , or a mixture thereof.6. The cathode material according to claim 1 ...

Cold spray chromium coating for nuclear fuel rods

A method is provided for coating the substrate of a component, such as a zirconium alloy cladding tube, for use in a water cooled nuclear reactor under normal operating conditions and under high temperature oxidation conditions. The method includes heating a pressurized carrier gas to a temperature between 200° C. and 1200° C., adding chromium or chromium-based alloy particles having an average diameter of 20 microns or less to the heated carrier gas, and spraying the carrier gas and particles onto the substrate at a velocity, preferably from 800 to 4000 ft./sec. (about 243.84 to 1219.20 meters/sec.), to form a chromium and/or chromium-based alloy coating on the substrate to a desired thickness.

SPRAY METHODS FOR COATING NUCLEAR FUEL RODS TO ADD CORROSION RESISTANT BARRIER

A method is described herein for coating the substrate of a component for use in a water cooled nuclear reactor to provide a barrier against corrosion. The method includes providing a zirconium alloy substrate; and coating the substrate with particles selected from the group consisting of metal oxides, metal nitrides, FeCrAl, FeCrAlY, and high entropy alloys. Depending on the metal alloy chosen for the coating material, a cold spray or a plasma arc spray process may be employed for depositing various particles onto the substrate. An interlayer of a different material, such as a Mo, Nb, Ta, or W transition metal or a high entropy alloy, may be positioned in between the Zr-alloy substrate and corrosion barrier layer. 1. A method of forming a corrosion resistant barrier on a substrate of a component for use in a water cooled nuclear reactor , the method comprising:providing a zirconium alloy substrate;coating the substrate to a desired thickness with particles selected from the group consisting of metal oxides, metal nitrides, FeCrAl, FeCrAlY, and high entropy alloys, the particles having an average diameter of 100 microns or less.2. The method recited in wherein coating comprises application of particles selected from the group consisting of metal oxides claim 1 , metal nitrides claim 1 , and combinations thereof claim 1 , by a plasma arc spray.3. The method recited in wherein the metal oxide particles are selected from the group consisting of TiO claim 2 , YO claim 2 , CrO claim 2 , and combinations thereof.4. The method recited in wherein the metal oxide particles are selected from the group consisting of TiOand YOand combinations thereof.5. The method recited in wherein the metal nitride particles are selected from the group consisting of TiN claim 2 , CrN claim 2 , ZrN claim 2 , and combinations thereof.6. The method recited in wherein coating comprises application of particles selected from the group consisting of FeCrAl claim 1 , high entropy alloys claim 1 , ...

SELF-ALIGNED CONTACT CAP

A method for forming a semiconductor device includes recessing a gate conductor in a gate structure to form a first divot, forming a gate cap in the first divot and recessing a dielectric fill that encapsulates the gate structures to a position below a top of the gate cap. An extension layer is deposited over the dielectric fill and the top of the gate cap and is planarized to the top of the gate cap. The extension layer is expanded to form a profile growth layer that is thicker than the extension layer and creates a second divot over the gate cap. A top cap is formed in the second divot to provide a cap with a thickness of the gate cap and the top cap. 1. A method for forming a semiconductor device , comprising:recessing a gate conductor in a gate structure to form a first divot;forming a gate cap in the first divot;recessing a dielectric fill that encapsulates the gate structures to a position below a top of the gate cap;depositing an extension layer over the dielectric fill and the top of the gate cap;planarizing the extension layer to the top of the gate cap;expanding the extension layer to form a profile growth layer that is thicker than the extension layer and creates a second divot over the gate cap; andforming a top cap in the second divot to provide a cap with a thickness of the gate cap and the top cap.2. The method as recited in claim 1 , wherein recessing the gate conductor includes recessing the gate conductor without interfacing with a seam formed within the gate conductor.3. The method as recited in claim 1 , wherein depositing the extension layer includes depositing a polysilicon layer.4. The method as recited in claim 3 , wherein expanding the extension layer includes oxidizing the polysilicon layer to form the profile growth layer having second divots formed therein.5. The method as recited in claim 4 , further comprising isotropically etching the profile growth layer to shape the second divots.6. The method as recited in claim 1 , further ...

SELF-ALIGNED CONTACT CAP

A method for forming a semiconductor device includes recessing a gate conductor in a gate structure to form a first divot, forming a gate cap in the first divot and recessing a dielectric fill that encapsulates the gate structures to a position below a top of the gate cap. An extension layer is deposited over the dielectric fill and the top of the gate cap and is planarized to the top of the gate cap. The extension layer is expanded to form a profile growth layer that is thicker than the extension layer and creates a second divot over the gate cap. A top cap is formed in the second divot to provide a cap with a thickness of the gate cap and the top cap. 1. A semiconductor device , comprising:a gate conductor formed in a gate structure;a gate cap formed on the gate conductor;a dielectric fill that encapsulates the gate structure to a position below a top of the gate cap;a profile growth layer that creates a divot over the gate cap; anda top cap formed in the divot to provide a cap with a thickness of the gate cap and the top cap.2. The device as recited in claim 1 , wherein the gate conductor includes a seam that remains unexposed within the gate conductor.3. The device as recited in claim 1 , wherein the profile growth layer includes an oxidized polysilicon layer which is expanded to form the divot.4. The device as recited in claim 1 , wherein the oxidized polysilicon layer is oxidized to expand between 50-125%.5. The device as recited in claim 1 , wherein the divot includes a tapered profile.6. The device as recited in claim 5 , wherein the divot has an increased width at a top portion of the divot.7. The device as recited in claim 1 , further comprising:an interlevel dielectric (ILD) layer formed over the gate structure; andself-aligned contacts formed through the (ILD) and over the top cap.8. The device as recited in claim 1 , wherein the gate cap and the top cap include a same dielectric material.9. The device as recited in claim 1 , wherein the gate cap and the ...

UNIPOLAR SPACER FORMATION FOR FINFETS

A method for forming a spacer for a semiconductor device includes patterning gate material in a transverse orientation relative to semiconductor fins formed on a substrate and conformally depositing a dummy spacer layer over surfaces of gate structures and the fins. A dielectric fill formed over the gate structures and the fins is planarized to remove a portion of the dummy spacer layer formed on tops of the gate structures and expose the dummy spacer layer at tops of the sidewalls of the gate structures. Channels are formed by removing the dummy spacer layer along the sidewalls of the gate structures. The fins are protected by the dielectric fill. A spacer is formed by filling the channels with a spacer material. The dielectric fill and the dummy spacer layer are removed to expose the fins. Source and drain regions are formed between the gate structures on the fins. 1. A semiconductor device , comprising:semiconductor fins formed on a substrate;gate structures formed transversely over the fins;unipolar spacers formed over the gate structures only, the fins being free from the unipolar spacers, the unipolar spacers having a substantially uniform thickness vertically along the gate structures and including a spacer material with an etch selectivity greater than SiN for oxide removal; andsource and drain regions formed between the gate structures on the fins.2. The device as recited in claim 1 , wherein the spacer material includes SiBCN.3. The device as recited in claim 1 , wherein the spacer material includes SiOCN.4. The device as recited in claim 1 , wherein the semiconductor fins have a pitch less than a pitch of the gate structures.5. The device as recited in claim 1 , wherein the source and drain regions include epitaxially grown semiconductor material.6. The device as recited in claim 1 , wherein the gate structures include a gate material and a hard mask layer.7. The device as recited in claim 6 , wherein the gate material includes a gate conductor and a ...

CONJUGATING AMINES

The disclosure provides directly conjugated polysaccharide vaccine molecules and methods related thereto. 2. The conjugate molecule of claim 1 , wherein PS is a bacterial polysaccharide claim 1 , or an antigenic fragment thereof claim 1 , and P is a carrier protein.3. The conjugate molecule of claim 1 , wherein PS is a detoxified bacterial polysaccharide claim 1 , or a fragment thereof.4. The conjugate molecule of claim 1 , wherein PS is O-PS-Core polysaccharide.5Escherichia coliShigellaEnterobacteriaceaePseudomonasP. aeruginosaMoraxellaHelicobacterStenotrophomonasBdellovibrioLegionellaWolbachiaSpirochaetesNeisseriaN. gonorrhoeaeMeningitisN. meningitidesMoraxellaM. catarrhalisHemophilusH. influenzaKlebsiellaK. pneumoniaLegionellaL. pneumophilaProteus mirabilisEnterobacter cloacaeSerratia marcescensHelicobacterH. pyloriSalmonellaS. enteritidisSalmonella typhiAcinetobacter baumanniiV. choleraV. choleraeV. cholerae. The conjugate molecule of claim 1 , wherein PS comprises one or more of O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , acetic acid bacteria O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , cyanobacteria O-PS-Core claim 1 , O-PS-Core claim 1 , green sulfur O-PS-Core claim 1 , green non-sulfur bacteria O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , sp. O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , O-PS-Core claim 1 , Inaba O-PS-Core claim 1 , or Ogawa O-PS-Core claim 1 , or an antigenic fragment of the one or more polysaccharides claim 1 , or any ...

PROBABILISTIC-BASED LANE-CHANGE DECISION MAKING AND MOTION PLANNING SYSTEM AND METHOD THEREOF

A system and method for providing probabilistic-based lane-change decision making and motion planning that include receiving data associated with a roadway environment of an ego vehicle. The system and method also include performing gap analysis to determine at least one gap between neighboring vehicles that are traveling within the target lane to filter out an optimal merging entrance for the ego vehicle to merge into the target lane and determining a probability value associated with an intention of a driver of a following neighboring vehicle to yield to allow the ego vehicle to merge into the target lane. The system and method further include controlling the ego vehicle to autonomously continue traveling within the current lane or autonomously merge from current lane to the target lane based on at least one of: if the optimal merging entrance is filtered out and if the probability value indicates an intention of the driver to yield. 1. A computer-implemented method for providing probabilistic-based lane-change decision making and motion planning , comprising:receiving data associated with a roadway environment of an ego vehicle, wherein the roadway environment includes a roadway that includes a current lane of the ego vehicle and a target lane of the ego vehicle;performing gap analysis to determine at least one gap between neighboring vehicles that are traveling within the target lane to filter out an optimal merging entrance for the ego vehicle to merge into the target lane from the current lane;determining a probability value associated with an intention of a driver of a following neighboring vehicle to yield to allow the ego vehicle to merge into the target lane based on determining that the optimal merging entrance does not exist; andcontrolling the ego vehicle to autonomously continue traveling within the current lane or autonomously merge from current lane to the target lane based on at least one of: if the optimal merging entrance is filtered out based on ...

TRENCH FORMATION FOR DIELECTRIC FILLED CUT REGION

A method for forming a gate cut region includes forming a tapered profile gate line trench through a hard mask, a dummy layer and a dummy dielectric formed on a substrate, forming a dummy gate dielectric and a dummy gate conductor in the trench and planarizing a top surface to reach the hard mask. The dummy gate conductor is patterned to form a cut trench in a cut region. The dummy gate conductor is recessed, and the cut trench is filled with a first dielectric material. The dummy layer is removed and spacers are formed. A gate line is opened up and the dummy gate conductor is removed from the gate line trench. A gate dielectric and conductor are deposited, and a gate cap layer provides a second dielectric that is coupled to the first dielectric material in the cut trench to form a cut last structure. 113.-. (canceled)14. A device having a gate cut region , comprising:a tapered profile gate line formed on a substrate, the tapered profile gate line including a gate dielectric and a gate metal formed within the tapered profile and spacers formed on sidewalls of the tapered profile gate line;source and drain regions formed adjacent to the spacers; anda cut last structure formed in a mid-portion along the tapered profile gate line in a cut region, the cut region including a first dielectric material formed on a shallow trench isolation region in the substrate and a second dielectric material forming a gate cap layer and forming vertical interface regions between the gate cap layer and the first dielectric material.15. The device as recited in claim 14 , wherein the tapered profile gate line includes a gradual tapered profile formed by using a lithography claim 14 , etch claim 14 , lithography claim 14 , etch (LELE) process.16. The device as recited in claim 14 , wherein the first dielectric and the second dielectric include silicon nitride.17. The device as recited in claim 14 , further comprising an interlevel dielectric layer (ILD) formed over the cap layer claim 14 , ...

TRENCH FORMATION FOR DIELECTRIC FILLED CUT REGION

A method for forming a gate cut region includes forming a tapered profile gate line trench through a hard mask, a dummy layer and a dummy dielectric formed on a substrate, forming a dummy gate dielectric and a dummy gate conductor in the trench and planarizing a top surface to reach the hard mask. The dummy gate conductor is patterned to form a cut trench in a cut region. The dummy gate conductor is recessed, and the cut trench is filled with a first dielectric material. The dummy layer is removed and spacers are formed. A gate line is opened up and the dummy gate conductor is removed from the gate line trench. A gate dielectric and conductor are deposited, and a gate cap layer provides a second dielectric that is coupled to the first dielectric material in the cut trench to form a cut last structure. 1. A method for forming a gate cut region , comprising:forming a tapered profile gate line trench through a hard mask, a dummy layer and a dummy dielectric formed on a substrate;forming a dummy gate dielectric and a dummy gate conductor in the trench;planarizing a top surface to reach the hard mask;patterning the dummy gate conductor to form a cut trench in a cut region;recessing the dummy gate conductor to expose a shallow trench isolation region in the substrate;filling the cut trench with a first dielectric material;removing the dummy layer;forming spacers about a gate line;filling gaps using an interlevel dielectric (ILD) deposition;opening up the gate line to expose and remove the dummy gate conductor from the tapered profile gate line trench;depositing a gate dielectric and gate conductor in the tapered profile gate line trench; andforming a gate cap layer to cap a gate structure and provide a second dielectric that is coupled to the first dielectric material in the cut trench to form a cut last structure.2. The method as recited in claim 1 , wherein the forming a tapered profile gate line trench includes etching the tapered profile gate line trench using a ...

FABRICATION OF FIN FIELD EFFECT TRANSISTOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR DEVICES WITH UNIFORM HYBRID CHANNELS

A method of forming complementary vertical fins and vertical fins with uniform heights, including, forming a trench in a region of a substrate, wherein the trench extends through an upper portion of the substrate and a buried punch-through stop layer, and extends into a lower portion of the substrate, forming a reformed punch-through stop layer in a bottom portion of the trench, forming a fin formation region on the reformed punch-through stop layer, and forming a complementary vertical fin from the fin formation region and a vertical fin from the upper portion of the substrate on a first region of the substrate adjacent to the second region. 1. A plurality of complementary vertical fins and vertical fins with uniform heights , comprising:a substrate;one or more punch-through stop pillars on a first region of the substrate;one or more complementary punch-through stop pillars on a second region of the substrate adjacent to the first region;a complementary vertical fin on each of the one or more complementary punch-through stop pillars; anda vertical fin on each of the one or more punch-through stop pillars.2. The plurality of complementary vertical fins and vertical fins of claim 1 , wherein the material of the one or more punch-through stop pillars is selected from the group consisting of arsenic-doped silicon claim 1 , phosphorus-doped silicon claim 1 , arsenic-doped silicon-germanium claim 1 , and phosphorus-doped silicon-germanium.3. The plurality of complementary vertical fins and vertical fins of claim 2 , wherein each complementary vertical fin is silicon-germanium.4. The plurality of complementary vertical fins and vertical fins of claim 1 , wherein the material of the one or more complementary punch-through stop pillars is selected from the group consisting of boron-doped silicon and gallium-doped silicon.5. The plurality of complementary vertical fins and vertical fins of claim 4 , wherein each vertical fin is silicon.6. The plurality of complementary ...

LATERAL SEMICONDUCTOR NANOTUBE WITH HEXAGONAL SHAPE

A method of forming a semiconductor structure includes forming one or more fins disposed on a substrate, rounding surfaces of the one or more fins, forming faceted sidewalk from the rounded surfaces of the one or more fins, and forming a lateral semiconductor nanotube shell on the faceted sidewalk. The lateral semiconductor nanotube shell comprises a hexagonal shape. 1. A semiconductor structure , comprising:a substrate; anda lateral semiconductor nanotube shell disposed on a top surface of the substrate;wherein the lateral semiconductor nanotube shell comprises a hexagonal shape.2. The semiconductor structure of claim 1 , wherein the lateral semiconductor nanotube shell comprises silicon germanium (SiGe).3. The semiconductor structure of claim 1 , wherein the lateral semiconductor nanotube shell comprises single-crystal SiGe with a {111} crystalline orientation.4. The semiconductor structure of claim 1 , further comprising:an insulator filled in the lateral semiconductor nanotube shell;a gate dielectric disposed over a portion of exterior sidewalk of the lateral semiconductor nanotube shell; anda gate conductor disposed over the gate dielectric.5. The semiconductor structure of claim 1 , further comprising:an inner gate dielectric disposed on interior sidewalls of the lateral semiconductor nanotube shell;an inner gate conductor disposed on interior sidewalk of the inner gate dielectric;an outer gate dielectric disposed over a portion of exterior sidewalls of the lateral semiconductor nanotube shell; andan outer gate conductor disposed over the outer gate dielectric.6. The semiconductor structure of claim 1 , further comprising a dielectric layer disposed between the top surface of the substrate and the lateral semiconductor nanotube shell.7. The semiconductor structure of claim 1 , further comprising claim 1 , between the top surface of the substrate and the lateral semiconductor nanotubea fin of substrate material;an indent region disposed over the fin of ...

THREE-DIMENSIONAL FIELD EFFECT DEVICE

A method of forming stacked fin field effect devices is provided. The method includes forming a layer stack on a substrate, wherein the layer stack includes a first semiconductor layer on a surface of the substrate, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a separation layer on the third semiconductor layer, a fourth semiconductor layer on the separation layer, a fifth semiconductor layer on the fourth semiconductor layer, and a sixth semiconductor layer on the fifth semiconductor layer. The method further includes forming a plurality of channels through the layer stack to the surface of the substrate, and removing portions of the second semiconductor layer and fifth semiconductor layer to form lateral grooves. 1. A method of forming stacked fin field effect devices , comprising:forming a channel through a first semiconductor layer on a surface of a substrate, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a separation layer on the third semiconductor layer, a fourth semiconductor layer on the separation layer, a fifth semiconductor layer on the fourth semiconductor layer, and a sixth semiconductor layer on the fifth semiconductor layer;removing portions of the second semiconductor layer and fifth semiconductor layer to form lateral grooves;forming a gate dielectric layer on the exposed surfaces of the lateral groove in the second semiconductor layer and the lateral groove in the fifth semiconductor layer; andforming a gate fill layer on the gate dielectric layer in the lateral groove in the second semiconductor layer and the lateral groove in the fifth semiconductor layer.2. The method of claim 1 , further comprising forming a work function layer on the on the gate dielectric layer in the lateral groove in the second semiconductor layer and the lateral groove in the fifth semiconductor layer before ...

THREE-DIMENSIONAL FIELD EFFECT DEVICE

A method of forming stacked fin field effect devices is provided. The method includes forming a layer stack on a substrate, wherein the layer stack includes a first semiconductor layer on a surface of the substrate, a second semiconductor layer on the first semiconductor layer, a third semiconductor layer on the second semiconductor layer, a separation layer on the third semiconductor layer, a fourth semiconductor layer on the separation layer, a fifth semiconductor layer on the fourth semiconductor layer, and a sixth semiconductor layer on the fifth semiconductor layer. The method further includes forming a plurality of channels through the layer stack to the surface of the substrate, and removing portions of the second semiconductor layer and fifth semiconductor layer to form lateral grooves. 1. A stacked field effect device , comprising:a lower vertical transport field effect transistor segment;an upper vertical transport field effect transistor segment co-linear with the lower vertical transport field effect transistor segment; andan insulating layer between the upper vertical transport field effect transistor segment and the lower vertical transport field effect transistor segment.2. The stacked field effect device of claim 1 , wherein the vertical distance between the upper vertical transport field effect transistor segment and the lower vertical transport field effect transistor segment occupied by the insulating layer is in a range of about 20 nm to about 50 nm.3. The stacked field effect device of claim 2 , wherein the upper vertical transport field effect transistor segment and the lower vertical transport field effect transistor segment have a width claim 2 , W claim 2 , in a range of about 10 nm to about 90 nm.4. The stacked field effect device of claim 3 , wherein the stacked field effect device includes a separate gate structure on each of the upper vertical transport field effect transistor segment and the lower vertical transport field effect ...

ORGANIC LIGHT-EMITTING DIODE DISPLAY SUBSTRATE, DISPLAY PANEL, DISPLAY DEVICE, MANUFACTURING METHOD THEREOF, AND FINGERPRINT IDENTIFICATION MODULE

An OLED display substrate, a display panel, a display device, a manufacturing method and a fingerprint identification module are provided. The OLED display substrate includes a microporous light-shielding pattern arranged between adjacent pixel regions and including a plurality of pinholes. The microporous light-shielding pattern is arranged at a same layer as, and insulated from, a nontransparent electrode of the OLED display substrate. 1. An Organic Light-Emitting Diode (OLED) display substrate , comprising a microporous light-shielding pattern arranged between adjacent pixel regions and comprising a plurality of pinholes , wherein the microporous light-shielding pattern is arranged at a same layer as , and insulated from , a nontransparent electrode of the OLED display substrate.2. The OLED display substrate according to claim 1 , wherein the microporous light-shielding pattern is made of a same material as the nontransparent electrode of the OLED display substrate.3. The OLED display substrate according to claim 1 , wherein the nontransparent electrode is an anode of the OLED display substrate.4. The OLED display substrate according to claim 1 , wherein the nontransparent electrode is an electrode of a thin film transistor (TFT) of the OLED display substrate.5. The OLED display substrate according to claim 1 , wherein the microporous light-shielding pattern is used for pinhole imaging.6. The OLED display substrate according to claim 3 , wherein the OLED display substrate specifically comprises:a base substrate;a TFT array layer arranged on the base substrate;a planarization layer covering the TFT array layer; andthe anode and the microporous light-shielding pattern arranged on the planarization layer and separated from each other.7. A fingerprint identification module claim 1 , comprising the OLED display substrate according to claim 1 , and an optical sensor arranged at a non-light-exiting side of the OLED display substrate claim 1 , wherein an orthogonal ...

SERVER

A server includes a shell and at least one server assembly. The shell has a first accommodation space. The server assembly includes a motherboard tray, a motherboard module, a bearing frame and a storage device. The motherboard tray is detachably located in the first accommodation space. The motherboard module is located on the motherboard tray. The motherboard module includes a motherboard and at least one central processing unit which are located on the motherboard. The bearing frame having a loading plate is fastened to the motherboard tray and is located above the motherboard module. The storage device is detachably located on the loading plate. 1. A server , comprising:a shell having a first accommodation space; and a motherboard tray detachably located in the first accommodation space;', 'a motherboard module located on the motherboard tray, the motherboard module comprises a motherboard and at least one central processing unit located on the motherboard;', 'a bearing frame fastened to the motherboard tray and having a loading plate located above the motherboard module; and', 'a storage device detachably located on the loading plate., 'at least one server assembly comprising2. The server according to claim 1 , wherein the shell further comprises a second accommodation space claim 1 , the number of at least server assembly is two and the two server assemblies are detachably located in the first accommodation space and in the second accommodation space claim 1 , respectively.3. The server according to claim 2 , wherein the shell further comprises a base plate claim 2 , a first lateral plate claim 2 , a second lateral plate claim 2 , a first partition plate and a second partition plate claim 2 , wherein the first lateral plate and the second lateral plate are opposite to each other and are erected on two opposite sides of the base plate claim 2 , respectively claim 2 , wherein the first partition plate and the second partition plate are respectively located ...

UNIPOLAR SPACER FORMATION FOR FINFETS

A method for forming a spacer for a semiconductor device includes patterning gate material in a transverse orientation relative to semiconductor fins formed on a substrate and conformally depositing a dummy spacer layer over surfaces of gate structures and the fins. A dielectric fill formed over the gate structures and the fins is planarized to remove a portion of the dummy spacer layer formed on tops of the gate structures and expose the dummy spacer layer at tops of the sidewalls of the gate structures. Channels are formed by removing the dummy spacer layer along the sidewalls of the gate structures. The fins are protected by the dielectric fill. A spacer is formed by filling the channels with a spacer material. The dielectric fill and the dummy spacer layer are removed to expose the fins. Source and drain regions are formed between the gate structures on the fins. 1. A method for forming a spacer for a semiconductor device , comprising:depositing a dummy spacer layer over surfaces of gate structures and fins, the gate structures being transversely orientated relative to the fins;planarizing a dielectric fill formed over the gate structures and the fins to remove a portion of the dummy spacer layer formed on tops of the gate structures and expose the dummy spacer layer at tops of sidewalls of the gate structures;forming channels by removing the dummy spacer layer along the sidewalls of the gate structures, the fins being protected by the dielectric fill;forming a spacer by filling the channels with a spacer material; andremoving the dielectric fill and the dummy spacer layer to expose the fins.2. The method as recited in claim 1 , wherein depositing the dummy spacer layer includes conformally depositing the dummy spacer layer using an amorphous carbon material.3. The method as recited in claim 1 , wherein forming the channels includes removing the dummy spacer layer vertically down to the fins and a shallow trench isolation region at a base of the fins.4. The ...

SERVER

A server includes a case, a storage module, a connection module, a first expander board, a second expander board, a first mother board and a second mother board. The case includes a bottom case. The storage module is disposed on the bottom case and includes multiple storage units. The connection module is disposed on the bottom case and connected to the storage module. At least one first expander chip is disposed on the first expander board. At least one second expander chip is disposed on the second expander board. At least one first central processing unit is disposed on the first mother board. At least one second central processing unit is disposed on the second mother board. The first expander board, the second expander board, the first mother board and the second mother board are pluggably connected to the connection module, respectively.

CORROSION AND WEAR RESISTANT COATING ON ZIRCONIUM ALLOY CLADDING

The invention relates to compositions and methods for coating a zirconium alloy cladding of a fuel element for a nuclear water reactor. The composition includes a master alloy including one or more alloying elements selected from chromium, silicon and aluminum, a chemical activator and an inert filler. The alloying element(s) is deposited or are co-deposited on the cladding using a pack cementation process. When the coated zirconium alloy cladding is exposed to and contacted with water in a nuclear reactor, a protective oxide layer can form on the coated surface of the cladding. 1. A method of coating a zirconium alloy substrate for use in a nuclear water reactor , comprising:obtaining the zirconium alloy substrate having a surface;combining a master alloy comprising one or more elements selected from the group consisting of chromium, silicon and aluminum, a chemical activator and an inert filler powder to form a coating mixture;obtaining a chamber having a heating zone and an inert or reducing gas atmosphere;surrounding the zirconium alloy substrate with the coating mixture in the chamber;heating the chamber to an elevated temperature;reacting the master alloy with the chemical activator to form a gaseous compound;diffusing the gaseous compound to contact the surface of the zirconium alloy substrate;decomposing the gaseous compound;depositing the one or more elements of the master alloy on the surface of the zirconium alloy substrate; andforming a substantially uniform diffusion coating layer thereon comprising zirconium and the one or more elements of the master alloy.2. The method of claim 1 , wherein the surrounding includes packing the zirconium alloy substrate in a bed of the coating mixture.3. The method of claim 1 , wherein the diffusion coating layer is formed on one or both of an interior surface and an exterior surface of the zirconium alloy substrate.4. The method of claim 1 , further comprising:positioning the zirconium alloy substrate with the ...

SELF-ALIGNED SINGLE DUMMY FIN CUT WITH TIGHT PITCH

A method of forming a semiconductor device and resulting structures having a dummy semiconductor fin removed from within an array of tight pitch semiconductor fins by forming a first spacer including a first material on a substrate; forming a second spacer including a second material on the substrate, the second spacer adjacent to the first spacer; and applying an etch process to the first spacer and the second spacer; wherein the etch process removes the first spacer at a first etch rate; wherein the etch process removes the second spacer at a second etch rate; wherein the first etch rate is different than the second etch rate. 1. A method for forming a semiconductor device , the method comprising:forming a first spacer comprising a first material on a substrate;depositing a block copolymer on a sidewall of the first spacer, the block copolymer assembling into alternating regions of a first polymer and a second polymer after a directed self-assembly (DSA);removing the first polymer such that the second polymer defines a second spacer comprising a second material on the substrate, the second spacer adjacent to the first spacer; andapplying an etch process to the first spacer and the second spacer;wherein the etch process removes the first spacer at a first etch rate;wherein the etch process removes the second spacer at a second etch rate;wherein the first etch rate is different than the second etch rate.2. The method of claim 1 , wherein the first etch rate is greater than the second etch rate and the second etch rate is zero or effectively zero claim 1 , such that a portion of the second material remains after the first material is removed during the etch process.3. The method of claim 1 , wherein forming the first spacer further comprises:forming a sacrificial material layer overlying the substrate;depositing a hard mask layer on top of the substrate, the hard mask layer between the substrate and the sacrificial material layer;removing portions of the sacrificial ...

INTEGRATED CIRCUIT HAVING OXIDIZED GATE CUT REGION AND METHOD TO FABRICATE SAME

A method includes epitaxially depositing source/drains on parallel semiconductor fins having parallel polysilicon gate precursor structures disposed thereon orthogonally to the fins, where two adjacent polysilicon gate precursor structures are joined together and connected at ends thereof by a polysilicon loop portion. The method further includes oxidizing the ends of the polysilicon precursor gate structures, the connecting polysilicon loop portion and any semiconductor nodules that formed on the connecting polysilicon loop portion during the step of epitaxially depositing the source/drains. A structure includes a substrate; a plurality of parallel semiconductor fins disposed on the substrate; a plurality of parallel metal gate structures overlying the plurality of fins and orthogonal to the plurality of fins; and a plurality of source/drain structures disposed on the fins. In the structure two adjacent metal gate structures are joined together and connected at end portions thereof by a loop portion comprised of a semiconductor oxide. 1. A method , comprising:epitaxially depositing source/drains on parallel semiconductor fins having parallel polysilicon gate precursor structures disposed thereon orthogonally to the fins, where two adjacent polysilicon gate precursor structures are joined together and connected at ends thereof by a polysilicon loop portion; andoxidizing the ends of the polysilicon precursor gate structures, the connecting polysilicon loop portion and any semiconductor nodules that formed on the connecting polysilicon loop portion during the step of epitaxially depositing the source/drains.2. The method as in claim 1 , where the step of epitaxially depositing the source/drains epitaxially deposits in situ doped source/drains.3. The method as in claim 1 , where the step of oxidizing comprises a step of forming thermal oxide using a wet oxidation process.4. The method as in claim 1 , where the step of oxidizing comprises a step of forming thermal oxide ...

DEPOSITION OF INTEGRATED PROTECTIVE MATERIAL INTO ZIRCONIUM CLADDING FOR NUCLEAR REACTORS BY HIGH-VELOCITY THERMAL APPLICATION

A zirconium alloy nuclear reactor cylindrical cladding has an inner Zr substrate surface (), an outer volume of protective material (), and an integrated middle volume () of zirconium oxide, zirconium and protective material, where the protective material is applied by impaction at a velocity greater than 340 meters/second to provide the integrated middle volume () resulting in structural integrity for the cladding. 1. A zirconium alloy nuclear reactor cylindrical cladding , subject to a nuclear reactor environment , the cladding having an inner surface and inner volume of zirconium alloy , an outer surface and outer volume of a protective material , selected from the group consisting of Ti—Al—C ceramic , iron-based alloy , Nanosteel® or an alloy consisting of Zr—Al , and an integrated middle volume of zirconium oxide , zirconium , and excess sound velocity impacted protective material where the highest density of protective material is at the cladding outer surface to protect the cladding from reactor environment and any further oxidation of the zirconium , where the integrated middle volume provides structural integrity for the cladding.2. The nuclear reactor cylindrical cladding of claim 1 , wherein the protective material is a Ti—Al—C ceramic.3. The nuclear reactor cylindrical cladding of claim 1 , wherein the protective material is an iron-based alloy.4. The nuclear reactor cylindrical cladding of claim 1 , wherein the protective material is a Nanosteel®5. The nuclear reactor cylindrical cladding of claim 1 , wherein the protective material is a Zr—Al alloy.6. The nuclear reactor cylindrical cladding of claim 1 , wherein the protective material penetrates through zirconium oxide and into zirconium alloy due to an impact velocity greater than 340 meters/second.7. The nuclear reactor cylindrical cladding of claim 1 , wherein the protective material penetrates through zirconium oxide and into zirconium alloy due to impact velocity between 400 m/s and 1 claim 1 , ...

ELECTROMAGNETIC-FORCE-BASED DEWATERING FOR SEWAGE SLUDGE REDUCTION

For sewage sludge reduction, an apparatus includes a front-end auxiliary filter plate, a back-end auxiliary filter plate, and a plurality of filter plate modules disposed between the front-end auxiliary filter plate and the back-end auxiliary filter plate. Each filter plate module includes a middle main filter plate, a middle auxiliary filter plate, and a plurality of electromagnetic modules comprising an electromagnetic coil wound around an electromagnetic core. The middle main filter plate and the middle auxiliary filter plate are disposed at opposite sides of the electromagnetic modules. A plurality of microwave generators send microwaves through microwave acting channels to irradiate the sewage sludge. An electric current is applied to the electromagnetic coil, attracting the middle auxiliary filter plates and the main filter plates and applying pressure to the sewage sludge. 1. An apparatus comprising:a front-end auxiliary filter plate;a back-end auxiliary filter plate;a plurality of filter plate modules disposed between the front-end auxiliary filter plate and the back-end auxiliary filter plate, wherein each of the filter plate modules includes a middle main filter plate, a middle auxiliary filter plate, and a plurality of electromagnetic modules comprising an electromagnetic coil wound around an electromagnetic core, the middle main filter plate and the middle auxiliary filter plate are disposed at opposite sides of the electromagnetic modules, the middle main filter plates of the plurality of filter plate modules face the front-end auxiliary filter plate and the middle auxiliary filter plate of the plurality of filter plate modules face the back-end auxiliary filter plate and there is a consistent one-to-one match between the main filter plates and the auxiliary filter plates that form a plurality of filter chambers into which sewage sludge enters via sludge inlet pipes, wherein the outer side of the front-end auxiliary filter plate and the inner side of ...

GRAIN BOUNDARY ENHANCED UN AND U3Si2 PELLETS WITH IMPROVED OXIDATION RESISTANCE

A method of forming a water resistant boundary on a fissile material for use in a water cooled nuclear reactor is described. The method comprises mixing a powdered fissile material selected from the group consisting of UN and USiwith an additive selected from oxidation resistant materials having a melting or softening point lower than the sintering temperature of the fissile material, pressing the mixed fissile and additive materials into a pellet, sintering the pellet to a temperature greater than the melting point of the additive. Alternatively, if the melting point of the oxidation resistant particles is greater than the sintering temperature of UN or USi, then the oxidation resistant particles can have a particle size distribution less than that of the UN or USi

FORMING A SACRIFICIAL LINER FOR DUAL CHANNEL DEVICES

A semiconductor device includes one or more fins. Each fin includes a top channel portion formed from a channel material, a middle portion, and a bottom substrate portion formed from a same material as an underlying substrate. An oxide layer is formed between the bottom substrate portion of each fin and the isolation layer, with a space between a sidewall of at least a top portion of the isolation dielectric layer and an adjacent sidewall of the one or more fins, above the oxide layer. A gate dielectric, protruding into the space and in contact with the middle portion, is formed over the one or more fins and has a portion formed from a material different from the oxide layer. 1. A method comprising:providing a substrate having thereon a layer of epitaxial channel material;patterning a hardmask above the layer of epitaxial channel material;performing a first etch to a first depth, using the hardmask as a mask, to form an upper portion of a fin, wherein the first depth extends beyond a bottom surface of the layer of epitaxial channel material;forming a liner over exposed surfaces of the upper portion of the fin;performing a second etch to a second depth, using the liner as a mask, to form a lower portion of the fin;removing the liner; andforming a gate dielectric disposed on exposed surfaces of the upper portion of the fin.2. The method of claim 1 , further comprising:oxidizing exposed surfaces of the lower portion of the fin prior to removing the liner.3. A method comprising:providing a substrate having thereon a layer of epitaxial channel material;patterning a hardmask above the layer of epitaxial channel material;performing a first etch, using the hardmask as a mask, to form an upper portion of a first fin and an upper portion of a second fin, the first fin adjacent to the second fin, the first etch extending past a bottom surface of the layer of epitaxial channel material;forming a liner over exposed surfaces of the upper portions of the first and second fins; ...

COMPUTING APPARATUS

A calculating apparatus includes a baseplate, a first mother board module and a connection module. The baseplate includes a bottom surface having a first component layout region, a second component layout region and a connection component layout region all arranged in order from a first side to a second side of the bottom surface. The first mother board is drawably disposed at the first component layout region of the bottom surface. The first mother board includes a first tray, a first control board, and a first electronic hard disk drive. The connection module is electrically connected to the first mother board module so that the first mother board module is capable of performing external communication through the connection module. 1. A computing apparatus , comprising:a baseplate having a bottom surface that has a first side and a second side opposite to the first side along a first direction, and has a first component layout region, a second component layout region, and a connection component layout region, the first component layout region extending from the first side of the bottom surface to the second side of the bottom surface, and the connection component layout region being farther from the first side of the bottom surface than the first and second component layout regions;a first mother board module drawably disposed at the first component layout region of the bottom surface and comprising:a first tray disposed at the first component layout region of the bottom surface;a first mother board disposed on the first tray and comprising a first central processing unit, a first electric connection port, and a second electric connection port;a first middle plate electrically connected to the first mother board, comprising a third electric connection port, disposed on the first tray, and being farther from the first side of the bottom surface than the first mother board;a first control board comprising a first serial transmission interface connection port and ...

VERTICAL FIELD EFFECT TRANSISTORS WITH UNIFORM THRESHOLD VOLTAGE

Provided is a semiconductor structure. In one or more embodiments of the invention, a semiconductor fin on a substrate is provided. A spacer layer is on a surface of the substrate. A high dielectric constant layer is provided, wherein a first portion of the high dielectric constant layer is on sidewalls of the semiconductor fin, and a second portion of the high dielectric constant layer is over the spacer layer. A work function metal layer is on sidewalls of the semiconductor fin, wherein the work function metal layer has a uniform thickness. 1. A semiconductor structure , comprising:a semiconductor fin on a substrate;a spacer layer on a surface of the substrate;a high dielectric constant layer, wherein a first portion of the high dielectric constant layer is on sidewalls of the semiconductor fin, and a second portion of the high dielectric constant layer is over the spacer layer; anda work function metal layer on sidewalls of the semiconductor fin, wherein the work function metal layer has a uniform thickness.2. The structure according to claim 1 , wherein the work function metal layer is on the high dielectric constant layer.3. The structure according to claim 2 , wherein the high dielectric constant layer and the work function metal layer are on the spacer layer.4. The structure according to claim 2 , wherein a combined width of the high dielectric constant layer and the work function metal layer is from about 2 to about 7 nm.5. The structure according to claim 2 , wherein:a plurality of semiconductor fins are arranged in a direction; andthe thickness of the work function metal layer is uniform in the direction.6. The structure of claim 2 , further comprising a top source/drain region formed on a top portion of the semiconductor fin.7. The structure of claim 6 , wherein the source/drain region has a dopant concentration between about 2×10cmto 1×10cm.8. The structure of claim 2 , wherein the semiconductor fin is recessed.9. The structure of claim 2 , further ...

BUTTON

A button is disclosed. The button includes: a lower button shell, which is a hollow structure with an upper opening, and is provided with a first sliding pin hole through a side wail of the lower button shell; an upper button shell, which is a hollow structure with a lower opening, wherein a side wall of the upper button shell is provided with a second sliding pin hole, the upper button shell is sleeved on the lower button shell, and the second sliding pin hole is directly opposite to the first sliding pin hole; a moveable tray, which is located at a central position in the lower button shell; a sliding arm, one end of which is rotatably connected to the moveable tray; a sliding pin, which is located in the lower button shell. 1. A button , comprising:a lower button shell, having a hollow structure with an upper opening, provided with a first sliding pin hole through a side wall of the lower button shell;an upper button shell, having a hollow structure with a lower opening, wherein a side wall of the upper button shell is provided with a second sliding pin hole, the upper button shell is sleeved on the lower button shell, and the second sliding pin hole is directly opposite to the first sliding pin hole;a moveable tray, located at a central position in the lower button shell;a sliding arm, having a first end of rotatably connected to the moveable tray;a sliding pin, located in the lower button shell, wherein one end of the sliding pin is rotatably connected with a second end of the sliding arm which is apart from the moveable tray, wherein the second end of the sliding pin extends through the first sliding pin hole into the second sliding pin hole to prevent a up-and-down movement of the upper button shell relative to the lower button shell from being separated from the lower button shell;wherein, the moveable tray is configured to use the sliding arm to drive the sliding pin to move horizontally into the lower button shell and separate the sliding pin from the ...

MULTI-LAYER FILLED GATE CUT TO PREVENT POWER RAIL SHORTING TO GATE STRUCTURE

A method of forming a power rail to semiconductor devices that includes forming a gate structure extending from a first active region to a second active region of a substrate, and removing a portion of the gate structure forming a gate cut trench separating the first active region from the second active region. A fill material of an alternating sequence of at least two different composition conformally deposited dielectric layers is formed within the gate cut trench. A power rail is formed in the gate cut trench. An aspect ratio of the vertically orientated portions of the alternating sequence of the at least two different composition conformally deposited dielectric layer obstructs lateral etching of the gate cut trench during etching to form a power rail opening for housing the power rail. 1. An electrical device comprising:a first active region having a first gate structure;a second active region having a second gate structure, wherein the first and second gate structures are aligned to one another and separated by a gate cut trench;an alternating sequence of a first dielectric conformal layer and a second dielectric conformal layer filling a lower portion of the gate cut trench, wherein a core of one of the first and second conformal dielectric layers is centrally positioned in the lower portion of the gate cut trench; anda power rail in an upper portion of the gate cut trench.2. The electrical device of claim 1 , wherein the first gate structure is present on a channel region on at least one fin structure in the first active region3. The electrical device of claim 1 , wherein the second gate structure is present on at least one fin structure in the second active region.4. The electrical device of claim 1 , wherein the aspect ratio of the vertically orientated portions of the alternating sequence of the nitride containing conformal layer and the oxide containing conformal layer have a height to width ration of 5:1 or greater.5. The electrical device of claim 1 , ...

FORMATION OF INNER SPACER ON NANOSHEET MOSFET

A method of forming a field effect transistor (FET) includes performing an oxidation on a nanosheet structure having alternating sheets of silicon and silicon germanium. An oxide etch is performed to remove portions of the sheets of silicon germanium. Other embodiments are also described herein. 1. A method of forming portions of a transistor , the method comprising:performing an oxidation on alternating sheets of silicon and silicon germanium of a nanosheet structure; andperforming an oxide etch to remove portions of the sheets of silicon germanium; wherein:{'b': '2', 'sub': '2', 'the oxide etch is an isotropic oxide etch (SiO and GeO) that is configured to remove more material from the sheets silicon germanium than the sheets of silicon and further configured such that approximately the same amount of material is removed from each sheet.'}2. The method of wherein:performing the oxidation comprises performing a low-temperature radio-frequency plasma oxidation.3. The method of wherein:the low-temperature radio-frequency plasma oxidation is configured to oxidize the sheets of silicon germanium more than the sheets of silicon.4. (canceled)5. The method of wherein:the oxide etch is an isotropic dry oxide etch configured to remove more material from the sheets of silicon germanium than the sheets of silicon.6. The method of wherein:the isotropic dry etch comprises the use of ammonia with fluorine as a reaction gas.7. The method of wherein:a dummy gate structure is positioned above the alternating sheets of silicon and silicon germanium.8. The method of further comprising:depositing a hard mask layer on the nanosheet structure;oxidizing the hard mask layer;removing portions of the hard mask layer to reveal areas of the nanosheet structure to be etched;etching the revealed areas of the nanosheet structure; andremoving the hard mask layer.9. The method of wherein:the hard mask layer is a nitride.10. The method of wherein:the hard mask is selected from SiN, atomic layer ...

ILD PROTECTION IN VFET DEVICES

A method of forming a semiconductor device and resulting structures having an etch-resistant interlayer dielectric (ILD) that maintains height during a top epitaxy clean by forming a dielectric layer on a semiconductor structure; wherein the dielectric layer includes a first dielectric material; converting at least a portion of the dielectric layer to a second dielectric material; and exposing the portion of the dielectric layer to an etch material; wherein the etch material includes a first etch characteristic defining a first rate at which the etch material etches the first dielectric material; and wherein the etch material further includes a second etch characteristic defining a second rate at which the etch material etches the portion of the dielectric layer; wherein the first rate is different than the second rate. 1. A method for forming a semiconductor device , the method comprising:forming a dielectric layer on a semiconductor structure;wherein the dielectric layer comprises a first dielectric material;converting at least a portion of the dielectric layer to a second dielectric material; andexposing the portion of the dielectric layer to an etch material;wherein the etch material comprises a first etch characteristic comprising a first rate at which the etch material etches the first dielectric material; andwherein the etch material further comprises a second etch characteristic comprising a second rate at which the etch material etches the portion of the dielectric layer;wherein the first rate is different than the second rate.2. The method of claim 1 , wherein forming the semiconductor structure comprises:forming a bottom epitaxy region on a substrate;forming a semiconductor fin on the bottom epitaxy region;forming a gate stack over a channel region of the semiconductor fin;forming a hard mask overlying the semiconductor fin; andforming a conformal liner on the substrate, the gate stack, and the hard mask.3. The method of claim 1 , wherein exposing the ...

COLD SPRAY CHROMIUM COATING FOR NUCLEAR FUEL RODS

A zirconium alloy cladding tube for use in a water cooled nuclear reactor under normal operating conditions and under high temperature oxidation conditions is described. The cladding tube has a coating uniformly deposited thereon. The coating, which may be up to 300 microns thick, is selected from the group consisting of chromium, a chromium-based alloy, and combinations thereof. 1. A cladding tube for use in a water cooled nuclear reactor comprising:a cladding tube formed from a zirconium alloy and having a coating uniformly deposited thereon, the coating selected from the group consisting of chromium, a chromium-based alloy, and combinations thereof.2. The cladding tube recited in wherein the coating is up to 300 microns thick.3. The cladding tube recited in wherein the coating is a Cr-based alloy comprising at least one element selected from the group consisting of silicon claim 1 , yttrium claim 1 , aluminum claim 1 , titanium claim 1 , niobium claim 1 , zirconium claim 1 , and transition metal elements claim 1 , at a combined content of 0.1 to 20 atomic %.4. The cladding tube recited in wherein the coating is a Cr-based alloy comprises 80 to 99 atom % of chromium. This application is a division of co-pending U.S. application Ser. No. 15/284,076 filed Oct. 3, 2016, which claims priority from U.S. Provisional Application Ser. No. 62/365,518 filed Jul. 22, 2016 and incorporated herein by reference.This invention was made with government support under Contract No. DE-NE0008222 awarded by the Department of Energy. The U.S. Government has certain rights in this invention.The invention relates to coatings for nuclear fuel rod cladding, and more particularly to the use of cold spray methods for depositing chromium on a zirconium alloy flat, cylindrical, or tubular substrate.Zirconium alloys rapidly react with steam at temperatures of 1100° C. and above to form zirconium oxide and hydrogen. In the environment of a nuclear reactor, the hydrogen produced from that ...

VFET DEVICES WITH ILD PROTECTION

A method of forming a semiconductor device and resulting structures having an etch-resistant interlayer dielectric (ILD) that maintains height during a top epitaxy clean by forming a dielectric layer on a semiconductor structure; wherein the dielectric layer includes a first dielectric material; converting at least a portion of the dielectric layer to a second dielectric material; and exposing the portion of the dielectric layer to an etch material; wherein the etch material includes a first etch characteristic defining a first rate at which the etch material etches the first dielectric material; and wherein the etch material further includes a second etch characteristic defining a second rate at which the etch material etches the portion of the dielectric layer; wherein the first rate is different than the second rate. 1. A semiconductor device having an etch-resistant interlayer dielectric (ILD) during a top epitaxy clean , the device comprising:a semiconductor structure;a dielectric layer formed on the semiconductor structure;a first material implanted in a first portion of the dielectric layer to form a second material, the second material having a higher etch resistance than the dielectric layer with respect to an etch material; anda top epitaxy region formed on a pre-cleaned surface of a semiconductor fin of the semiconductor structure.2. The device of claim 1 , the semiconductor structure further comprising:a substrate;a bottom epitaxy region formed on the substrate;a semiconductor fin formed on the bottom epitaxy region;a gate stack formed over a channel region of the semiconductor fin;a hard mask overlying the semiconductor fin; anda conformal liner formed on the substrate, the gate stack, and the hard mask.3. The device of claim 1 , wherein the dielectric layer is silicon dioxide (SiO) claim 1 , the first material is nitrogen claim 1 , and the second material is a silicon oxynitride (SiON).4. The method of claim 1 , wherein the first portion of the ...

AIRGAP FORMATION IN BEOL INTERCONNECT STRUCTURE USING SIDEWALL IMAGE TRANSFER

A method and structure of forming air gaps with a sidewall image transfer process such as self-aligned double patterning to reduce capacitances. Different materials can be provided in the mandrel and non-mandrel regions to enlarge a process window for metal line end formation. 1. A back end of the line (BEOL) interconnect structure comprising:a plurality of lines comprising a metal conductor separated by a space having a width of less than 20 nm, wherein the plurality of metal conductor lines are provided on an ultralow k dielectric; andan oxide provided in the space including an airgap therein.2. The BEOL interconnect structure of claim 1 , wherein the metal conductor comprises Cu claim 1 , Co claim 1 , Al claim 1 , AlCu claim 1 , Ti claim 1 , TiN claim 1 , Ta claim 1 , TaN claim 1 , W claim 1 , WN claim 1 , MoN claim 1 , Pt claim 1 , Pd claim 1 , Os claim 1 , Ru claim 1 , IrO2 claim 1 , ReO2 claim 1 , ReO3 claim 1 , alloys thereof claim 1 , or mixtures thereof.3. The BEOL interconnect structure of claim 1 , wherein the metal conductor comprises copper or copper and an alloying element.4. The BEOL interconnect structure of claim 3 , wherein the alloying element is in an amount from about 0.001 weight percent (wt. %) to about 10 wt %.5. The BEOL interconnect structure of claim 1 , wherein the ultralow k dielectric is intermediate line ends.6. The BEOL interconnect structure of further comprising a first insulator intermediate line ends of at least one of the plurality of the plurality of metal conductor lines corresponding to a mandrel region and a second insulator intermediate line ends of at least one of the plurality of the plurality of metal conductor lines corresponding to a non-mandrel region claim 1 , wherein the first insulator is a different material than the second insulator.7. The BEOL interconnect structure of claim 1 , wherein an oxide and/or a nitride is intermediate line ends.8. The BEOL interconnect structure of claim 1 , wherein the plurality of ...