Настройки

Укажите год
-

Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

Подробнее
-

Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

Подробнее

Форма поиска

Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
Ведите корректный номера.
Ведите корректный номера.
Ведите корректный номера.
Ведите корректный номера.
Укажите год
Укажите год
Применить Всего найдено 859. Отображено 100.
19-01-2012 дата публикации

SEMICONDUCTOR MEMORY DEVICE

Номер: US20120012807A1
Автор: Aoki Shinya, Ichihara Reika, Inoue Hirofumi, Sekine Katsuyuki, Shigeoka Takashi, Tsukamoto Takayuki, YAMAGUCHI Takeshi
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A semiconductor memory device in an embodiment comprises memory cells, each of the memory cells disposed between a first line and a second line and having a variable resistance element and a switching element connected in series. The variable resistance element includes a variable resistance layer configured to change in resistance value thereof between a low-resistance state and a high-resistance state. The variable resistance layer is configured by a transition metal oxide. A ratio of transition metal and oxygen configuring the transition metal oxide varies between 1:1 and 1:2 along a first direction directed from the first line to the second line. 1. A semiconductor memory device comprising memory cells , each of the memory cells disposed between a first line and a second line and comprising a variable resistance element and a switching element connected in series ,the variable resistance element comprising a variable resistance layer configured to change in resistance value thereof between a low-resistance state and a high-resistance state,the variable resistance layer being configured by a transition metal oxide, anda ratio of transition metal and oxygen configuring the transition metal oxide varying between 1:1 and 1:2 along a first direction directed from the first line to the second line.2. The semiconductor memory device according to claim 1 , whereinthe variable resistance element further comprises a buffer layer formed in contact with one end of the variable resistance layer and configured to absorb oxygen included in the variable resistance layer according to a voltage applied along the first direction.3. The semiconductor memory device according to claim 1 , whereinthe transition metal oxide includes hafnium.4. The semiconductor memory device according to claim 2 , whereinthe buffer layer includes a transition metal.5. The semiconductor memory device according to claim 2 , wherein{'sub': x', 'x, 'the buffer layer includes any one of SiO, AlO, SiN, and ...

Подробнее
Номер записи: 1
23-02-2012 дата публикации

IMAGE PROCESSING APPARATUS, MANAGEMENT SYSTEM AND CONTROL METHOD THEREOF

Номер: US20120044539A1
Автор: YAMAGUCHI Takeshi
Принадлежит: SHARP KABUSHIKI KAISHA

In an image processing apparatus, an HDD stores registration data, an operation unit receives an instruction requesting erasure of the registration data, and a control unit erases the registration data and restricts operations of the image processing apparatus in response to the instruction. Further, the HDD stores unique information unique to the image processing apparatus and changeable information that is changed in response to the erasure of registration data. If it is determined that a cancellation key generated by a management server and received by the operation unit is a cancellation key corresponding to the unique information and the changeable information, the control unit cancels the operation restriction of the image processing apparatus. 1. An image processing apparatus executing a process corresponding to a requested function , comprising:a first storage unit storing registration information registered for executing said function;a receiving unit receiving an instruction requesting erasure of the registration information stored in said first storage unit;an erasing unit, responsive to reception of the instruction by said receiving unit, for erasing the registration information stored in said first storage unit;a restricting unit, responsive to erasure of the registration information by said erasing unit, for restricting an operation of the image processing apparatus;a second storage unit storing unique information unique to the image processing apparatus and changeable information changed in response to the erasure of the registration information by said erasing unit;an input unit receiving an input of cancellation information for cancelling the operation restriction imposed by said restricting unit;a determining unit, responsive to said input unit receiving input of said cancellation information, for determining whether said received cancellation information is cancellation information corresponding to said unique information and said changeable ...

Подробнее
Номер записи: 2
22-03-2012 дата публикации

Portable wireless device

Номер: US20120068895A1
Автор: Takeshi Yamaguchi
Принадлежит: Panasonic Corp

A portable wireless device includes: a first housing including therein an antenna element and a circuit board disposed in parallel therewith; a second housing disposed to overlap with the first housing; and a tilt holding member including a hinge part which rotatably connects one end side of the first housing and one end side of the second housing to each other and which is configured to hold the second housing in a state in which the second housing is tilted with respect to the first housing. The tilt holding member includes a cored bar made of a metal material disposed along an arrangement direction of the circuit board and the antenna element. The cored bar is divided outside an arrangement range of the circuit board at the antenna element side in the arrangement direction.

Подробнее
Номер записи: 3
26-04-2012 дата публикации

MOBILE ELECTRONIC DEVICE

Номер: US20120098851A1
Автор: Osaka Masashi, YAMAGUCHI Takeshi
Принадлежит: KYOCERA CORPORATION

According to one embodiment, a mobile electronic device includes an image projection unit for projecting an image, an image display unit for displaying an image, and a control unit for controlling the image projection unit and the image display unit. When the image projection unit projects an image and the image display unit displays an image, the control unit performs control for making the chromaticity of the image projected by the image projection unit and the chromaticity of the image displayed by the image display unit match each other. 1. A mobile electronic device comprising:an image projection unit for projecting an image;an image display unit for displaying an image; anda control unit for controlling the image projection unit and the image display unit,wherein the control unit performs, when the image projection unit projects an image and the image display unit displays an image, control for making the chromaticity of the image projected by the image projection unit and the chromaticity of the image displayed by the image display unit match each other.2. The mobile electronic device according to claim 1 ,wherein the control unit performs control such that the chromaticity of the image displayed by the image display unit matches the chromaticity of the image projected by the image projection unit.3. The mobile electronic device according to claim 2 ,wherein the image projection unit projects an image by performing a color-mixing with respect to lights of a plurality of colors, and emits the light of a most contributing color to luminance, among the lights of the plurality of colors, in a larger amount than those of the lights of the other colors, andthe image display unit displays an image by performing the color-mixing with respect to the lights of the plurality of colors.4. The mobile electronic device according to claim 3 ,wherein the control unit performs control such that the lights of the other colors are emitted in a smaller amount than that of the ...

Подробнее
Номер записи: 4
23-08-2012 дата публикации

RESIN INJECTION MOLDING METHOD

Номер: US20120211921A1
Автор: Imaeda Satoshi, Kariya Toshihiko, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит: Mitsubishi Heavy Industries Plastic Technology Co., Ltd.

The resin injection molding method of the present invention is a method for molding resins inside a cavity formed within a mold. The method comprises injecting resins into the cavity through a plurality of paths installed so as to be openable and closable and optionally maintaining the resin inside the cavity at a pressure; closing each of the plurality of paths such that the resins injected from each path converge, there being a time difference between when a first path and a second path of the plurality of paths are closed; and solidifying at least the resin which is injected from the path closed earliest with a crystallinity greater than or equal to a predetermined crystallinity degree. 1. A method for molding resins inside a cavity formed within a mold , the method comprising:injecting resins into the cavity through a plurality of paths installed so as to be openable and closable and optionally maintaining the resin inside the cavity at a pressure;closing each of the plurality of paths such that the resins injected from each path converge, there being a time difference between when a first path and a second path of the plurality of paths are closed, by which the resin from the first path submerges into the resin from the second path; andsolidifying at least the resin which is injected from the path closed earliest with a crystallinity greater than or equal to a predetermined crystallinity degree.2. A method for molding resins inside a cavity formed within a mold , the method comprising:injecting resins into the cavity through a plurality of paths installed so as to be openable and closable and optionally maintaining the resin inside the cavity at a pressure;closing each of the plurality of paths such that the resins injected from each path converge, there being a time difference between when a first path of the plurality of paths is injected the resin and optionally maintained the resin inside the cavity at pressure which is completed maintaining at pressure and ...

Подробнее
Номер записи: 5
30-08-2012 дата публикации

NONVOLATILE STORAGE DEVICE

Номер: US20120217464A1
Автор: AOYAMA Kenji, ISHIKAWA Satoshi, KOBAYASHI Shigeki, NAKAO Shinichi, OSHINO Shigeto, WATANABE Kei, YAMAGUCHI Takeshi, Yamamoto Kazuhiko
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A nonvolatile storage device is formed by laminating a plurality of memory cell arrays, the memory cell array including a plurality of word lines, a plurality of bit lines, and memory cells. The memory cell includes a current rectifying device and a variable resistance device, the variable resistance device includes a lower electrode, an upper electrode, and a resistance change layer including a conductive nano material formed between the lower electrode and the upper electrode, one of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the lower electrode serving as a cathode, the other of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the upper electrode serving as a cathode. 1. A nonvolatile storage device formed by laminating a plurality of memory cell arrays , the memory cell array including a plurality of word lines arranged in parallel , a plurality of bit lines arranged in parallel and crossing these word lines , and memory cells each connected between a word line and a bit line at a crossing portion between the word line and the bit line , the plurality of memory cell arrays being laminated in such a manner as to share word lines or bit lines of adjacent memory cell arrays ,the memory cell including a current rectifying device and a variable resistance device connected in series,the current rectifying devices provided adjacent to each other in a laminating direction passing currents in directions opposite to each other,the variable resistance device including a lower electrode, an upper electrode, and a resistance change layer including a conductive nano material formed between the lower electrode and the upper electrode,one of the variable resistance devices provided adjacent to each other in the laminating direction having titanium oxide ( ...

Подробнее
Номер записи: 6
15-11-2012 дата публикации

INJECTION MOLDING METHOD, MOLDED-ARTICLE PRODUCING METHOD, AND INJECTION MOLDING APPARATUS

Номер: US20120286451A1
Автор: Imaeda Satoshi, Kariya Toshihiko, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит: MITSUBISHI HEAVY INDUSTRIES PLASTIC TECHNOLOGY CO., LTD

The injection molding method for injecting a resin into a cavity formed within a mold is provided with a heating step in which the temperature of a cavity surface forming the cavity of the mold is heated to a temperature equal to or higher than a heat distortion temperature of the resin and an injection step in which after the heating step, during a decrease in temperature of the cavity surface of the mold, the resin is injected into the cavity. 1. An injection molding method for injecting a resin into a cavity formed within a mold ,the injection molding method comprising:a heating step for heating a temperature of a cavity surface which forms the cavity of the mold to a temperature equal to or higher than a heat distortion temperature of the resin; andan injection step for injecting the resin into the cavity during a decrease in temperature of the cavity surface of the mold after the heating step.2. The injection molding method according to claim 1 , wherein claim 1 ,in the injection step, the resin is injected into the cavity when the temperature of the cavity surface of the mold reaches a predetermined temperature equal to or higher than the heat distortion temperature of the resin.3. The injection molding method according to claim 1 , whereinin the injection step, the temperature of the cavity surface at the time when the resin is in contact with the entire cavity surface of the mold is set so as to be equal to or higher than the heat distortion temperature of the resin.4. The injection molding method according to claim 1 , whereinthe resin is a resin which contains a filler, and the heat distortion temperature is a heat distortion temperature of the resin which is a matrix component of the resin which contains the filler.5. The injection molding method according to claim 3 , whereinin the injection step, after the resin is in contact with the entire cavity surface of the mold, the cooling speed of the cavity surface is increased.6. The injection molding method ...

Подробнее
Номер записи: 7
24-01-2013 дата публикации

COMPUTER PROGRAM PRODUCT

Номер: US20130023314A1
Автор: Matsuura Junichiro, Moriguchi Masaru, SUMI Masayuki, YAMAGUCHI Takeshi
Принадлежит:

An object of the present invention is to propose image processing technology whereby even a player with a low skill level can enjoy a shooting game with more excitement. To achieve this object, according to the present invention, if a player outputs a slow regeneration request signal when processing transits to the status where an enemy-character is about to fire a bullet, the enemy-character and the bullet fired by the enemy-character are regenerated slowly. By this, the player can aim at the bullet with extra time. 1. A computer program product , in which a player-character who virtually fires bullets responding to the input operation of a player , and an enemy-character who is computer-controlled to virtually fire bullets at said player-character are disposed in a virtual space , and a computer program for causing a computer system to execute processing for displaying the status in said virtual space viewed from a virtual viewpoint on a screen is recorded in a computer-readable recording medium , wherein said computer program causes said computer system to determine whether a visual effects request for requesting visual effects processing was input by a player , if said visual effects request was input , said computer program causes said computer system to execute image display processing with visual effects such that the display speed of at least said enemy-character and each one of the bullets fired from said enemy-character becomes slower than the display speed of objects displayed in association with the player operation , said computer causes said computer system to determine whether at least one of said enemy-characters to be the shooting target and the bullet fired from said enemy-character will collide with the moving locus of the bullet fired from said player character , if said shooting target will collide with the moving locus of the bullet fired from said player-character , said computer program causes said computer system to display the image of said ...

Подробнее
Номер записи: 8
24-01-2013 дата публикации

SYSTEMS, METHODS, AND APPARATUS FOR PREVENTING RECIDIVISM

Номер: US20130024124A1
Автор: Collazo Christopher J., Gice Jonathan H., Mealey Karen W., Seidner Adam L., Wendling Wayne, YAMAGUCHI Takeshi, Yanowicz Jared M.
Принадлежит: THE TRAVELERS COMPANIES, INC.

Systems, apparatus, methods and articles of manufacture provide for assessing a likelihood of recidivism for persons (e.g., patients, injured workers). In some embodiments, information such as claim information, employment information, personal information, and/or medical information, may be used in determining a recidivism score or other indication or measure of a likelihood of recidivism. 1. An apparatus comprising:a processor; and determining information about a medical condition of a person;', 'determining at least one of: personal information associated with the person, claim information associated with the person, and employment information associated with the person; and', 'determining an indication of a likelihood of recidivism for the person based on (i) the information about the medical condition and (ii) at least one of the personal information, claim information, and employment information., 'a computer-readable memory in communication with the processor, the computer-readable memory storing instructions that when executed by the processor result in2. The apparatus of claim 1 , wherein determining the indication of the likelihood of recidivism comprises:generating a recidivism score.3. The apparatus of claim 1 , wherein determining the information about the medical condition comprises:determining at least one of: an injury type, an indication of a similar injury, an indication of an initial treatment of the medical condition, an indication of a change in a primary diagnosis, at least one comorbidity of the person, an indication of a diagnosis code, and an indication of whether a surgery was performed on the person.4. The apparatus of claim 1 , wherein determining the personal information comprises:determining at least one of: a date of birth of the person, a gender of the person, an indication of whether the person speaks a predetermined language, and a marital status of the person.5. The apparatus of claim 1 , wherein determining the claim information ...

Подробнее
Номер записи: 9
14-03-2013 дата публикации

SIGNAL PROCESSING APPARATUS, SIGNAL PROCESSING METHOD, AND PROGRAM

Номер: US20130063539A1
Автор: Kato Yasuhiko, Kihara Nobuyuki, Sakuraba Yohei, YAMAGUCHI Takeshi
Принадлежит: SONY CORPORATION

A signal processing apparatus includes: an audio separator that separates audios into a first audio and a second audio using two inputted audio signals; an audio combiner that combines the first audio with the second audio based on proportions of the audios separated by the audio separator; and an image combiner that combines a first image corresponding to the first audio with a second image corresponding to the second audio based on the proportions of the audios separated by the audio separator. 1. A signal processing apparatus comprising:an audio separator that separates audios into a first audio and a second audio using two inputted audio signals;an audio combiner that combines the first audio with the second audio based on proportions of the audios separated by the audio separator; andan image combiner that combines a first image corresponding to the first audio with a second image corresponding to the second audio based on the proportions of the audios separated by the audio separator.2. The signal processing apparatus according to claim 1 , further comprising:a first microphone that inputs one of the two audio signals that contains a greater amount of the first audio;a second microphone that inputs the other one of the two audio signals that contains a greater amount of the second audio;a first camera that inputs a signal carrying the first image; anda second camera that inputs a signal carrying the second image.3. The signal processing apparatus according to claim 2 ,wherein the first microphone and the first camera are disposed on one surface of an enclosure, andthe second microphone and the second camera are disposed on a surface different from the one surface of the enclosure.4. The signal processing apparatus according to claim 3 , further comprising:an operation input unit that inputs proportions of the first image and the second image in accordance with user operation; anda proportion changer that changes the proportions of the separated audios in ...

Подробнее
Номер записи: 10
16-05-2013 дата публикации

METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE

Номер: US20130119342A1
Автор: Fukumizu Hiroyuki, YAMAGUCHI Takeshi
Принадлежит:

According to one embodiment, a method is disclosed for manufacturing a semiconductor memory device. The method can include introducing halogen in a contact layer with a resistance variation film including a metal oxide. The method can include diffusing the halogen from the contact layer to the resistance variation film by a thermal treatment. 1. A method for manufacturing a semiconductor memory device , comprising:introducing halogen in a contact layer with a resistance variation film including a metal oxide; anddiffusing the halogen from the contact layer to the resistance variation film by a thermal treatment.2. The method according to claim 1 ,wherein after forming a lower electrode as the contact layer, the halogen is introduced into the lower electrode by an ion implantation method, andafter forming the resistance variation film on the lower electrode into which the halogen is introduced, the halogen is diffused from the lower electrode to the resistance variation film by the thermal treatment.3. The method according to claim 2 , wherein the lower electrode includes a silicon film.4. The method according to claim 1 ,wherein after forming an upper electrode as the contact layer on the resistance variation film, the halogen is introduced into the upper electrode by an ion implantation method, andthe halogen is diffused from the upper electrode to the resistance variation film by the thermal treatment.5. The method according to claim 4 , wherein the upper electrode includes a silicon film.6. The method according to claim 1 , further comprising:exposing a side wall of the resistance variation film; andforming an interlayer insulating film containing the halogen on the side wall of the resistance variation film,the halogen being diffused from the interlayer insulating film to the resistance variation film by the thermal treatment.7. The method according to claim 1 , wherein the halogen is fluorine.8. A method for manufacturing a semiconductor memory device claim 1 , ...

Подробнее
Номер записи: 11
20-06-2013 дата публикации

Game device, method of controlling a game device, and information storage medium

Номер: US20130157762A1
Автор: Takaki Inazumi, Takashi Yamaguchi, Takeshi Yamaguchi, Yasushi Kawasaki
Принадлежит: Konami Digital Entertainment Co Ltd

A current value guide unit of a game device shows a user a current value of one game parameter indicating a current state of an operation subject. An action control unit causes the operation subject to perform an action in response to an operation performed by the user. A game parameter changing unit causes the one game parameter to change in a case where the operation subject moves, a case where the operation subject attacks an enemy, and a case where the operation subject receives damage due to an attack from the enemy. A determination unit determines whether or not the current value of the one game parameter is within a predetermined range. An inhibition unit inhibits the operation subject from performing an action when it is determined that the current value of the one game parameter is within the predetermined range.

Подробнее
Номер записи: 12
27-06-2013 дата публикации

COLOR CONVERSION TABLE CREATING DEVICE, COLOR CONVERSION TABLE CREATING METHOD, AND STORAGE MEDIUM

Номер: US20130163011A1
Автор: YAMAGUCHI Takeshi
Принадлежит: Konica Minolta Business Technologies, Inc.

Disclosed are a device, a method, and a storage medium to create a color conversion table. According to one implementation, a color conversion table creating device includes, a color material amount limiting processing section; a first color conversion processing section; a second color conversion processing section; a combining section; a color material amount limiting inverse conversion processing section; and an output value determining section. The color material amount limiting processing section performs color material amount limiting of an input value in the color conversion table. The color material limiting inverse conversion processing section performs inverse conversion of the color material amount limiting after color conversion and combining the CMYK components. The output value determining section sets the inverted CMYK color components as an output value in the color conversion table. 1. A color conversion table creating device which creates a color conversion table for color conversion from input image data including cyan , magenta , yellow , and black to output image data including cyan , magenta , yellow , and black , the device comprising:a color material amount limiting processing section which performs color material amount limiting which limits a total amount of color components for each combination of an input value in the color conversion table;a first color conversion processing section which performs color conversion on a cyan component, a magenta component, and a yellow component after the color material amount limiting by the color material amount limiting processing section, using a three dimensional table for color conversion from a cyan component, a magenta component, and a yellow component of the input image data to a cyan component, a magenta component, and a yellow component of the output image data;a second color conversion processing section which performs color conversion on a black component after the color material amount ...

Подробнее
Номер записи: 13
22-08-2013 дата публикации

Method for Forming Metal Oxides and Silicides in a Memory Device

Номер: US20130214238A1
Автор: Chiang Tony P., Minvielle Tim, Pramanik Dipankar, YAMAGUCHI Takeshi
Принадлежит:

Embodiments of the invention generally relate to memory devices and methods for fabricating such memory devices. In one embodiment, a method for fabricating a resistive switching memory device includes depositing a metallic layer on a lower electrode disposed on a substrate and exposing the metallic layer to an activated oxygen source while heating the substrate to an oxidizing temperature within a range from about 300° C. to about 600° C. and forming a metal oxide layer from an upper portion of the metallic layer during an oxidation process. The lower electrode contains a silicon material and the metallic layer contains hafnium or zirconium. Subsequent to the oxidation process, the method further includes heating the substrate to an annealing temperature within a range from greater than 600° C. to about 850° C. while forming a metal silicide layer from a lower portion of the metallic layer during a silicidation process. 1. A method for fabricating a resistive switching memory device , the method comprising: 'wherein the lower electrode comprises silicon;', 'providing a substrate comprising a lower electrode,'} the metallic layer comprises one of hafnium or zirconium,', 'the metallic layer having a lower portion facing the lower electrode and an upper portion facing away from the lower electrode;, 'forming a metallic layer on the lower electrode,'} 'wherein forming the metal oxide layer comprises heating the metallic layer to a temperature of less than 600° C. and exposing the metallic layer to an activated oxygen source; and', 'forming a metal oxide layer from the upper portion of the metallic layer,'} 'wherein forming the metal silicide layer comprises heating the metallic layer and the lower electrode to a temperature of greater than 600° C. and transferring a portion of the silicon from the lower electrode and into the lower portion of the metallic layer.', 'forming a metal silicide layer from the lower portion of the metallic layer,'}2. The method of claim 1 , ...

Подробнее
Номер записи: 14
29-08-2013 дата публикации

Memory Cell Having an Integrated Two-Terminal Current Limiting Resistor

Номер: US20130221315A1
Автор: Chiang Tony P., Hashim Imran, Minvielle Tim, Pramanik Dipankar, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

A resistor structure incorporated into a resistive switching memory cell with improved performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory cell. A method is also provided for making such a memory cell. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory cell, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory cell. The incorporation of the resistor structure is very useful in obtaining desirable levels of switching currents that meet the switching specification of various types of memory cells. The memory cells may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices. 1. A memory cell comprising:a first electrode layer;a variable resistance layer comprising a resistive switching material capable of switching between two resistive states upon application of a predetermined voltage to the variable resistance layer; and wherein the first electrode layer, the resistance layer, and the resistor structure form a stack and are interconnected in series within the stack.', {'sup': 16', '3, 'wherein the lightly doped polysilicon layer has a dopant concentration of less than 10atoms/cm, and'}, 'wherein the lightly doped polysilicon layer has a resistivity of at least 1 Ohm-cm in a direction along the height of the stack., 'a resistor structure, the resistor structure comprising a lightly doped polysilicon layer,'}2. The memory cell of claim 1 , wherein the resistor structure is operable a second electrode layer of the memory cell.3. The memory cell of claim 2 , wherein the lightly doped polysilicon layer has a resistivity of less than 0.001 Ohm-cm within a plane normal to the height of the stack.4. The memory cell of claim 2 , ...

Подробнее
Номер записи: 15
05-09-2013 дата публикации

SECONDARY-BATTERY MONITORING DEVICE AND BATTERY PACK

Номер: US20130229144A1
Автор: KAWAGUCHI Norihito, Nagata Shogo, So Yasuaki, YAMAGUCHI Takeshi
Принадлежит: HITACHI ULSI SYSTEMS CO., LTD.

A secondary-battery monitoring device capable of realizing highly reliable overcurrent detection and a battery pack having it are provided. When an overcurrent flowing to a secondary battery is to be detected by utilizing a current detection voltage generated via on-resistance of a discharge-control switch and a charge-control switch, a voltage correction circuit that generates a correction voltage having a characteristic varied by positive slope or negative slope along with increase in a power supply voltage is provided, and the correction voltage is added to the detection voltage or a reference power supply voltage with the polarity that cancels out the slope of voltage variation caused in the detection voltage, and then the voltage is input to a comparator circuit. In this manner, variation in the overcurrent determination current is reduced. 1. A secondary-battery monitoring device comprising:first and second battery connection terminals to which a secondary battery is to be connected;first and second external terminals to which a load or a charger is to be connected;a first current path arranged between the first battery connection terminal and the first external terminal;a second current path arranged between the second battery connection terminal and the second external terminal;a switch circuit including a pair of FETs that control a flow of a discharge current and a flow of a charge current, respectively, the switch circuit being inserted in the second current path so as to control the charge current and the discharge current flowing in the secondary battery; anda switch control unit,wherein the switch control unit is provided with:a second power-supply terminal connected to the second current path at a line connecting the second battery connection terminal and one node on the second current path of the switch circuit;a first power-supply terminal to which a first power supply voltage from the secondary battery is supplied via the first current path with ...

Подробнее
Номер записи: 16
07-11-2013 дата публикации

INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD AND INFORMATION PROCESSING PROGRAM

Номер: US20130297311A1
Автор: Kato Yasuhiko, Kihara Nobuyuki, Sakuraba Yohei, YAMAGUCHI Takeshi
Принадлежит: SONY CORPORATION

An information processing apparatus including: a high-quality-voice determining section configured to determine a voice, which can be determined to have been collected under a good condition, as a good-condition voice included in mixed voices pertaining to a group of voices collected under different conditions; and a voice recognizing section configured to carry out voice recognition processing by making use of a predetermined parameter on the good-condition voice determined by the high-quality-voice determining section, modify the value of the predetermined parameter on the basis of a result of the voice recognition processing carried out on the good-condition voice, and carry out the voice recognition processing by making use of the predetermined parameter having the modified value on a voice included in the mixed voices as a voice other than the good-condition voice.

Подробнее
Номер записи: 17
14-11-2013 дата публикации

SEMICONDUCTOR MEMORY DEVICE

Номер: US20130301339A1
Автор: Fukumizu Hiroyuki, KOBAYASHI Shigeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A control circuit controls a voltage applied to a memory cell array. A first electrode contacts to a first surface of a variable resistance element, while a second electrode contacts to a second surface of the variable resistance element. The first electrode is configured by a metal, and the second electrode is configured by a P type semiconductor. The control unit, when performing a setting operation of a memory cell, applies a voltage such that a current flows in a direction from the first electrode toward the second electrode. 1. A semiconductor memory device , comprising:a memory cell array configured having memory cells arranged therein, each of the memory cells being disposed between a first line and a second line and including a variable resistance element; anda control unit configured to control a voltage applied to the memory cell array,the memory cell includes:a first electrode contacting to a first surface of the variable resistance element; anda second electrode contacting to a second surface of the variable resistance element,the first electrode being configured by a metal,the second electrode being configured by an N type semiconductor, andthe control unit being configured to, when performing a setting operation of the memory cells, apply a voltage such that a current flows in a direction from the second electrode toward the first electrode.2. The semiconductor memory device according to claim 1 , whereinthe N type semiconductor is N type polysilicon.3. The semiconductor memory device according to claim 1 , whereinthe N type semiconductor is configured such that, a depletion layer is formed between the second electrode and the variable resistance element when a voltage is applied to the N type semiconductor so as to flow a current in the direction from the second electrode toward the first electrode.4. The semiconductor memory device according to claim 1 , whereinthe N type semiconductor is N type poysilicon, andthe N type semiconductor is configured ...

Подробнее
Номер записи: 18
14-11-2013 дата публикации

AUDIO PROCESSING DEVICE, AUDIO PROCESSING METHOD AND PROGRAM

Номер: US20130301841A1
Автор: Kato Yasuhiko, Kihara Nobuyuki, Sakuraba Yohei, YAMAGUCHI Takeshi
Принадлежит: SONY CORPORATION

An audio processing device includes: a directivity adjustment unit adjusting directivity and sharpness thereof in audio picked up by plural microphones picking up audio; and a howling suppression adjustment unit adjusting intensity of suppressing howling of audio picked up by the plural microphones, wherein the directivity adjustment unit adjusts the directivity and sharpness thereof in preference to the howling suppression of audio performed by the howling suppression adjustment unit. 1. An audio processing device comprising:a directivity adjustment unit adjusting directivity and sharpness thereof in audio picked up by plural microphones picking up audio; anda howling suppression adjustment unit adjusting intensity of suppressing howling of audio picked up by the plural microphones,wherein the directivity adjustment unit adjusts the directivity and sharpness thereof in preference to the howling suppression of audio performed by the howling suppression adjustment unit.2. The audio processing device according to claim 1 , further comprising:a howling index calculation unit calculating a howling index indicating an index of howling occurring due to audio picked up by the plural microphones,wherein the directivity adjustment unit adjusts directivity and sharpness thereof in audio picked up by the plural microphones picking up audio based on the howling index, andthe howling suppression adjustment unit adjusts intensity of suppressing howling of audio picked up by the plural microphones based on the howling index.3. The audio processing device according to claim 2 , further comprising:a band division unit dividing a band of audio picked up by the microphones,wherein the howling suppression adjustment unit calculates the howling index indicating the index of howling occurring due to audio picked up by the microphones in each divided band,the directivity adjustment unit adjusts directivity and sharpness thereof in audio picked up by the microphones in each divided band ...

Подробнее
Номер записи: 19
14-11-2013 дата публикации

SIGNAL PROCESSING APPARATUS AND METHOD AND PROGRAM

Номер: US20130304462A1
Автор: Kato Yasuhiko, YAMAGUCHI Takeshi
Принадлежит: SONY CORPORATION

Disclosed herein is a signal processing apparatus including: a first A/D converter configured to execute A/D conversion by adjusting an input signal with a first gain; a second A/D converter configured to execute A/D conversion by adjusting an input signal with a second gain that is smaller than the first gain; a synthesis block configured to synthesize a first signal obtained by conversion by the first A/D converter with a second signal obtained by conversion by the second A/D converter to output a resultant synthesized signal if the first signal is clipped; and a signal processing block configured to execute signal processing by use of the signal outputted from the synthesis block. 1. A signal processing apparatus comprising:a first A/D (Analog/Digital) converter configured to execute A/D conversion by adjusting an input signal with a first gain;a second A/D converter configured to execute A/D conversion by adjusting an input signal with a second gain that is smaller than the first gain;a synthesis block configured to synthesize a first signal obtained by conversion by the first A/D converter with a second signal obtained by conversion by the second A/D converter to output a resultant synthesized signal if the first signal is clipped; anda signal processing block configured to execute signal processing by use of the signal outputted from the synthesis block.2. The signal processing apparatus according to claim 1 , wherein the signal processing block executes voice recognition processing by use of the signal outputted from the synthesis block.3. The signal processing apparatus according to claim 2 , wherein the synthesis block enters the first signal and the second signal for each window section and claim 2 , if a window section of the entered first signal is clipped claim 2 , synthesizes the first signal with the second signal to output a synthesized signal.4. The signal processing apparatus according to claim 3 , wherein claim 3 , for the window section in which ...

Подробнее
Номер записи: 20
19-12-2013 дата публикации

Transition Metal Oxide Bilayers

Номер: US20130334490A1
Автор: Gopal Vidyut, Hashim Imran, Minvielle Tim, Pham Hieu, Wang Yun, YAMAGUCHI Takeshi, Yang Hong Sheng
Принадлежит:

Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen. 1. A nonvolatile memory element comprising:a first layer operable as a first electrode;a second layer operable as a second electrode;{'sup': 1', '2, 'sub': w', 'x', 'y, 'a third layer comprising MeMeSiO, between the first layer and the second layer; and'}{'sup': 1', '2, 'sub': a', 'b', 'c', 'd, 'a fourth layer comprising MeMeSiObetween the first layer and the second layer;'}{'sup': 1', '2, 'wherein Meand Meare metals;'}wherein w≧0, x≧0, y≧0, z>0, a≧0 , b≧0, c≧0, and d>0;wherein at least one of w, x, or y>0;wherein at least one of a, b, or c>0;wherein one of the third layer or the fourth layer has a linear resistance and a sub-stoichiometric composition; andwherein another one of the third layer or the fourth layer has a bistable resistance and a near-stoichiometric composition.2. The nonvolatile memory element of claim 1 , wherein one of the third layer or the fourth layer comprises nitrogen.3. The nonvolatile memory element of claim 1 , wherein the third layer and the fourth layer comprise nitrogen.4. The nonvolatile memory element of claim 1 , wherein the one of the third layer or ...

Подробнее
Номер записи: 21
19-12-2013 дата публикации

Nonvolatile Memory Device Using a Tunnel Nitride As A Current Limiter Element

Номер: US20130337606A1
Автор: Mihir Tendulkar, Takeshi Yamaguchi, Tim Minvielle, Yun Wang
Принадлежит: Intermolecular Inc, SanDisk 3D LLC, Toshiba Corp

Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has an improved device switching performance and lifetime, due to the addition of a current limiting component disposed therein. In one embodiment, the current limiting component comprises a resistive material that is configured to improve the switching performance and lifetime of the resistive switching memory element. The electrical properties of the current limiting layer are configured to lower the current flow through the variable resistance layer during the logic state programming steps (i.e., “set” and “reset” steps) by adding a fixed series resistance in the resistive switching memory element found in the nonvolatile memory device. In one embodiment, the current limiting component comprises a tunnel nitride that is a current limiting material that is disposed within a resistive switching memory element in a nonvolatile resistive switching memory device.

Подробнее
Номер записи: 22
06-02-2014 дата публикации

SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF

Номер: US20140036571A1
Автор: KOBAYASHI Shigeki, YAMAGUCHI Takeshi
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively. The control circuit includes a detection circuit configured to detect a transition of a resistance state of a selected memory cell using a reference voltage. The control circuit is configured to execute a read operation in which the control circuit applies the third voltage to the selected first line and the non-selected first line, applies the second voltage to the selected second line, and applies the fourth voltage to the non-selected second line, and set the reference voltage based on a voltage value of the selected second line. 1. A semiconductor memory device , comprising:a memory cell array including a plurality of first lines disposed on a substrate, a plurality of second lines disposed intersecting the first lines, and memory cells disposed at each of intersections of the first lines and the second lines and each configured having a current rectifier element and a variable resistance element connected in series therein; anda control circuit configured to apply a first voltage to a selected first line, apply a second voltage having a voltage value which is smaller than that of the first voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively, such that a first potential difference is applied to a selected memory cell disposed at the intersection of the selected first line and the selected second line,the control circuit including a detection circuit configured to, during the setting operation, detect a transition of a resistance state of the selected memory cell using a reference voltage, andthe control ...

Подробнее
Номер записи: 23
06-02-2014 дата публикации

Multifunctional Electrode

Номер: US20140038380A1
Автор: Dipankar Pramanik, Hieu Pham, Hong Sheng YANG, Imran Hashim, Takeshi Yamaguchi, Tim Minvielle, Vidyut Gopal, Yun Wang
Принадлежит: Intermolecular Inc, Toshiba Corp

A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 Ωcm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed.

Подробнее
Номер записи: 24
06-03-2014 дата публикации

NONVOLATILE MEMORY DEVICE

Номер: US20140061567A1
Автор: Fukumizu Hiroyuki, KOBAYASHI Shigeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to one embodiment, a nonvolatile memory device includes a first wiring, a second wiring, and a memory cell provided between the first wiring and the second wiring. The memory cell includes a memory layer, a rectifying element layer, and a protective resistance layer including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. 1. A nonvolatile memory device comprising:a first wiring;a second wiring; anda memory cell provided between the first wiring and the second wiring, a memory layer;', 'a rectifying element layer; and', 'a protective resistance layer including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type., 'the memory cell including2. The device according to claim 1 , wherein the first semiconductor layer and the second semiconductor layer are in contact with each other.3. The device according to claim 1 , whereinthe memory cell includes a stacked body with the memory layer, the first semiconductor layer, and the second semiconductor layer stacked, andthe first semiconductor layer is placed on the first wiring side and the second semiconductor layer is placed on the second wiring side, or the first semiconductor layer is placed on the second wiring side and the second semiconductor layer is placed on the first wiring side.4. The device according to claim 1 , whereinmaterial of the first semiconductor layer and material of the second semiconductor layer include polysilicon (poly-Si), and{'sup': 19', '3, 'concentration of an impurity element contained in the polysilicon is 1×10atoms/cmor more.'}5. The device according to claim 4 , wherein the polysilicon included in the first semiconductor layer is doped with boron (B).6. The device according to claim 4 , wherein the polysilicon included in the second semiconductor layer is doped with phosphorus (P) or arsenic (As).7. The device according to claim 4 , whereinthe ...

Подробнее
Номер записи: 25
06-03-2014 дата публикации

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

Номер: US20140061578A1
Автор: Fukumizu Hiroyuki, KOBAYASHI Shigeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A nonvolatile semiconductor memory device below comprises: a memory cell array configured having memory cells arranged therein disposed at intersections of a plurality of first lines and a plurality of second lines formed so as to intersect each other, and the memory cells each comprising a variable resistance element; and a control circuit configured to select and drive the first lines and the second lines. The variable resistance element is configured by a transition metal oxide film. The variable resistance element is electrically connected to a first electrode configured from a metal at a first surface and is electrically connected to a second electrode at a second surface which is on an opposite side to the first surface. A first insulating film is formed between the first electrode and the variable resistance element. The first insulating film is formed by a first material that is formed by covalent binding. 1. A nonvolatile semiconductor memory device , comprising:a memory cell array configured having memory cells arranged therein, the memory cells disposed at intersections of a plurality of first lines and a plurality of second lines that are formed so as to intersect each other, and the memory cells each comprising a variable resistance element; anda control circuit configured to select and drive the first lines and the second lines,the variable resistance element being configured by a transition metal oxide film,the variable resistance element being electrically connected to a first electrode configured from a metal at a first surface and being electrically connected to a second electrode at a second surface which is on an opposite side to the first surface, anda first insulating film being formed between the first electrode and the variable resistance element, the first insulating film being formed by a first material that is formed by covalent binding.2. The nonvolatile semiconductor memory device according to claim 1 , whereinthe first insulating film ...

Подробнее
Номер записи: 26
06-03-2014 дата публикации

NON-VOLATILE MEMORY DEVICE

Номер: US20140063912A1
Автор: Aiga Fumihiko, KOBAYASHI Shigeki, YAMAGUCHI Takeshi
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to an embodiment, a non-volatile memory device includes a first conductive layer, a second conductive layer, and a resistance change layer provided between the first conductive layer and the second conductive layer. The resistance change layer is capable of making a transition between a low-resistance state and a high-resistance state, and includes an oxide containing at least one of hafnium (Hf) and zirconium (Zr), at least one selected from the group consisting of barium (Ba), lanthanum (La), gadolinium (Gd) and lutetium (Lu), and nitrogen (N). 1. A non-volatile memory device comprising:a first conductive layer;a second conductive layer; anda resistance change layer provided between the first conductive layer and the second conductive layer, the resistance change layer being capable of making a transition between a low-resistance state and a high-resistance state, and including an oxide containing at least one of hafnium (Hf) and zirconium (Zr), at least one selected from the group consisting of barium (Ba), lanthanum (La), gadolinium (Gd) and lutetium (Lu), and nitrogen (N).2. The device according to claim 1 , wherein the oxide includes a metal site containing one of Hf claim 1 , Zr claim 1 , Ba claim 1 , La claim 1 , Gd claim 1 , and Lu claim 1 , and an oxygen site replaced with nitrogen.3. The device according to claim 1 , wherein a ratio of nitrogen with respect to oxygen is one sixteenth or more claim 1 , and one fourth or less.4. The device according to claim 1 , wherein the resistance change layer includes a first part and a second part provided between the second conductive layer and the first part claim 1 , anda value obtained by dividing an absolute difference between a first nitrogen concentration in the first part and a second nitrogen concentration in the second part by lower one thereof is smaller than a value obtained by dividing an absolute difference between a first concentration, in the first part, of the one element selected from the ...

Подробнее
Номер записи: 27
05-01-2017 дата публикации

SCREW, INJECTION MOLDING MACHINE, AND INJECTION MOLDING METHOD

Номер: US20170001353A1
Автор: Kariya Toshihiko, Kinoshita Kiyoshi, Nobuta Munehiro, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит: Mitsubishi Heavy Industries Plastic Technology Co., Ltd.

There is provided a screw of an injection molding machine that can eliminate uneven distribution of reinforcing fibers without giving an excessive shear force to the reinforcing fibers. A screw is provided inside a heating cylinder of an injection molding machine to which a resin pellet is fed on an upstream side in a conveyance direction of resin and to which reinforcing fibers are fed on a downstream side therein, and includes: a first stage at which the resin pellet which is fed is melted; and a second stage that continues to the first stage, and at which molten resin and the reinforcing fibers are mixed with each other. A second flight provided at the second stage includes: a large-diameter flight with a relatively large outer diameter; and a small-diameter flight with a relatively small outer diameter. 111-. (canceled)12. An injection molding machine to which a resin raw material is fed on an upstream side and to which reinforcing fibers are fed on a downstream side , the injection molding machine comprising:a cylinder at which a discharge nozzle has been formed;a screw provided rotatable and movable in a rotation axis direction inside the cylinder;a resin feed portion that feeds the resin raw material in the cylinder; anda fiber feed portion that is provided closer to a downstream side than the resin feed portion, and feeds the reinforcing fibers in the cylinder, whereinthe screw comprises:a first stage at which the resin raw material which is fed is melted; anda second stage that continues to the first stage and comprises a feed portion and a compression portion closer to the downstream side than the feed portion, and at which the melted resin raw material and the fed reinforcing fibers are mixed with each other, whereina flight provided at the feed portion in the second stage includes:a large-diameter flight with a relatively large outer diameter, and a small-diameter flight with a relatively small outer diameter; anda resin passage formed with a gap between ...

Подробнее
Номер записи: 28
05-01-2017 дата публикации

INJECTION MOLDING METHOD AND INJECTION MOLDING MACHINE

Номер: US20170001354A1
Автор: Kariya Toshihiko, Kinoshita Kiyoshi, Nobuta Munehiro, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит:

There is provided a screw of an injection molding machine that can eliminate uneven distribution of additive components without giving an excessive shear force to the additive components. An injection molding method of the present invention includes: a plasticizing process of feeding a resin pellet P and additive components to a heating cylinder including a screw that can rotate around a rotation axis C and can advance and retreat along the rotation axis C, and generating molten resin M by rotating the screw in a normal direction; and an injection process of injecting to a cavity the molten resin M containing the additive components. In the plasticizing process, retreat operation of forcibly retreating the screw is performed at a predetermined velocity by a predetermined stroke D or a predetermined time. 154-. (canceled)55. An injection molding method of resin containing reinforcing fibers , comprising:a plasticizing process of feeding a fiber bundle and a resin raw material to a cylinder including a screw that can rotate around a rotation axis and can advance and retreat along the rotation axis, and generating molten resin by rotating the screw in a normal direction, the fiber bundle comprising the reinforcing fibers in a roving state or in a chopped strand state; andan injection process of injecting to a cavity the molten resin containing the reinforcing fibers, whereinin the plasticizing process;a shear force in a direction different from a direction of a shear force generated by rotation of the screw is applied to the fiber bundle contained in the molten resin inside a groove of the screw by a retreat operation of forcibly retreating the screw for a predetermined stroke or for a predetermined time that can form a space closer to a downstream side than a tip of the screw, so that a swirling flow is generated in the molten resin containing the reinforcing fibers in a rotation axis direction of the screw; andthe retreat operation is performed, and a rotation ...

Подробнее
Номер записи: 29
04-01-2018 дата публикации

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Номер: US20180006089A1
Автор: Fukuda Natsuki, KOMURA Masanori, OGA Atsushi, Okajima Mutsumi, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi
Принадлежит: Toshiba Memory Corporation

A semiconductor device according to an embodiment includes: a stacked body including a plurality of first conductive films stacked via an inter-layer insulating film; 1a stacked body including a plurality of first conductive films stacked via an inter-layer insulating film;a first conductive body contacting the stacked body to extend in a stacking direction;a plurality of first insulating films in the same layers as the first conductive films and disposed between the first conductive body and the first conductive films,the first conductive body including a projecting part that projects along tops of one of the first insulating films and one of the first conductive films, and a lower surface of the projecting part contacting an upper surface of the one of the first conductive films; anda second insulating film configured from a material different from that of the first insulating film, disposed on the one of the first conductive films of the stacked body, and disposed in the same layer as the projecting part of the first conductive body.. A semiconductor device, comprising: The present application is a continuation application of U.S. application Ser. No. 15/074,338, filed on Mar 18, 2016, which is based upon and claims the benefit of priority from the prior U.S. Provisional Application 62/301,903, filed on Mar. 1, 2016, the entire contents of both of which are incorporated herein by reference.Embodiments of the present invention relate to a semiconductor device and a method of manufacturing the same.A flash memory is a semiconductor device known for its low cost and large capacity. One example of a semiconductor device to replace the flash memory is a variable resistance type memory (ReRAM: Resistance RAM) which employs a variable resistance film in its memory cell. The ReRAM can configure a cross-point type memory cell array, hence can achieve an increased capacity similarly to the flash memory. Moreover, in order to further increase capacity, there is also being ...

Подробнее
Номер записи: 30
03-01-2019 дата публикации

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Номер: US20190006526A1
Автор: ARAI Daisuke, ASADA Takeshi, KITADA Mizue, SUZUKI Noriaki, YAMAGUCHI Takeshi
Принадлежит:

A semiconductor device includes: a semiconductor base body where a second semiconductor layer is stacked on a first semiconductor layer, a trench is formed on a surface of the second semiconductor layer, and a third semiconductor layer which is formed of an epitaxial layer is formed in the inside of the trench; a first electrode; an interlayer insulation film which has a predetermined opening; and a second electrode, wherein metal is filled in the opening, the opening is disposed at a position avoiding a center portion of the third semiconductor layer, the second electrode is connected to the third semiconductor layer through the metal, and a surface of the center portion of the third semiconductor layer is covered by the interlayer insulation film. 1. A semiconductor device comprising:a semiconductor base body where a second semiconductor layer of a first conductive type is stacked on a first semiconductor layer of the first conductive type or a second conductive type, a trench having a predetermined depth is formed on a surface of the second semiconductor layer, and a third semiconductor layer of the second conductive type which is formed of a monocrystal epitaxial layer is formed in the inside of the trench;a first electrode which is positioned on a surface of the first semiconductor layer;an interlayer insulation film which is positioned on a surface of the second semiconductor layer and on a surface of the third semiconductor layer and has a predetermined opening formed within a region where at least the third semiconductor layer is formed as viewed in a plan view, the opening being filled with metal; anda second electrode which is positioned over the interlayer insulation film, whereinthe opening is disposed at a position avoiding a center portion of the third semiconductor layer as viewed in a plan view,the second electrode is connected to at least the third semiconductor layer through the metal filled in the opening, anda surface of the center portion of the ...

Подробнее
Номер записи: 31
14-01-2016 дата публикации

INJECTION MOLDING APPARATUS AND INJECTION MOLDING METHOD

Номер: US20160009010A1
Автор: IKEDA Kosuke, Kariya Toshihiko, Kinoshita Kiyoshi, Nobuta Munehiro, OKABE Ryoji, ONUMA Hitoshi, SUZUMURA Yuji, TAKAHASHI Masanori, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит:

The injection molding apparatus of the present invention includes: a heating cylinder; a screw that is provided rotatably in an inner portion of the heating cylinder; a resin feed hopper that feeds a resin pellet; and a fiber feed device that is provided ahead of the resin feed hopper and feeds reinforcing fibers into the heating cylinder. The screw includes a first stage that is located on a rear side, and in which the resin pellet is melted, and a second stage that is located on a front side, and in which the melted resin pellet and the reinforcing fibers are mixed, and a lead of a second flight provided in the second stage is larger than a lead of a first flight provided in the first stage. 1. An injection molding apparatus for a fiber reinforced resin comprising:a cylinder in which a discharge nozzle is formed on a front side;a screw that is provided rotatably and movably in a rotation axis direction in an inner portion of the cylinder;a resin feed section that feeds a resin raw material into the cylinder; anda fiber feed section that is provided ahead of the resin feed section and feeds reinforcing fibers into the cylinder,wherein the screw includesa first stage that is located on a rear side, and in which the resin raw material is melted, anda second stage that is located on the front side and is connected to the first stage, and in which the melted resin raw material and the reinforcing fibers are mixed, and{'b': 2', '1, 'a lead L of a second flight provided in the second stage is larger than a lead L of a first flight provided in the first stage at least in a fiber receiving region where the reinforcing fibers are fed from the fiber feed section.'}2. The injection molding apparatus according to claim 1 ,{'b': '2', 'wherein the lead L of the second flight in the fiber receiving region is 1.2×D to 2.0×D when an inner diameter of the cylinder is D, and'}{'b': 2', '2', '2, 'a width W of the second flight in the fiber receiving region is 0.01×L to 0.3×L.'}3. The ...

Подробнее
Номер записи: 32
11-01-2018 дата публикации

MEMORY DEVICE

Номер: US20180013061A1
Автор: Fukumizu Hiroyuki, YAMAGUCHI Takeshi
Принадлежит: Toshiba Memory Corporation

According to one embodiment, a memory device includes a stacked body. The stacked body includes first and second electrodes, and an oxide layer provided between the first and second electrodes. The second electrode includes a semiconductor layer, and a metal-containing region including at least one of first or second metallic element and being provided between at least a portion of the semiconductor layer and at least a portion of the oxide layer. The first metallic element includes at least one selected from Pt, Pd, Ir, Ru, Re, and Os. The second metallic element includes at least one selected Ti, W, Mo, and Ta. The stacked body has first and second states. The first state is obtained by causing a current to flow in the stacked body from the second toward first electrode. The second state is obtained by causing a current to flow from the first toward second electrode. 1. A memory device , comprising: a first electrode,', 'a second electrode, and', 'an oxide layer provided between the first electrode and the second electrode,, 'a stacked body including'} a semiconductor layer of an n-type, and', 'a metal-containing region including at least one of a first metallic element or a second metallic element and being provided between at least a portion of the semiconductor layer and at least a portion of the oxide layer,, 'the second electrode including'}the first metallic element including at least one selected from the group consisting of Pt, Pd, Ir, Ru, Re, and Os,the second metallic element including at least one selected from the group consisting of Ti, W, Mo, and Ta,the stacked body having a first state and a second state, the first state being obtained by causing a first current to flow in the stacked body from the second electrode toward the first electrode, the second state being obtained by causing a second current to flow in the stacked body from the first electrode toward the second electrode,a first resistance of the stacked body in the first state being lower ...

Подробнее
Номер записи: 33
11-01-2018 дата публикации

Color conversion apparatus, non-transitory recording medium storing color conversion program and color conversion method

Номер: US20180013926A1
Автор: Takeshi Yamaguchi
Принадлежит: KONICA MINOLTA INC

A color conversion apparatus includes a hardware processor that obtains a scanner profile created on the basis of measured RGB values and corresponding measured colorimetric values of patches in a first color chart, and creates a table including correction amounts of RGB values, each according to the level of flare estimated for a patch and each associated with an RGB-value difference and a patch-size difference, on the basis of RGB values of patches in the first color chart and RGB values of patches in a specific chart. The specific chart is created by using a part of the patches in the first color chart with the RGB value or patch size being changed. The hardware processor further corrects measured RGB values of patches in a second color chart with the table, and convers the corrected RGB values into colorimetric values with the scanner profile.

Подробнее
Номер записи: 34
19-01-2017 дата публикации

INJECTION MOLDING METHOD, SCREW, AND INJECTION MOLDING MACHINE

Номер: US20170015036A1
Автор: Kariya Toshihiko, Kinoshita Kiyoshi, Nobuta Munehiro, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит:

In an injection molding method of fiber reinforced resin of the present invention, a resin accumulation region is provided closer to a downstream side than an injection completion position inside a heating cylinder, an injection pressure is given to molten resin that occupies the resin accumulation region in an injection process of a preceding cycle, and a shear force is given to the molten resin that occupies the resin accumulation region in a plasticizing process of a subsequent cycle. An inside of massive reinforcing fibers F is impregnated with the molten resin by giving a high injection pressure to the molten resin that occupies the resin accumulation region. Next, dispersion of the reinforcing fibers is promoted by giving a shear force in the plasticizing process of the subsequent cycle. 17-. (canceled)8. An injection molding method of fiber reinforced resin that repeats:a plasticizing process of feeding a resin raw material and reinforcing fibers to a cylinder inside which a screw is provided, melting the resin raw material by rotating the screw, and generating molten resin containing the reinforcing fibers; andan injection process of discharging from the cylinder a predetermined amount of the molten resin containing the reinforcing fibers by advancing the screw to a predetermined injection completion position to give a predetermined injection pressure, whereina resin accumulation region is provided in a region to which the injection pressure inside the cylinder is applied, the resin accumulation region in which the molten resin not less than an amount corresponding to a resin amount for one shot in a subsequent molding cycle is accumulated, the resin accumulation region being formed in a downstream side of the screw in a space between an outside surface of a shear giving shaft and an inside surface of the cylinder, the shear giving shaft being provided integrally with the screw,in the injection process of a preceding cycle, the injection pressure is given to ...

Подробнее
Номер записи: 35
21-01-2016 дата публикации

NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME

Номер: US20160019959A1
Автор: Ode Hiroyuki, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A nonvolatile memory device comprises a memory cell comprising a variable resistance element connected between a couple of wirings and a control circuit applying a voltage between the couple of wirings connected to the memory cell. In data rewriting, the control circuit repeats a first voltage application step of applying a first write voltage between the couple of wirings and a first verify step of applying a first voltage lower than the first write voltage between the couple of wirings and comparing a cell current through the cell with a first threshold current, the steps repeated until a magnitude relation of the cell current and the first threshold current satisfies a first condition. If the first condition is satisfied, the circuit performs a second voltage application step of applying a second write voltage between the couple of wirings.

Подробнее
Номер записи: 36
25-01-2018 дата публикации

INJECTION MOLDING METHOD, SCREW FOR INJECTION MOLDING MACHINE, AND INJECTION MOLDING MACHINE

Номер: US20180022003A1
Автор: Kariya Toshihiko, Kinoshita Kiyoshi, Nobuta Munehiro, Toda Naoki, YAMAGUCHI Takeshi
Принадлежит:

Provided is an injection molding method in which a constricting section is provided at a boundary between a first stage and a second stage of a screw. When a mixture of a molten resin and reinforcing fibers passes through the constricting section, compression force higher than compression force on an upstream side of the constricting section is applied to the mixture. A supply section on a downstream side of the constricting section has a shaft diameter smaller than an outer diameter of the constricting section. Therefore, the vicinity of the supply section becomes a reduced-pressure region with respect to the mixture having passed through the constricting section, and the mixture is accordingly expanded. As a result, spring-back occurs on the reinforcing fibers and a Barus effect occurs on the molten resin, thereby making it possible to produce a state that is advantageous to open the fiber bundle. 1. An injection molding method , comprising:a plasticization step of supplying a solid resin raw material and reinforcing fibers to a cylinder including a screw, and rotating the screw in a normal direction to generate a mixture of the reinforcing fibers and a molten resin, the screw being rotatable around a rotation axis and being movable forward and rearward along the rotation axis; andan injection step of injecting the mixture into a cavity of a mold, wherein in the plasticization step,compression force that is higher than compression force on an upstream side of a constricting region is applied to the mixture in the constricting region, the constricting region being provided in at least a portion of the screw in the rotation axis direction,a pressure applied to the mixture passed through the constructing region is reduced in a reduced-pressure region on a downstream side of the constricting region, andthe mixture is kneaded through the rotation of the screw after the pressure applied to the mixture is reduced, wherein the screw includes,{'sub': 2', '1', '2', '1', '3 ...

Подробнее
Номер записи: 37
26-01-2017 дата публикации

MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

Номер: US20170025475A1
Автор: Ode Hiroyuki, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to one embodiment, a memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction crossing the first direction and a resistance change film provided between the first wiring and the second wiring. The second wiring includes a first conductive layer and a first intermediate layer including a first region provided between the first conductive layer and the resistance change film. The first intermediate layer includes a material having nonlinear resistance characteristics. 1. A memory device comprising:a first wiring extending in a first direction;a second wiring extending in a second direction crossing the first direction; anda resistance change film provided between the first wiring and the second wiring, a first conductive layer; and', 'a first intermediate layer including a first region provided between the first conductive layer and the resistance change film, and, 'the second wiring includingthe first intermediate layer including a material having nonlinear resistance characteristics.2. The device according to claim 1 , wherein the first intermediate layer includes at least one material selected from the group consisting of silicon nitride claim 1 , titanium oxide claim 1 , tantalum oxide claim 1 , and niobium oxide.3. The device according to claim 1 , wherein a second region; and', 'a third region, and, 'the first intermediate layer further includesthe first conductive layer is disposed between the second region and the third region in the first direction.4. The device according to claim 1 , wherein the first intermediate layer has a thickness in a third direction crossing the first direction and the second direction of not less than 1 nm and not more than 5 nm.5. The device according to claim 1 , wherein a bandgap of a material included in the first intermediate layer is smaller than a bandgap of a material included in the resistance change film.6. The device according to claim 1 , further ...

Подробнее
Номер записи: 38
01-05-2014 дата публикации

Resistive Random Access Memory Cells Having METAL ALLOY Current Limiting layers

Номер: US20140117303A1
Автор: Chiang Tony P., Hashim Imran, Minvielle Tim, Pramanik Dipankar, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from alloys of transition metals. Some examples of such alloys include chromium containing alloys that may also include nickel, aluminum, and/or silicon. Other examples include tantalum and/or titanium containing alloys that may also include a combination of silicon and carbon or a combination of aluminum and nitrogen. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature processing. In some embodiments, the breakdown voltage of a current limiting layer is at least about 8V. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layers while maintaining their performance. 1. A resistive random access memory cell comprising:an electrode layer;a current limiting layer, the current limiting layer comprising chromium, the current limiting layer having a breakdown voltage of at least 8V and a resistivity of at least 1 Ohm-cm in a direction normal to the current limiting layer; anda resistive switching layer comprising a resistive switching material.2. The resistive random access memory cell of claim 1 , wherein the current limiting layer comprises one of NiCr claim 1 , AlNiCr claim 1 , SiCr claim 1 , SiCrO claim 1 , or SiCrWN.3. The resistive random access memory cell of claim 1 , wherein a concentration of chromium in the chromium containing layer is between about 25 and 75 atomic percent.4. The resistive random access memory cell of claim 1 , wherein the current limiting layer has a resistivity of less than 0.001 Ohm-cm in a direction parallel to the current limiting layer.5. The resistive random access memory cell of claim 1 , wherein the current limiting layer extends across multiple resistive random access memory cells and is ...

Подробнее
Номер записи: 39
08-02-2018 дата публикации

NEAR-INFRARED CUT FILTER GLASS

Номер: US20180037492A1
Автор: Sakagami Takahiro, SHIRATORI Makoto, YAMAGUCHI Takeshi
Принадлежит: Asahi Glass Company, Limited

A near-infrared cut filter glass includes: P, Al, R (R represents any one or more of Li, Na, and K), R′ (R′ represents any one or more of Mg, Ca, Sr, Ba, and Zn), and Cu, and not including F practically, wherein (Cu amount/total Cu amount)×100[%] is 0.01 to 7.0%. The filter glass may further include, by mol %, 0 to 10% BO. The filter glass may have a fracture toughness value of the near-infrared cut filter glass is 0.3 MPa·mor more. For the filter glass, a quotient obtained by dividing an absorption constant at a wavelength of 430 nm by an absorption constant at a wavelength of 800 nm, of the near-infrared cut filter glass, may be 0.00001 to 0.19. 1. A near-infrared cut filter glass including: P , Al , R , R′ , and Cu , and not including F practically , whereinR represents any one or more of Li, Na, and K;R′ represents any one or more of Mg, Ca, Sr, Ba, and Zn; and{'sup': '+', '(Cu amount/total Cu amount)×100[%] is 0.01 to 7.0%.'}2. The near-infrared cut filter glass according to claim 1 , further including claim 1 , by mol % claim 1 , 0 to 10% BO.3. The near-infrared cut filter glass according to claim 1 , wherein a fracture toughness value of the near-infrared cut filter glass is 0.3 MPa·mor more.4. The near-infrared cut filter glass according to claim 1 , wherein a quotient obtained by dividing an absorption constant at a wavelength of 430 nm by an absorption constant at a wavelength of 800 nm claim 1 , of the near-infrared cut filter glass claim 1 , is 0.00001 to 0.19.5. The near-infrared cut filter glass according to claim 1 , wherein a transmittance at a wavelength of 430 nm at a thickness of 0.3 mm of the near-infrared cut filter glass is 50 to 92%.6. The near-infrared cut filter glass according to claim 1 , including claim 1 , by mol %:{'sub': 2', '5, '50 to 75% PO;'}{'sub': 2', '3, '5 to 22% AlO;'}{'sub': '2', '0.5 to 20% RO;'}0.1 to 25% R′O; and0.1 to 15% CuO, wherein{'sub': 2', '2', '2', '2, 'RO represents any one or more of LiO, NaO, and KO; and'}R′ ...

Подробнее
Номер записи: 40
12-02-2015 дата публикации

ELECTRONIC DEVICE AND COORDINATE DETECTING METHOD

Номер: US20150042603A1
Автор: TAKANO Tomoki, TAKIZAWA Yuuichi, YAMAGUCHI Takeshi
Принадлежит:

Disclosed is an electronic device including: a display section that displays information; an electrostatic-capacitance touch panel layer that allows visible light corresponding to display contents of the display section to pass through the touch panel layer and that determines a two-dimensional coordinate indicated by an indicator having conductivity; glass that protects the touch panel layer and that allows visible light corresponding to display contents of the display section to pass through the glass; a depression sensor that detects deformation of the glass; and a control section that validates a two-dimensional coordinate when a plurality of two-dimensional coordinates are determined by the touch panel layer and when deformation is detected by the depression sensor, the two-dimensional coordinate being determined last among the plurality of two-dimensional coordinates. 1. An electronic device comprising:a housing;a display section that is disposed inside the housing and that displays predetermined information;an electrostatic-capacitance touch panel section that allows visible light corresponding to display contents of the display section to pass through the touch panel section and that determines a two-dimensional coordinate indicated by an indicator having predetermined conductivity;a transparent member that protects the touch panel section and that allows visible light corresponding to display contents of the display section to pass through the transparent member;a depression detecting section that detects deformation of the transparent member; anda control section that validates a two-dimensional coordinate when a plurality of two-dimensional coordinates are determined by the touch panel section and when a predetermined amount of deformation is detected by the depression detecting section, the two-dimensional coordinate being determined last among the plurality of two-dimensional coordinates.2. The electronic device according to claim 1 , wherein the ...

Подробнее
Номер записи: 41
12-02-2015 дата публикации

ELECTRONIC DEVICE AND COORDINATE DETECTING METHOD

Номер: US20150042610A1
Автор: TAKANO Tomoki, TAKIZAWA Yuuichi, YAMAGUCHI Takeshi
Принадлежит:

Disclosed is an electronic device including: a display section that displays information; an electrostatic-capacitance touch panel layer that allows visible light corresponding to display contents of the display section to pass through the touch panel layer and that determines a pair of two-dimensional coordinates indicated by an indicator having conductivity; glass that protects the touch panel layer and that allows visible light corresponding to display contents of the display section to pass through the glass; a depression sensor that detects deformation of the glass; and a control section that validates a pair of two-dimensional coordinates when a plurality of pairs of two-dimensional coordinates are determined by the touch panel layer and when deformation is detected by the depression sensor, the pair of two-dimensional coordinates being determined last among the plurality of pairs of two-dimensional coordinates. 1. An electronic device comprising:a housing;a display that is disposed inside the housing and that displays predetermined information;an electrostatic-capacitance touch panel that allows visible light corresponding to display contents of the display section to pass through the electrostatic-capacitance touch panel;a transparent member that protects the touch panel and that allows the visible light corresponding to the display contents of the display to pass through the transparent member; anda depression detector that detects deformation of the transparent member, whereinthe touch panel is configured to detect a pair of two-dimensional coordinates indicated by an indicator having predetermined conductivity and spaced from the touch panel section at a predetermined distance, whereinwhen the touch panel detects a plurality of the pairs of two-dimensional coordinates and when the depression detector detects a predetermined amount of deformation: at least one pair of two-dimensional coordinates detected during a predetermined time period towards past ...

Подробнее
Номер записи: 42
11-02-2016 дата публикации

COLOR CONVERSION METHOD, COLOR CONVERSION PROGRAM, AND RECORDING MEDIUM

Номер: US20160044211A1
Автор: YAMAGUCHI Takeshi
Принадлежит: KONICA MINOLTA, INC.

A color conversion method includes: a step (a) of obtaining paper white information including a spectral reflectance and a scanner response value of a paper white portion of a document, a step (b) of searching for a registered scanner profile corresponding to paper white information the same as or similar to the paper white information, from a plurality of registered scanner profiles for paper types, and a step (c) of determining whether a new scanner profile needs to be created corresponding to the paper white information obtained in the step (a), according to a result of searching in the step (b). 1. A color conversion method comprising:a step (a) of obtaining paper white information including a spectral reflectance and a scanner response value of a paper white portion of a document,a step (b) of searching for a registered scanner profile corresponding to paper white information the same as or similar to the paper white information, from a plurality of registered scanner profiles for paper types, anda step (c) of determining whether a new scanner profile needs to be created corresponding to the paper white information obtained in the step (a), according to a result of searching in the step (b).2. The color conversion method according to claim 1 ,wherein the step (b) further includes:calculating a paper white approximation degree representing an approximation degree of each of the spectral reflectance and the scanner response value obtained in the step (a) with respect to a spectral reflectance and a scanner response value associated with the registered scanner profile; andcomparing the paper white approximation degree and a predetermined paper white approximation degree threshold, and selecting the registered scanner profile when the paper white approximation degree is not more than the predetermined paper white approximation degree threshold.3. The color conversion method according to claim 2 ,wherein in the step (c),when no registered scanner profile is selected ...

Подробнее
Номер записи: 43
05-03-2015 дата публикации

NONVOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Номер: US20150060749A1
Автор: KOBAYASHI Shigeki, NAKAKUBO Yoshinori, YAMAGUCHI Takeshi
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to an embodiment, a first impurity diffusion layer is provided in a region lower than a drain region and the first impurity diffusion layer diffuses impurities of a second conductivity type. A second impurity diffusion layer is provided between the drain region and the first impurity diffusion layer, and the second impurity diffusion layer diffuses impurities of a first conductivity type or the second conductivity type, and a concentration of the second impurity diffusion layer is lower than that of the first conductivity type of the drain region and that of the second conductivity type of the first impurity diffusion layer. 1. A nonvolatile memory device comprising:a selection transistor including a gate electrode provided above a semiconductor substrate via a gate insulating film, and source/drain regions provided on both sides of a surface of the semiconductor substrate, sandwiching the gate electrode, and the source/drain regions diffused impurities of a first conductivity type;a memory cell including a variable resistive layer connected to a drain region of the selection transistor;a first impurity diffusion layer provided in a region lower than the drain region, and the first impurity diffusion layer diffused impurities of a second conductivity type; anda second impurity diffusion layer provided between the drain region and the first impurity diffusion layer, and the second impurity diffusion layer diffused impurities of the first conductivity type or the second conductivity type, and a concentration of the second impurity diffusion layer lower than that of the first conductivity type in the drain region and that of the second conductivity type in the first impurity diffusion layer.2. The nonvolatile memory device according to claim 1 , whereinthe impurities of the first conductivity type are n type impurities, andthe impurities of the second conductivity type are p type impurities.3. The nonvolatile memory device according to claim 1 , whereinthe ...

Подробнее
Номер записи: 44
05-03-2015 дата публикации

CONTROLLING COMPOSITION OF MULTIPLE OXIDES IN RESISTIVE SWITCHING LAYERS USING ATOMIC LAYER DEPOSITION

Номер: US20150060753A1
Автор: Gopal Vidyut, Higuchi Randall J., Hsueh Chien-Lan, YAMAGUCHI Takeshi
Принадлежит:

A method of fabricating a resistive random access memory (ReRAM) cell may include forming a set of nanolaminate structures over an electrode, such that each structure includes at least one first element oxide layer and at least one second element oxide layer. The overall set is operable as a resistive switching layer in a ReRAM cell. In this set, an average atomic ratio of the first element to the second element is different in at least two nanolaminate structures. This ratio may be less in nanolaminate structures that are closer to electrodes than in the middle nanolaminate structures. Alternatively, this ratio may increase from one end of the set to another. The first element may be less electronegative than the second elements. The first element may be hafnium, while the second element may be one of zirconium, aluminum, titanium, tantalum, or silicon. 1. A device comprising: 'wherein the first layer is operable as a first electrode;', 'a first layer comprising a first conductive material,'} 'wherein the second layer is operable as a second electrode; and', 'a second layer comprising a second conductive material,'} wherein the third layer is operable as a variable resistance layer switchable between a high resistance state and a low resistance state,', 'wherein the third layer comprises a first nanolaminate structure and a second nanolaminate structure,', 'wherein each of the first nanolaminate structure comprises a first oxide of a first element and a second oxide of a second element, and', 'wherein an average atomic ratio of the second element to the first element in the first nanolaminate structure is greater than an average atomic ratio of the second element to the first element in the second nanolaminate structure., 'a third layer disposed between the first layer the second layer,'}2. The device of claim 1 , wherein the average atomic ratio of the second element to the first element in the first nanolaminate structure is determined by a number of layers ...

Подробнее
Номер записи: 45
02-03-2017 дата публикации

MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

Номер: US20170062713A1
Автор: Ode Hiroyuki, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to one embodiment, A memory device includes a pillar, a first wiring, a second wiring, an insulating film provided between the first wiring and the second wiring, a first layer provided between the first wiring and the pillar in the second direction and including a first metal oxide containing a first metal and oxygen, a second layer provided between the second wiring and the pillar in the second direction and including the first metal oxide containing the first metal and oxygen, and an intermediate film provided between the pillar and the first layer and between the pillar and the second layer in the second direction and including a second metal oxide containing the first metal and oxygen. Concentration of oxygen contained in the first metal oxide is lower than concentration of oxygen contained in the second metal oxide. 1. A memory device comprising:a pillar extending in a first direction;a first wiring apart from the pillar in a second direction crossing the first direction, the first wiring extending in a third direction crossing the first direction and the second direction;a second wiring apart from the first wiring in the first direction and extending in the third direction;an insulating film provided between the first wiring and the second wiring;a first layer provided between the first wiring and the pillar in the second direction and including a first metal oxide containing a first metal and oxygen;a second layer provided between the second wiring and the pillar in the second direction and including the first metal oxide containing the first metal and oxygen; andan intermediate film provided between the pillar and the first layer in the second direction and between the pillar and the second layer in the second direction, intermediate film including a second metal oxide containing the first metal and oxygen,a concentration of oxygen contained in the first metal oxide being lower than a concentration of oxygen contained in the second metal oxide.2. ...

Подробнее
Номер записи: 46
19-03-2015 дата публикации

ELECTRONIC DEVICE

Номер: US20150077374A1
Автор: TAKANO Tomoki, YAMAGUCHI Takeshi
Принадлежит: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA

An electronic device includes a planar display and a touch panel, which overlaps the display. The touch panel has a detection zone that covers at least a vertical distance which is less than a first value and greater than a second value which is smaller than the first value and where two dimensional coordinates and the vertical distance can be detected. The detection zone has a first zone that covers the vertical distance from the first value to the second value and includes a center of the touch panel with respect to the two dimensional coordinates. The first zone, in which the vertical distance is a specific value between the first value and the second value, narrows as the specific value increases from the second value toward the first value. 1. An electronic device comprising:a planar display; anda touch panel that overlaps the display and that can detect two dimensional coordinates of an indicator on a surface of the display and a vertical distance from the indicator, wherein a detection zone that covers at least a vertical distance which is less than a first value and greater than a second value which is smaller than the first value and where the two dimensional coordinates and the vertical distance can be detected, and', 'a non-detection zone that covers at least the vertical distance which is greater than the first value and where at least one of the two dimensional coordinates and the vertical distance cannot be detected,, 'the touch panel comprises'} a first zone that covers the vertical distance from the first value to the second value and includes a center of the touch panel with respect to the two dimensional coordinates and', 'a second zone that covers at least a part of the vertical distance from the first value to the second value and is outside the first zone with respect to the two dimensional coordinates,, 'the detection zone has'}the first zone, in which the vertical distance is a certain value between the first value and the second value, ...

Подробнее
Номер записи: 47
15-03-2018 дата публикации

Semiconductor memory device

Номер: US20180076264A1
Автор: Takahiko Sasaki, Takeshi Yamaguchi
Принадлежит: Toshiba Memory Corp

A semiconductor memory device according to an embodiment includes: a first wiring line extending in a first direction; a second wiring line extending in a second direction, the second direction intersecting the first direction; a variable resistance film disposed at an intersection of the first wiring line and the second wiring line; a channel body disposed at a first end of the first wiring line; a third wiring line electrically connected to the first wiring line via the channel body; and a gate wiring line extending in the first direction and facing the channel body from the second direction.

Подробнее
Номер записи: 48
16-03-2017 дата публикации

SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF

Номер: US20170076792A1
Автор: KOBAYASHI Shigeki, YAMAGUCHI Takeshi
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively. The control circuit includes a detection circuit configured to detect a transition of a resistance state of a selected memory cell using a reference voltage. The control circuit is configured to execute a read operation in which the control circuit applies the third voltage to the selected first line and the non-selected first line, applies the second voltage to the selected second line, and applies the fourth voltage to the non-selected second line, and set the reference voltage based on a voltage value of the selected second line. 1: A semiconductor memory device , comprising:a memory cell array including,a plurality of first lines disposed above a substrate,a plurality of second lines disposed intersecting the first lines, andvariable resistance elements disposed at each of intersections of the first lines and the second lines; anda control circuit configured to apply a first voltage to a selected first line, apply a second voltage having a voltage value which is smaller than that of the first voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively, such that a first potential difference is applied to a selected variable resistance element disposed at the intersection of the selected first line and the selected second line,the control circuit including a detection circuit configured to, during the setting operation, detect a transition of a resistance state of the selected variable resistance element using a reference voltage, andthe control circuit being configured to, before the setting operation, execute ...

Подробнее
Номер записи: 49
26-03-2015 дата публикации

RESISTIVE RANDOM ACCESS MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Номер: US20150083989A1
Автор: Ode Hiroyuki, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

In accordance with an embodiment, a resistive random access memory device includes a substrate, first and second wiring lines, and a storage cell. The first and second wiring lines are disposed on the substrate so as to intersect each other. The storage cell is disposed between the first and second wiring lines at the intersection of the first and second wiring lines and includes a first electrode, a resistive switching film on the first electrode, a second electrode on the resistive switching film, and a tantalum oxide (TaO) layer. The first electrode is electrically connected to the first wiring line. The second electrode is electrically connected to the second wiring line. The tantalum oxide (TaO) layer is disposed between the first electrode and the resistive switching film and is in contact with the resistive switching film. 1. A resistive random access memory device comprising:a substrate;first and second wiring lines disposed on the substrate so as to intersect each other; anda storage cell disposed between the first and second wiring lines at the intersection of the first and second wiring lines,the storage cell comprisinga first electrode electrically connected to the first wiring line,a resistive switching film on the first electrode,a second electrode on the resistive switching film, which is electrically connected to the second wiring line, and{'sub': x', 'x, 'a tantalum oxide (TaO) layer disposed between the first electrode and the resistive switching film, the tantalum oxide (TaO) layer being in contact with the resistive switching film.'}2. The device of claim 1 ,{'sub': 'x', 'wherein the tantalum oxide (TaO) layer has a nearly stoichiometric composition at an interface with the resistive switching film.'}3. The device of claim 2 , wherein x satisfies the following relation: 2.0 ≦X≦2.5.4. The device of claim 1 ,{'sub': 'x', 'wherein the thickness of the tantalum oxide (TaO) layer is 0.1 nm to 2.0 nm.'}5. The device of claim 1 ,wherein the material of ...

Подробнее
Номер записи: 50
24-03-2016 дата публикации

RUBBER COMPOSITION AND SLIDE MEMBER

Номер: US20160083566A1
Автор: Hayashi Mika, HOKKIRIGAWA Kazuo, SHIBATA Kei, Takahashi Kei, YAMAGUCHI Takeshi
Принадлежит:

A rubber composition includes an ethylene-propylene-diene rubber, and a porous carbon particle derived from a plant material. Not less than 160 parts by mass and not more than 340 parts by mass of the porous carbon particle is included relative to 100 parts by mass of the ethylene-propylene-diene rubber. A slide member includes a cross-linked rubber body in which the rubber composition is cross-linked. 1. A rubber composition , comprising:an ethylene-propylene-diene rubber; anda porous carbon particle derived from a plant material, wherein not less than 160 parts by mass and not more than 340 parts by mass of the porous carbon particle is comprised relative to 100 parts by mass of the ethylene-propylene-diene rubber.2. A slide member claim 1 , comprising a cross-linked rubber body in which the rubber composition according to is cross-linked.3. The slide member according to claim 2 , wherein a coefficient of friction thereof is not more than 0.15 where a friction test is conducted in water at a load of not less than 0.98N and not more than 4.9N applied by a 4-mm radius metal ball comprising a bearing steel and at a sliding speed of not less than 0.001 m/s and not more than 1.0 m/s.4. The slide member according to claim 2 , wherein a coefficient of friction thereof is not more than 0.75 where a friction test is conducted in the air at a load of 1.96N applied by a 4-mm radius metal ball comprising a bearing steel and at a sliding speed of 1.0 m/s.5. The slide member according to claim 3 , wherein a coefficient of friction thereof is not more than 0.75 where a friction test is conducted in the air at a load of 1.96N applied by a 4-mm radius metal ball comprising a bearing steel and at a sliding speed of 1.0 m/s.6. The slide member according to claim 3 , wherein a specific wear rate in the friction test is not more than 2×10mm/N.7. The slide member according to claim 4 , wherein a specific wear rate in the friction test is not more than 2×10mm/N.8. The slide member ...

Подробнее
Номер записи: 51
18-03-2021 дата публикации

Color conversion table corrector, color conversion table correction program, and color conversion table correction method

Номер: US20210084195A1
Автор: Takeshi Yamaguchi
Принадлежит: KONICA MINOLTA INC

A color conversion table corrector corrects a color conversion table used in an image data generation device, and the color conversion table corrector includes a hardware processor that: obtains data related to a print image; obtains first target data based on a first captured image obtained by capturing an image of a first color matching target corresponding to the print image; decides a specific area, in the first captured image, which is not used to correct the color conversion table; and corrects the color conversion table according to the data related to the print image and the first target data based on the first captured image excluding the specific area.

Подробнее
Номер записи: 52
14-03-2019 дата публикации

IMAGE PROCESSING APPARATUS, PAPER THICKNESS ESTIMATION PROGRAM, AND METHOD FOR ESTIMATING PAPER THICKNESS

Номер: US20190080212A1
Автор: YAMAGUCHI Takeshi
Принадлежит:

An image processing apparatus includes: a reader that reads a paper sheet with a background plate serving as a background; and a hardware processor, wherein the hardware processor: obtains, from the reader, a first color value in which an image on one side of the paper sheet is read, a second color value in which a ground color of the other side of the paper sheet is read, and a third color value in which a portion corresponding to the image on the other side of the paper sheet is read; and estimates a thickness of the paper sheet on the basis of the first to third color values while referring to a predetermined table. 1. An image processing apparatus comprising: a reader that reads a paper sheet with a background plate serving as a background; and a hardware processor , whereinthe hardware processor:obtains, from the reader, a first color value in which an image on one side of the paper sheet is read, a second color value in which a ground color of the other side of the paper sheet is read, and a third color value in which a portion corresponding to the image on the other side of the paper sheet is read; andestimates a thickness of the paper sheet on the basis of the first to third color values while referring to a predetermined table.2. The image processing apparatus according to claim 1 , whereinthe hardware processorobtains, from each of a plurality of paper sheets having a different thickness in which images having a different density are formed on a front surface thereof, a color value in which a ground color of a back surface of the paper sheet is read and an offset color value in which a portion corresponding to the image on the back surface of the paper sheet is read, and the hardware processor further includes a table generator that generates a table in which a thickness of the paper sheet is associated with a ratio between the color value of the ground color and the offset color value for each density of the image.3. The image processing apparatus ...

Подробнее
Номер записи: 53
23-03-2017 дата публикации

ELECTRONIC APPARATUS

Номер: US20170083159A1
Автор: TAKANO Tomoki, YAMAGUCHI Takeshi
Принадлежит: Panasonic Intellectual Property Management Co., Ltd.

A strain quantity threshold value is set in accordance with a distance from a pressure detection unit for each divided predetermined subdivision which is obtained by dividing an operation surface of a touch panel unit into a plurality of subdivisions. The minimum value of the strain quantity threshold value is set to be a value larger than a strain quantity when water or the like is attached to the operation surface of the touch panel unit. 1. An electronics apparatus , comprising:a display;a touch panel overlapping the display, and configured to determine two-dimensional coordinates corresponding to an instructing object on the display;a transparent member overlapping the touch panel; anda detector configured to detect bends of the transparent member at positions on the display, the positions corresponding to thresholds, whereinwhen the detector detects a bend of the transparent member at one of the positions on the display, when the bend is larger than one of the thresholds corresponding to the one of the positions on the display, a two-dimensional coordinate determined by the touch panel is effective,when the bend is smaller than the one of the thresholds corresponding to the one of the positions on the display, the two-dimensional coordinate determined by the touch panel is ineffective, andthe thresholds decrease radially from a predetermined position on the display.2. The electronics apparatus according to claim 1 , whereinthe two-dimensional coordinate determined by the touch panel corresponds to the one of the positions on the display.3. The electronics apparatus according to claim 1 , whereinthe detector is located at the predetermined position on the display.4. The electronics apparatus according to claim 1 , whereinthe display has a first surface and a second surface opposing the first surface, and displays a content on the first surface, andthe detector is disposed on the second surface of the display.5. The electronics apparatus according to claim 1 , ...

Подробнее
Номер записи: 54
02-04-2015 дата публикации

Elastic composite material and mold product using the same

Номер: US20150094399A1
Автор: Kazuo Hokkirigawa, Kei Shibata, Kei Takahashi, Mika Hayashi, Osamu Murakami, Takeshi Yamaguchi
Принадлежит: Hitachi Metals Ltd

An elastic composite material containing a base polymer of a simple substance or a mixture of rubber or thermoplastic elastomer as a base material, and a hard porous carbon material containing carbide of defatted bran and carbide of phenolic resin. The hard porous carbon material is added in a ratio of 200 parts or more by weight relative to 100 parts by weight of the base polymer.

Подробнее
Номер записи: 55
29-03-2018 дата публикации

SEMICONDUCTOR INTEGRATED CIRCUIT

Номер: US20180090214A1
Автор: YAMAGUCHI Takeshi
Принадлежит: MITSUMI ELECTRIC CO., LTD.

A semiconductor integrated circuit includes a first circuit, a second circuit, a memory circuit having a plurality of flip-flops, a storage unit, a signal generating unit to produce an operation mode setting signal, a control circuit configured to cause the memory circuit to operate such that the plurality of flip-flops holds a value for setting characteristics of the first circuit when the operation mode setting signal indicates a first operation mode, and configured to cause the memory circuit to operate as a counter to measure a time length used in the second circuit when the operation mode setting signal indicates a second operation mode, and a setting circuit configured to cause trimming data stored in the storage unit to set the characteristic of the first circuit when the operation mode setting signal indicates the second operation mode, the trimming data corresponding to the value held by the memory circuit. 1. A semiconductor integrated circuit , comprising:a first circuit;a second circuit;a memory circuit having a plurality of flip-flops;a storage unit implemented as nonvolatile memory elements;a signal generating unit implemented as one or more nonvolatile memory elements to produce an operation mode setting signal for selecting one of a plurality of operation modes;a control circuit configured to cause the memory circuit to operate such that the plurality of flip-flops holds a value for setting characteristics of the first circuit when the signal generating circuit produces the operation mode setting signal indicative of a first operation mode, and configured to cause the memory circuit to operate as a counter to measure a time length used in the second circuit when the signal generating circuit produces the operation mode setting signal indicative of a second operation mode; anda setting circuit configured to cause trimming data stored in the storage unit to set the characteristic of the first circuit to correct product variation therein when the signal ...

Подробнее
Номер записи: 56
25-03-2021 дата публикации

SIGNAL PROCESSING APPARATUS, SIGNAL PROCESSING METHOD, AND SIGNAL PROCESSING SYSTEM

Номер: US20210092519A1
Автор: TAGUCHI Kazuaki, YAMAGUCHI Takeshi
Принадлежит: SONY CORPORATION

A signal processing apparatus includes: an audio signal processing unit configured to perform wavefront synthesis processing for at least part of a plurality of sound source data; a first output unit configured to output N-channel audio signals output from the audio signal processing unit to a first speaker device; a mix processing unit configured to mix the N-channel audio signals output from the audio signal processing unit; and a second output unit configured to output an audio signal output from the mix processing unit to a second speaker device. 1. A signal processing apparatus comprising:an audio signal processing unit configured to perform wavefront synthesis processing for at least part of a plurality of sound source data;a first output unit configured to output N-channel audio signals output from the audio signal processing unit to a first speaker device;a mix processing unit configured to mix the N-channel audio signals output from the audio signal processing unit; anda second output unit configured to output an audio signal output from the mix processing unit to a second speaker device.2. The signal processing apparatus according to claim 1 , comprising:a filter processing unit configured to perform processing of limiting the N-channel audio signals output from the audio signal processing unit to a band of equal to or lower than a predetermined frequency, wherein an output of the filter processing unit is supplied to the first output unit.3. The signal processing apparatus according to claim 2 , whereinthe predetermined frequency is set between 100 and 200 Hz.4. The signal processing apparatus according to claim 1 , wherein 1 ,in a case where the second speaker device includes X-channel speaker units, the mix processing unit performs mix processing after separating the N-channel audio signals into N/X-channel audio signals.5. The signal processing apparatus according to claim 4 , whereina value of the X is set to 1 or 2.6. The signal processing apparatus ...

Подробнее
Номер записи: 57
26-06-2014 дата публикации

SEQUENTIAL ATOMIC LAYER DEPOSITION OF ELECTRODES AND RESISTIVE SWITCHING COMPONENTS

Номер: US20140175354A1
Автор: Chiang Tony P., Minvielle Tim, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are methods of forming nonvolatile memory elements using atomic layer deposition techniques, in which at least two different layers of a memory element are deposited sequentially and without breaking vacuum in a deposition chamber. This approach may be used to prevent oxidation of various materials used for electrodes without a need for separate oxygen barrier layers. A combination of signal lines and resistive switching layers may be used to cap the electrodes and to minimize their oxidation. As such, fewer layers are needed in a memory element. Furthermore, atomic layer deposition allows more precise control of electrode thicknesses. In some embodiments, a thickness of an electrode may be less than 50 Angstroms. Overall, atomic layer deposition of electrodes and resistive switching layers lead to smaller thicknesses of entire memory elements making them more suitable for low aspect ratio features of advanced nodes. 1. A method of forming a nonvolatile memory element , the method comprising:forming a first layer using atomic layer deposition in a first processing chamber, the first layer being operable as a first electrode;forming a second layer using atomic layer deposition in the first processing chamber, the second layer being operable as a resistive switching layer; andannealing the substrate after the forming of the second layer, the annealing resulting in oxygen transferring from the second layer and into the first layer;wherein the second layer is formed over the first layer without breaking vacuum in the first processing chamber between forming the first layer and forming the second layer.2. The method of claim 1 , wherein the first layer is formed over a signal line claim 1 , and wherein the signal line and the second layer protect the first layer from oxidation.3. The method of claim 1 , wherein the first layer comprises one or more of tantalum nitride claim 1 , titanium nitride claim 1 , or tungsten nitride.4. The method of claim 1 , wherein the ...

Подробнее
Номер записи: 58
26-06-2014 дата публикации

Carbon Doped Resistive Switching Layers

Номер: US20140175355A1
Автор: Chiang Tony P., Minvielle Tim, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are carbon doped resistive switching layers, resistive random access memory (ReRAM) cells including these layers, as well as methods of forming thereof. Carbon doping of metal containing materials creates defects in these materials that allow forming and breaking conductive paths as evidenced by resistive switching. Relative to many conventional dopants, carbon has a lower diffusivity in many suitable base materials. As such, these carbon doped materials exhibit structural stability and consistent resistive switching over many operating cycles. Resistive switching layers may include as much as 30 atomic percent of carbon, making the dopant control relatively simple and flexible. Furthermore, carbon doping has acceptor characteristics resulting in a high resistivity and low switching currents, which are very desirable for ReRAM applications. Carbon doped metal containing layer may be formed from metalorganic precursors at temperatures below saturation ranges of atomic layer deposition. 1. A method of forming a resistive random access memory cell , the method comprising:providing a substrate comprising a first electrode layer into a processing chamber;flowing a metalorganic precursor into the processing chamber such that a portion of the metalorganic precursor is adsorbed on the substrate; and wherein the substrate is maintained at a temperature lower than a saturation range temperature associated with the metalorganic precursor resulting in partial decomposition of the adsorbed metalorganic precursor and in carbon doping of the metal containing material, and', 'wherein the layer of the carbon doped metal containing material is operable as a resistive switching layer in the resistive random access memory cell., 'flowing an oxidizing agent into the processing chamber such that a portion of the oxidizing agent reacts with the adsorbed metalorganic precursor forming a layer of a metal containing material,'}2. The method of claim 1 , further comprising performing ...

Подробнее
Номер записи: 59
26-06-2014 дата публикации

Resistive Random Access Memory Access Cells Having Thermally Isolating Structures

Номер: US20140175356A1
Автор: Chiang Tony P., Minvielle Tim, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are resistive random access memory (ReRAM) cells including resistive switching layers and thermally isolating structures for limiting heat dissipation from the switching layers during operation. Thermally isolating structures may be positioned within a stack or adjacent to the stack. For example, a stack may include one or two thermally isolating structures. A thermally isolating structure may directly interface with a switching layer or may be separated by, for example, an electrode. Thermally isolating structures may be formed from materials having a thermal conductivity of less than 1 W/m*K, such as porous silica and mesoporous titanium oxide. A thermally isolating structure positioned in series with a switching layer generally has a resistance less than the low resistance state of the switching layer. A thermally isolating structure positioned adjacent to a switching layer may have a resistance greater than the high resistance state of the switching layer. 1. A resistive random memory access cell comprising:a first layer comprising a metal oxide having at least two resistive states; anda second layer comprising a first thermally isolating material having a thermal conductivity of less than 1 W/m*K,wherein the second layer is porous.2. The resistive random memory access cell of claim 1 , wherein the first thermally isolating material comprises one of porous silica claim 1 , mesoporous titanium oxide claim 1 , and porous crystalline silicon.3. The resistive random memory access cell of claim 1 , wherein the first thermally isolating material has an electrical resistivity of less than 0.1 Ohm-cm.4. The resistive random memory access cell of claim 1 , further comprising a third layer operable as an electrode claim 1 , wherein the second layer is positioned in between the first layer and the third layer.5. The resistive random memory access cell of claim 1 , further comprising a third layer operable as an electrode claim 1 , wherein the third layer is ...

Подробнее
Номер записи: 60
26-06-2014 дата публикации

Bilayered Oxide Structures for ReRAM Cells

Номер: US20140175360A1
Автор: Imran Hashim, Mihir Tendulkar, Randall J. Higuchi, Takeshi Yamaguchi, Tim Minvielle, Vidyut Gopal, Yun Wang
Принадлежит: Intermolecular Inc, SanDisk 3D LLC, Toshiba Corp

Provided are resistive random access memory (ReRAM) cells having bi-layered metal oxide structures. The layers of a bi-layered structure may have different compositions and thicknesses. Specifically, one layer may be thinner than the other layer, sometimes as much as 5 to 20 times thinner. The thinner layer may be less than 30 Angstroms thick or even less than 10 Angstroms thick. The thinner layer is generally more oxygen rich than the thicker layer. Oxygen deficiency of the thinner layer may be less than 5 atomic percent or even less than 2 atomic percent. In some embodiments, a highest oxidation state metal oxide may be used to form a thinner layer. The thinner layer typically directly interfaces with one of the electrodes, such as an electrode made from doped polysilicon. Combining these specifically configured layers into the bi-layered structure allows improving forming and operating characteristics of ReRAM cells.

Подробнее
Номер записи: 61
26-06-2014 дата публикации

Resistive Switching Layers Including Hf-Al-O

Номер: US20140175361A1
Автор: Higuchi Randall J., Hsueh Chien-Lan, Minvielle Tim, Tong Jinhong, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are resistive random access memory (ReRAM) cells having switching layers that include hafnium, aluminum, oxygen, and nitrogen. The composition of such layers is designed to achieve desirable performance characteristics, such as low current leakage as well as low and consistent switching currents. In some embodiments, the concentration of nitrogen in a switching layer is between about 1 and 20 atomic percent or, more specifically, between about 2 and 5 atomic percent. Addition of nitrogen helps to control concentration and distribution of defects in the switching layer. Also, nitrogen as well as a combination of two metals helps with maintaining this layer in an amorphous state. Excessive amounts of nitrogen reduce defects in the layer such that switching characteristics may be completely lost. The switching layer may be deposited using various techniques, such as sputtering or atomic layer deposition (ALD). 1. A resistive random access memory cell comprising:a first layer operable as a first electrode;a second layer operable as a second electrode; anda third layer operable as a resistive switching layer and disposed between the first layer and the second layer, the third layer comprising hafnium, aluminum, oxygen, and nitrogen,wherein a thickness of the third layer is between 20 and 100 Angstroms.2. The resistive random access memory cell of claim 1 , wherein a concentration of oxygen in the third layer is between 30 and 60 atomic percent.3. The resistive random access memory cell of claim 1 , wherein a concentration of nitrogen in the third layer is between 1 and 20 atomic percent.4. The resistive random access memory cell of claim 1 , wherein a concentration of nitrogen in the third layer is at least three times less than a concentration of oxygen.5. The resistive random access memory cell of claim 1 , wherein a concentration of hafnium in the third layer is at least twice greater than a concentration of aluminum.6. The resistive random access memory cell ...

Подробнее
Номер записи: 62
26-06-2014 дата публикации

Limited Maximum Fields of Electrode-Switching Layer Interfaces in Re-RAM Cells

Номер: US20140175362A1
Автор: Hashim Imran, Minvielle Tim, Tendulkar Mihir, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are ReRAM cells, each having at least one interface between an electrode and a resistive switching layers with a maximum field value of less than 0.25. The electrode materials forming such interfaces include tantalum nitrides doped with lanthanum, aluminum, erbium yttrium, or terbium (e.g., Ta(Dopant)N, where X is at least about 0.95). The electrode materials have low work functions (e.g., less than about 4.5 eV). At the same time, the resistive switching materials have high relative dielectric permittivities (e.g., greater than about 30) and high electron affinities (greater than about for 3.5 eV). Niobium oxide is one example of a suitable resistive switching material. Another electrode interfacing the resistive switching layer may have different characteristics and, in some embodiments, may be an inert electrode. 1. A resistive random access memory cell comprising: wherein the doped tantalum nitride comprises a dopant,', 'the dopant being one of lanthanum, erbium, yttrium, or terbium;, 'a first layer comprising a doped tantalum nitride having a first work function (WF),'}{'sub': 'S', 'a second layer comprising a resistive switching material having an electron affinity (X) and a dielectric permittivity (∈); and'}a first interface formed between the first layer and the second layer.2. (canceled)3. The resistive random access memory cell of claim 1 , wherein the resistive switching comprises niobium oxide.4. The resistive random access memory cell of claim 1 , wherein the doped tantalum nitride is represented by a general formula of Ta(Dopant)N claim 1 , where X is at least about 0.95 claim 1 , and wherein Y is greater than 0.5. The resistive random access memory cell of claim 1 , wherein the first work function of the doped tantalum nitride is less than 4.5 eV.6. The resistive random access memory cell of claim 1 , wherein the dielectric permittivity of the resistive switching material is at least 30 and less than 100.7. The resistive random access memory ...

Подробнее
Номер записи: 63
26-06-2014 дата публикации

Forming Nonvolatile Memory Elements By Diffusing Oxygen Into Electrodes

Номер: US20140175363A1
Автор: Minvielle Tim, Tendulkar Mihir, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are methods of forming nonvolatile memory elements including resistance switching layers. A method involves diffusing oxygen from a precursor layer to one or more reactive electrodes by annealing. At least one electrode in a memory element is reactive, while another may be inert. The precursor layer is converted into a resistance switching layer as a result of this diffusion. The precursor layer may initially include a stoichiometric oxide that generally does not exhibit resistance switching characteristics until oxygen vacancies are created. Metals forming such oxides may be more electronegative than metals forming a reactive electrode. The reactive electrode may have substantially no oxygen at least prior to annealing. Annealing may be performed at 250-400° C. in the presence of hydrogen. These methods simplify process control and may be used to form nonvolatile memory elements including resistance switching layers less than 20 Angstroms thick. 1. A method of forming a nonvolatile memory element , the method comprising:forming a first layer, the first layer comprising a first metal, wherein the first layer is operable as a first electrode;forming a second layer, the second layer comprising an oxide of a second metal that is more electronegative than the first metal; andannealing the first layer and the second layer,wherein oxygen diffuses from the second layer into the first layer;wherein the second layer exhibits resistance switching characteristics after annealing; andwherein the annealing is performed in a hydrogen containing environment comprising no more than 10 weight percent of hydrogen.2. The method of claim 1 , wherein the second metal comprises aluminum and the first metal comprises tantalum.3. The method of claim 1 , wherein the second metal comprises hafnium and the first metal comprises tantalum.4. The method of claim 1 , wherein the second layer is formed after forming the first layer.5. The method of claim 1 , wherein the second layer ...

Подробнее
Номер записи: 64
26-06-2014 дата публикации

RADIATION ENHANCED RESISTIVE SWITCHING LAYERS

Номер: US20140175364A1
Автор: Chiang Tony P., Minvielle Tim, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are radiation enhanced resistive switching layers, resistive random access memory (ReRAM) cells including these layers, as well as methods of forming these layers and cells. Radiation creates defects in resistive switching materials that allow forming and breaking conductive paths in these materials thereby improving their resistive switching characteristics. For example, ionizing radiation may break chemical bonds in various materials used for such a layer, while non-ionizing radiation may form electronic traps. Radiation power, dozing, and other processing characteristics can be controlled to generate a distribution of defects within the resistive switching layer. For example, an uneven distribution of defects through the thickness of a layer may help with lowering switching voltages and/or currents. Radiation may be performed before or after thermal annealing, which may be used to control distribution of radiation created defects and other types of defects in resistive switching layers. 1. A method of forming a resistive random access memory cell , the method comprising:providing a substrate comprising a first electrode layer,the first electrode layer comprising a first electrode material;forming a layer of a resistive switching material over the first electrode layer;irradiating the layer of the resistive switching material andforming a second electrode layer over the layer of the resistive switching material after the irradiating;wherein the irradiating forms defects within the layer and improves resistive switching of the layer.2. The method of claim 1 , wherein the defects are unevenly distributed throughout a thickness of the layer of the resistive switching material.3. The method of claim 2 , wherein a concentration of the defects decreases towards an interface between the layer and the first electrode layer.4. The method of claim 1 , wherein irradiating the layer comprises ionizing radiation.5. The method of claim 4 , wherein the ionizing ...

Подробнее
Номер записи: 65
26-06-2014 дата публикации

Materials for Thin Resisive Switching Layers of Re-RAM Cells

Номер: US20140175367A1
Автор: Gopal Vidyut, Hashim Imran, Minvielle Tim, Tendulkar Mihir, Wang Yun, YAMAGUCHI Takeshi
Принадлежит:

Provided are resistive random access memory (ReRAM) cells that include thin resistive switching layers. In some embodiments, the resistive switching layers have a thickness of less than about 50 Angstroms and even less than about 30 Angstroms. The resistive switching characteristics of such thin layers are maintained by controlling their compositions and using particular fabrication techniques. Specifically, low oxygen vacancy metal oxides, such as tantalum oxide, may be used. The concentration of oxygen vacancies may be less than 5 atomic percent. In some embodiments, the resistive switching layers also include nitrogen and. For example, compositions of some specific resistive switching layers may be represented by TaON, where Y<(X−0.01). The resistive switching layers may be formed using Atomic Layer Deposition (ALD). 1. A resistive random access memory cell comprising:a first layer operable as a first electrode; the resistive switching material comprises oxygen vacancies,', 'a concentration of oxygen vacancies in the resistive switching material being less than 5 atomic percent,', 'the second layer having a thickness of less than 50 Angstroms; and, 'a second layer comprising a resistive switching material,'} 'wherein the second layer is positioned between the first layer and the third layer.', 'a third layer operable as a second electrode,'}2. The resistive random access memory cell of claim 1 , wherein the resistive switching material further comprises nitrogen.3. The resistive random access memory cell of claim 1 , wherein the resistive switching material comprises tantalum oxide.4. The resistive random access memory cell of claim 1 , wherein the resistive switching material comprises tantalum and nitrogen.5. The resistive random access memory cell of claim 1 , wherein the resistive switching material is represented by a formula TaONsuch that Y<(X−0.01).6. The resistive random access memory cell of claim 1 , wherein the second layer has a thickness of less than ...

Подробнее
Номер записи: 66
26-06-2014 дата публикации

Multi-Level Memory Array Having Resistive Elements For Multi-Bit Data Storage

Номер: US20140177315A1
Автор: David E. Lazovsky, Dipankar Pramanik, Takeshi Yamaguchi, Tim Minvielle
Принадлежит: Intermolecular Inc, SanDisk 3D LLC, Toshiba Corp

A resistor array for multi-bit data storage without the need to increase the size of a memory chip or scale down the feature size of a memory cell contained within the memory chip is provided. The resistor array incorporates a number of discrete resistive elements to be selectively connected, in different series combinations, to at least one memory cell or memory device. In one configuration, by connecting each memory cell or device with at least one resistor array, a resistive switching layer found in the resistive switching memory element of the connected memory device is capable of being at multiple resistance states for storing multiple bits of digital information. During device programming operations, when a desired series combination of the resistive elements within the resistor array is selected, the resistive switching layer in the connected memory device can be in a desired resistance state.

Подробнее
Номер записи: 67
07-04-2016 дата публикации

SEMICONDUCTOR MEMORY DEVICE

Номер: US20160099289A1
Автор: Fukumizu Hiroyuki, KOBAYASHI Shigeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position. 1. A semiconductor memory device comprising a memory cell array , the memory cell array comprising memory cells ,the memory cell array comprising:first conductive layers stacked at a predetermined pitch in a first direction perpendicular to a substrate, the first conductive layers extending in a second direction parallel to the substrate;a memory layer provided in common on side surfaces of the first conductive layers; anda second conductive layer comprising a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction,a width in the second direction of the first side surface at a first position being smaller than a width in the second direction of the first side surface at a second position lower than the first position,a third direction extending in a direction perpendicular to the first and second directions, anda thickness in the third direction of the memory layer at the first position being larger than a thickness in the third direction of the memory layer at the second position.2. The semiconductor memory device according to claim 1 ...

Подробнее
Номер записи: 68
26-06-2014 дата публикации

IMAGE PROCESSING APPARATUS, IMAGE PROCESSING METHOD, AND PROGRAM

Номер: US20140178049A1
Автор: Kato Yasuhiko, Kihara Nobuyuki, Sakuraba Yohei, YAMAGUCHI Takeshi
Принадлежит: SONY CORPORATION

This technology relates to an image processing apparatus, an image processing method, and a program, which enable easier addition of an effect to a moving image. 1. An image processing apparatus , comprising:a keyword detecting unit which detects a keyword determined in advance from a voice uttered by a user and picked up by a sound pickup unit different from a sound pickup unit for picking up an environmental sound being a sound associated with a moving image when the moving image is shot; andan effect adding unit which adds an effect determined for the detected keyword to the moving image or the environmental sound.2. The image processing apparatus according to claim 1 , further comprising:a sound effect generating unit which generates a sound effect based on the detected keyword, whereinthe effect adding unit synthesizes the sound effect with the environmental sound.3. The image processing apparatus according to claim 2 , further comprising:an image effect generating unit which generates an image effect based on the detected keyword, whereinthe effect adding unit superposes the image effect on the moving image.4. The image processing apparatus according to claim 3 , further comprising:a shooting unit which shoots the moving image;a first sound pickup unit which picks up the environmental sound; anda second sound pickup unit which picks up the voice uttered by the user.5. The image processing apparatus according to claim 3 , further comprising:a receiving unit which receives the moving image, the environmental sound, and the voice uttered by the user.6. An image processing method to be performed by an image processing apparatus including:a keyword detecting unit which detects a keyword determined in advance from a voice uttered by a user and picked up by a sound pickup unit different from a sound pickup unit for picking up an environmental sound being a sound associated with a moving image when the moving image is shot; andan effect adding unit which adds an ...

Подробнее
Номер записи: 69
06-04-2017 дата публикации

PRINTER, NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM STORING PROGRAM FOR CREATING SCANNER PROFILE AND METHOD OF CREATING SCANNER PROFILE

Номер: US20170099414A1
Автор: YAMAGUCHI Takeshi
Принадлежит: KONICA MINOLTA, INC.

Provided are a printer, a non-transitory computer-readable storage medium and a scanner-profile creation method. In a printer including a print engine, a scanner and a color measurement device, or a printing system including a printer, a scanner and a color measurement device, a controller creates a scanner profile by using RGB values and color measurement values obtained by measuring a first color chart with the scanner and color measurement device, and determines a first color gamut and a second color gamut of the printer by using one or both of RGB values and color measurement values obtained by measuring the first color chart and a second color chart, respectively, where the second color chart includes at least color patches in specific colors representing a color gamut of the printer. The controller further corrects the scanner profile by comparing the first color gamut and the second color gamut. 1. A printer comprising:a print engine;an in-line scanner;an in-line color measurement device; and causes the print engine to print a first color chart including a plurality of color patches and a second color chart including a plurality of color patches, the plurality of color patches of the second color chart including color patches in specific colors representing a color gamut of the printer and being on an edge of the color gamut of the printer,', 'causes the in-line scanner to obtain RGB values of color patches in the first color chart and the second color chart, and', 'causes the in-line color measurement device to obtain color measurement values of color patches in the first color chart and the second color chart, and the controller including', 'a scanner profile creation section that creates a scanner profile by associating the RGB values and the corresponding color measurement values of each of the color patches in the first color chart with each other,', determines a first color gamut of the printer by using one or both of the RGB values and the color ...

Подробнее
Номер записи: 70
23-04-2015 дата публикации

RESISTANCE CHANGE ELEMENT AND METHOD FOR MANUFACTURING SAME

Номер: US20150108420A1
Автор: KOBAYASHI Shigeki, NAKAKUBO Yoshinori, Ode Hiroyuki, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to one embodiment, a resistance change element includes: a first electrode; a second electrode; and a resistance change film provided between the first electrode and the second electrode, and the resistance change film including: a first transition metal oxide-containing layer; a second transition metal oxide-containing layer; and an intermediate layer provided between the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, the intermediate layer having a higher crystallization temperature than the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, and the intermediate layer including an amorphous material. 1. A resistance change element comprising:a first electrode;a second electrode; and a first transition metal oxide-containing layer;', 'a second transition metal oxide-containing layer; and', 'an intermediate layer provided between the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, the intermediate layer having a higher crystallization temperature than the first transition metal oxide-containing layer and the second transition metal oxide-containing layer, and the intermediate layer including an amorphous material., 'a resistance change film provided between the first electrode and the second electrode, and the resistance change film including2. The element according to claim 1 , wherein the first transition metal oxide-containing layer and the second transition metal oxide-containing layer include at least one of hafnium oxide claim 1 , tantalum oxide claim 1 , zirconium oxide claim 1 , titanium oxide claim 1 , and niobium oxide.3. The element according to claim 1 , wherein the intermediate layer includes at least one of aluminum oxide claim 1 , silicon oxide claim 1 , silicon nitride claim 1 , titanium oxide claim 1 , and titanium nitride.4. The element according to claim 1 , wherein crystal grain ...

Подробнее
Номер записи: 71
02-06-2022 дата публикации

COLOR CONVERSION TABLE GENERATION DEVICE AND RECORDING MEDIUM

Номер: US20220171581A1
Автор: YAMAGUCHI Takeshi
Принадлежит: KONICA MINOLTA, INC.

A color conversion table generation device includes a color conversion table acquisition unit, an image data acquisition unit, a read image data acquisition unit, an acceptance unit, and a modification unit. The color conversion table acquisition unit acquires a color conversion table used in color conversion for image data to be printed which is imposed. The image data acquisition unit acquires the image data to be printed. The read image data acquisition unit acquires read image data of a print target corresponding to a partial area in the image data to be printed. The acceptance unit accepts specification of a target area in the image data to be printed which is to be used for modifying the color conversion table. The modification unit modifies the color conversion table based on the read image data and information corresponding to the specified target area. 1. A color conversion table generation device , comprising:a color conversion table acquisition unit that acquires a color conversion table used in color conversion for image data to be printed which is imposed;an image data acquisition unit that acquires the image data to be printed;a read image data acquisition unit that acquires read image data of a print target corresponding to a partial area in the image data to be printed;an acceptance unit that accepts specification of a target area in the image data to be printed which is to be used for modifying the color conversion table; anda modification unit that modifies the color conversion table based on the read image data and information corresponding to the specified target area in the image data to be printed.2. The color conversion table generation device according to claim 1 , further comprising:a display that displays a preview image of the image data to be printed; anda specification unit that specifies the target area in the preview image displayed on the display,wherein the acceptance unit accepts specification of the target area from the ...

Подробнее
Номер записи: 72
10-07-2014 дата публикации

Resistive Random Access Memory Cell Having Three or More Resistive States

Номер: US20140192585A1
Автор: Clarke Ryan C., Hashim Imran, Lu Nan, Minvielle Tim, YAMAGUCHI Takeshi
Принадлежит:

Provided are resistive random access memory (ReRAM) cells, each having three or more resistive states and being capable of storing multiple bits of data, as well as methods of fabricating and operating such ReRAM cells. Such ReRAM cells or, more specifically, their resistive switching layer have wide range of resistive states and are capable of being very conductive (e.g., about 1 kOhm) in one state and very resistive (e.g., about 1 MOhm) in another state. In some embodiments, a resistance ratio between resistive states may be between 10 and 1,000 even up to 10,000. The resistive switching layers also allow establishing stable and distinct intermediate resistive states that may be assigned different data values. These layers may be configured to switching between their resistive states using fewer programming pulses than conventional systems by using specific materials, switching pluses, and resistive state threshold. 1. A method of switching a resistive random access memory (ReRAM) cell among three or more resistive states , the method comprising: the resistive switching layer comprising one of hafnium oxide, zirconium oxide, silicon oxide, or a combination of titanium oxide and aluminum oxide;', 'wherein the resistive switching layer has a first resistance; applying a first set of programming pulses to the ReRAM cell,', 'wherein, after applying the first set of programming pulses, the resistive switching layer has a second resistance less than the first resistance; and applying a second set of programming pulses to the ReRAM cell,', 'wherein, after applying the second set of programming pulses, the resistive switching layer has a third resistance less than the second resistance, and', 'wherein a ratio of the first resistance to the third resistance is between 10 and 1000., 'providing the ReRAM cell comprising a resistive switching layer,'}2. The method of claim 1 , wherein the ratio of the first resistance to the third resistance is between 100 and 1000.3. The ...

Подробнее
Номер записи: 73
28-04-2016 дата публикации

SEMICONDUCTOR DEVICE

Номер: US20160118492A1
Автор: ASADA Takeshi, KITADA Mizue, SUZUKI Noriaki, YAMAGUCHI Takeshi
Принадлежит: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.

A semiconductor device includes a drift layer of a first conductivity type, a base layer of a second conductivity type that is disposed on the drift layer and is connected to a source electrode and a column layer of a second conductivity type that is connected to the source electrode and penetrates the base layer to extend into the drift layer 1. A semiconductor device , comprising:a drift layer of a first conductivity type;a base layer of a second conductivity type that is disposed on the drift layer and is connected to a source electrode;a column layer of a second conductivity type that is connected to the source electrode and penetrates the base layer to extend into the drift layer;a pair of first gate electrodes surrounded by a first insulating layer disposed in a pair of first trenches provided on opposite sides of an upper end of the column layer; anda source region of the first conductivity type that is provided in the base layer, is adjacent to the first insulating layer on a side of the first insulating layer opposite to the column layer, and is connected to the source electrode.2. The semiconductor device according to claim 1 , wherein the column layer and the drift layer repeatedly occur in a horizontal direction to form a super junction structure.3. The semiconductor device according to or claim 1 , further comprising:a second gate electrode surrounded by a second insulating layer that is disposed in a second trench formed in the column layer between the pair of first gate electrodes in the horizontal direction.4. The semiconductor device according to or claim 1 , wherein a plurality of column layers are provided claim 1 , andthe semiconductor device further comprises a third gate electrode surrounded by a third insulating layer that is disposed between adjacent two of the column layers and is disposed in a third trench that extends from the source region to the drift layer.5. The semiconductor device according to or claim 1 , wherein a plurality of ...

Подробнее
Номер записи: 74
28-04-2016 дата публикации

BATTERY PROTECTION CIRCUIT, BATTERY PROTECTION APPARATUS, AND BATTERY PACK

Номер: US20160118821A1
Автор: ITAGAKI Takatoshi, KAGEYAMA Ryota, MURANO Koichi, TAKEDA Takashi, TAKESHITA Junji, YAMAGUCHI Takeshi, Yano Koji
Принадлежит: MITSUMI ELECTRIC CO., LTD.

A battery protection circuit for protecting a secondary battery, the battery protection circuit not having a CPU, includes a non-volatile memory into which characteristics data determining protective characteristics of the battery protection circuit are writable; and a protection operation circuit which performs a protection operation of the secondary battery based on the characteristics data read out of the non-volatile memory. 119-. (canceled)20. A battery protection circuit for protecting a secondary battery , the battery protection circuit not having a CPU , the battery protection circuit comprising:a non-volatile memory into which characteristics data determining protective characteristics of the battery protection circuit are writable;a protection operation circuit which performs a protection operation of the secondary battery based on the characteristics data read out of the non-volatile memory;a power source terminal; anda regulator which outputs a constant voltage by regulating an input voltage input into the power source terminal,wherein the regulator regulates a write voltage, which is input into the power source terminal and provided to write the characteristics data into the non-volatile memory, and outputs the constant voltage.21. The battery protection circuit according to claim 20 , further comprising:a read write control circuit which is supplied with the constant voltage and controls to read or write the characteristics data.22. A battery protection circuit for protecting a secondary battery claim 20 , the battery protection circuit not having a CPU claim 20 , the battery protection circuit comprising:a non-volatile memory into which characteristics data determining protective characteristics of the battery protection circuit are writable;a protection operation circuit which performs a protection operation of the secondary battery based on the characteristics data read out of the non-volatile memory;a charge control terminal which outputs a signal ...

Подробнее
Номер записи: 75
07-05-2015 дата публикации

Method for Forming Metal Oxides and Silicides in a Memory Device

Номер: US20150123071A1
Автор: Chiang Tony P., Minvielle Tim, Pramanik Dipankar, YAMAGUCHI Takeshi
Принадлежит:

Embodiments of the invention generally relate to memory devices and methods for fabricating such memory devices. In one embodiment, a method for fabricating a resistive switching memory device includes depositing a metallic layer on a lower electrode disposed on a substrate and exposing the metallic layer to an activated oxygen source while heating the substrate to an oxidizing temperature within a range from about 300° C. to about 600° C. and forming a metal oxide layer from an upper portion of the metallic layer during an oxidation process. The lower electrode contains a silicon material and the metallic layer contains hafnium or zirconium. Subsequent to the oxidation process, the method further includes heating the substrate to an annealing temperature within a range from greater than 600° C. to about 850° C. while forming a metal silicide layer from a lower portion of the metallic layer during a silicidation process. 1. A semiconductor device comprising:a lower electrode comprising silicon;a metal silicide layer disposed over the lower electrode; wherein the metal silicide layer and the metal oxide layer comprise a common metal,', 'wherein the common metal comprises hafnium, zirconium, or both,', 'wherein the metal oxide layer is configured to resistively switch between a first resistive state and a second resistive state different from the first resistive state; and, 'a metal oxide layer disposed over the metal silicide layer,'}an upper electrode disposed over the metal oxide layer.2. The semiconductor device of claim 1 , wherein the common metal comprises hafnium.3. The semiconductor device of claim 1 , wherein the common metal comprises hafnium and zirconium.4. The semiconductor device of claim 1 , wherein the metal oxide layer has a thickness of between 20 Angstroms and 80 Angstroms.5. The semiconductor device of claim 1 , wherein the metal oxide layer has a thickness of between 30 Angstroms and 50 Angstroms.6. The semiconductor device of claim 1 , wherein ...

Подробнее
Номер записи: 76
27-04-2017 дата публикации

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME

Номер: US20170117039A1
Автор: Ode Hiroyuki, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to an embodiment, a nonvolatile semiconductor memory device comprises: a memory cell array; and a control circuit that manages a setting operation and a read operation. The memory cell array comprises: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell including a variable resistance element and a nonlinear element. The variable resistance element is configured having a first metal film, a first variable resistance film, a second variable resistance film, and a second metal film stacked and disposed therein in this order. A work function of the second metal film is smaller than a work function of the first metal film. 1. A nonvolatile semiconductor memory device , comprising:a memory cell array; anda control circuit that applies a voltage to the memory cell array to manage a setting operation and a read operation,the memory cell array comprising: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell disposed at an intersection of the first and second wiring lines and including a variable resistance element and a nonlinear element,the variable resistance element being configured having a first metal film, a first variable resistance film, a second variable resistance film, and a second metal film stacked and disposed therein in this order, anda work function of the second metal film being smaller than a work function of the first metal film.2. The nonvolatile semiconductor memory device according to claim 1 , whereinthe second variable resistance film is of lower permittivity than the first variable resistance film.3. The nonvolatile semiconductor memory device according to claim 1 , whereina thickness of the second variable resistance film is 3 nm or less.4. The nonvolatile semiconductor memory device according to claim 1 , whereinthe first metal film includes any of Ti, Pt, Ru, or Ir.5. The nonvolatile semiconductor memory device according to claim 1 , whereinthe second ...

Подробнее
Номер записи: 77
31-07-2014 дата публикации

SEMICONDUCTOR MEMORY DEVICE

Номер: US20140209853A1
Автор: Fukumizu Hiroyuki, Kobayashi Shiegeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position. 1. A semiconductor memory device comprising a memory cell array , the memory cell array comprising memory cells ,the memory cell array comprising:first conductive layers stacked at a predetermined pitch in a first direction perpendicular to a substrate, the first conductive layers extending in a second direction parallel to the substrate;a memory layer provided in common on side surfaces of the first conductive layers; anda second conductive layer comprising a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction,a width in the second direction of the first side surface at a first position being smaller than a width in the second direction of the first side surface at a second position lower than the first position, anda thickness in the first direction of the first conductive layer at the first position being larger than a thickness in the first direction of the first conductive layer at the second position.2. The semiconductor memory device according to claim 1 , whereina direction perpendicular to the first and second directions ...

Подробнее
Номер записи: 78
21-05-2015 дата публикации

Color conversion table creation method, non-transitory computer readable recording medium stored with color conversion table creation program, and color conversion table creating apparatus

Номер: US20150138574A1
Автор: Takeshi Yamaguchi
Принадлежит: KONICA MINOLTA INC

Provided is a color conversion table creation method for creating a color conversion table for an image forming apparatus which forms an image by performing, on an input color value with total use amount of color material exceeding set amount, a process for reducing the total use amount of color material, the table presenting correspondence between the input color value input to the image forming apparatus and an output color value in a device-independent color space. The method includes: acquiring an input color value of a patch image for creating the table; when the total use amount of color material defined by the acquired input color value is around the set amount, adjusting the input color value to have a smaller difference between the total use amount and the set amount; and creating the color conversion table using the patch image with the adjusted input color value.

Подробнее
Номер записи: 79
11-05-2017 дата публикации

SEMICONDUCTOR MEMORY DEVICE

Номер: US20170133586A1
Автор: Fukumizu Hiroyuki, KOBAYASHI Shigeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A plurality of first conductive layers are stacked at a predetermined pitch in a first direction perpendicular to a substrate. A memory layer is provided in common on side surfaces of the first conductive layers and functions as the memory cells. A second conductive layer comprises a first side surface in contact with side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction. A width in a second direction of the first side surface at a first position is smaller than a width in the second direction of the first side surface at a second position lower than the first position. A thickness in the first direction of the first conductive layer at the first position is larger than a thickness in the first direction of the first conductive layer at the second position. 15-. (canceled)6: A semiconductor memory device comprising a memory cell array , the memory cell array comprising memory cells ,the memory cell array comprising:first conductive layers stacked at a predetermined pitch in a first direction perpendicular to a substrate, the first conductive layers extending in a second direction parallel to the substrate;a memory layer provided in common on side surfaces of the first conductive layers on a third direction, the third direction extending in a direction perpendicular to the first and second directions; anda second conductive layer comprising a first side surface on the third direction in contact with the side surfaces of the first conductive layers via the memory layer, the second conductive layer extending in the first direction,an entire width in the second direction of the first side surface at an upper end thereof being larger than an entire width in the second direction of the first side surface at a lower end thereof, the lower end of the first side surface being closer to the substrate than the upper end of the first side surface, andan entire thickness in the third direction of the ...

Подробнее
Номер записи: 80
07-08-2014 дата публикации

Transition Metal Oxide Bilayers

Номер: US20140217348A1
Автор: Gopal Vidyut, Hashim Imran, Minvielle Tim, Pham Hieu, Wang Yun, YAMAGUCHI Takeshi, Yang Hong Sheng
Принадлежит:

Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen. 1. A nonvolatile memory element comprising:a first layer operable as a first electrode;a second layer operable as a second electrode;a third layer between the first layer and the second layer; anda fourth layer between the first layer and the second layer;wherein the third layer has a linear resistance and a sub-stoichiometric composition; andwherein the fourth layer has a bistable resistance and a near-stoichiometric composition.2. The nonvolatile memory element of claim 1 , wherein at least one of the third layer or the fourth layer comprises oxygen.3. The nonvolatile memory element of claim 1 , wherein at least one of the third layer or the fourth layer comprises nitrogen.4. The nonvolatile memory element of claim 1 , wherein at least one of the third layer or the fourth layer comprises silicon.5. The nonvolatile memory element of claim 1 , wherein the third layer and the fourth layer comprise a same metal.6. The nonvolatile memory element of claim 1 , wherein the third layer and the fourth layer comprise two same metals.7. The nonvolatile memory element of claim 1 , wherein one of ...

Подробнее
Номер записи: 81
07-08-2014 дата публикации

ELECTRONIC DEVICE, INPUT PROCESSING METHOD AND PROGRAM

Номер: US20140218337A1
Автор: TAKANO Tomoki, YAMAGUCHI Takeshi
Принадлежит: Panasonic Corporation

A touch panel layer has an electrostatic capacitance which changes according to a distance from an external object and outputs a signal of intensity which differs according to the change in the electrostatic capacitance. A coordinate acquiring section determines a contact state in which an external object touches the touch panel layer or a proximity state in which the external object is located within a predetermined distance from the touch panel layer, based on the intensity of the signal. A state determination section determines the contact state or the proximity state based on the result of state determination made by the coordinate acquiring section and the result of detection performed by a depression acquiring section. A touch coordinate processing section performs processing associated with a touch input operation. A hover coordinate processing section performs processing associated with a hover operation. 1. An electronic device comprising:a planar display section;a planar transparent member that has a predetermined transmittance and that is disposed while being overlapped with the display section;a touch panel layer that is disposed between the display section and the transparent member while being overlapped with the display section and that detects two-dimensional coordinates of an indicator having predetermined conductivity along a surface of the display section and that detects a vertical distance from the indicator to the touch panel layer; anda depression detecting section that detects deformation of at least the transparent member, wherein:when the vertical distance detected by the touch panel layer is equal to or less than a first value, the electronic device performs processing associated with touch input for at least the two-dimensional coordinates detected by the touch panel layer; andwhen the vertical distance is greater than the first value but not greater than a second value that is a value greater than the first value, and also when the ...

Подробнее
Номер записи: 82
14-08-2014 дата публикации

MULTIFUNCTIONAL ELECTRODE

Номер: US20140224645A1
Автор: Gopal Vidyut, Hashim Imran, Minvielle Tim, Pham Hieu, Pramanik Dipankar, Wang Yun, YAMAGUCHI Takeshi, Yang Hong Sheng
Принадлежит:

A nonvolatile memory element is disclosed comprising a first electrode, a near-stoichiometric metal oxide memory layer having bistable resistance, and a second electrode in contact with the near-stoichiometric metal oxide memory layer. At least one electrode is a resistive electrode comprising a sub-stoichiometric transition metal nitride or oxynitride, and has a resistivity between 0.1 and 10 Ωcm. The resistive electrode provides the functionality of an embedded current-limiting resistor and also serves as a source and sink of oxygen vacancies for setting and resetting the resistance state of the metal oxide layer. Novel fabrication methods for the second electrode are also disclosed. 1. A method , comprising:forming a first layer by reactive sputtering in an atmosphere containing a source of nitrogen; a pressure between about 10 and 50 mTorr,', 'a substrate bias more than 120% of a value expected to minimize resistivity, or', 'a sputtering angle between about 55 and 85 degrees; and, 'wherein process conditions during the reactive sputtering comprises one of'}wherein the first layer comprises a sub-stoichiometric metal nitride or a sub-stoichiometric metal oxynitride having a resistivity between about 0.1 and 10 ohm-cm.2. The method of claim 1 , wherein the first layer is operable as one of a source of oxygen vacancies or a sink of oxygen vacancies.3. The method of claim 1 , wherein the first layer is operable as a source of oxygen vacancies or alternatively as a sink of oxygen vacancies claim 1 , depending on the nature of an electric field applied to the first layer.4. The method of claim 1 , wherein the atmosphere comprises more than about 50 vol % nitrogen.5. The method of claim 1 , wherein the atmosphere further comprises a source of oxygen.6. The method of claim 1 , wherein a metal of the sub-stoichiometric metal nitride or the sub-stoichiometric metal oxynitride is a transition metal.7. The method of claim 6 , wherein the transition metal comprises one of ...

Подробнее
Номер записи: 83
10-06-2021 дата публикации

TISSUE PAPER AND METHOD OF EVALUATING THE SAME

Номер: US20210172925A1
Автор: HOKKIRIGAWA Kazuo, NAKANE Risa, SHIBATA Kei, YAMAGUCHI Takeshi, YAMAI Naoya, YASUI Shuta, YOROZU Hidenori
Принадлежит:

To provide tissue paper excellent in softness and smoothness. In tissue paper that is two-ply non-moisturizing tissue paper to which no chemical solution is applied, a basis weight per sheet is 10.0 to 18.0 g/m, the thickness of two plies is 100 to 240 μm, a dry tensile strength in the paper horizontal direction is 70 to 180 cN/25 mm, a wet tensile strength in the paper horizontal direction is 25 to 55 cN/25 mm, and a free sensory evaluation value Ecalculated according to the following Equation 1 is 3.7 to 6.6, and a slip sensory evaluation value Ecalculated according to the following Equation 2 is 5.0 to 8.2. 1. Tissue paper that is two-ply non-moisturizing tissue paper to which no chemical solution is applied ,{'sup': '2', 'wherein a basis weight per sheet is 10.0 to 18.0 g/m, a thickness of two plies is 100 to 240 μm,'}a dry tensile strength in a paper horizontal direction is 70 to 180 cN/25 mm,a wet tensile strength in a paper horizontal direction is 25 to 55 cN/25 mm, and{'sub': f', 's, 'claim-text': [{'br': None, 'i': 'E', 'sub': 'f', 'Free sensory evaluation value =−2.879×(dry tensile strength in paper horizontal direction)+6.55×(wet tensile strength in paper horizontal direction)+5.36\u2003\u2003(Equation 1)'}, {'br': None, 'i': 'E', 'sub': 's', 'Slip sensory evaluation value =−8.80×(dynamic friction coefficient)−0.41×(arithmetic mean surface roughness)+13.58\u2003\u2003(Equation 2)'}], 'a free sensory evaluation value Ecalculated according to the following Equation 1 is 3.7 to 6.6, and a slip sensory evaluation value Ecalculated according to the following Equation 2 is 5.0 to 8.2.'}2. Tissue paper that is a two-ply moisturizing tissue paper to which a chemical solution is applied ,{'sup': '2', 'wherein a basis weight per sheet is 14.0 to 22.0 g/m, a thickness is 120 to 250 μm,'}a dry tensile strength in a paper horizontal direction is 50 to 120 cN/25 mm,a wet tensile strength in a paper horizontal direction is 30 to 90 cN/25 mm, and{'sub': f', 's, 'claim- ...

Подробнее
Номер записи: 84
04-06-2015 дата публикации

NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME

Номер: US20150155333A1
Автор: KOBAYASHI Shigeki, NAKAKUBO Yoshinori, Ode Hiroyuki, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

According to an embodiment, a nonvolatile memory device includes a first wiring extending to a first direction, a second wiring disposed on the first wiring in a second direction which is orthogonal to the first direction, a first insulating film provided between the first wiring and the second wiring, a bit line extending in the second direction, and a variable resistance film contacting an end portion of the first wiring, an end portion of the second wiring, and an end portion of the first insulating film. A dielectric constant of a center portion between the first and second wirings in the second direction is higher than at vicinities of the first and the second wirings. The variable resistance film is disposed between the bit line and the first wiring, between the bit line and the second wiring, and between the bit line and the first insulating film. 1. A nonvolatile memory device , comprising:a first wiring extending in a first direction;a second wiring disposed on the first wiring in a second direction which is orthogonal to the first direction;a first insulating film provided between the first wiring and the second wiring;a bit line extending in the second direction; anda variable resistance film contacting an end portion of the first wiring, an end portion of the second wiring, and an end portion of the first insulating film, the variable resistance film being disposed between the bit line and the first wiring, between the bit line and the second wiring, and between the bit line and the first insulating film,a dielectric constant of a center portion between the first wiring and the second wiring in the second direction being higher than at a vicinity of the first wiring and a vicinity of the second wiring.2. The device according to claim 1 , whereinthe first insulating film includes a first film, a second film, and a third film stacked in order in the second direction, anda dielectric constant of the second film is larger than that of the first film and the ...

Подробнее
Номер записи: 85
01-06-2017 дата публикации

Outsole of Shoe

Номер: US20170150782A1
Автор: HOKKIRIGAWA Kazuo, MORIYASU Kenta, Nishiwaki Tsuyoshi, SHIBATA Kei, YAMAGUCHI Takeshi
Принадлежит: ASICS CORPORATION

An outsole of a shoe includes: a plurality of ridges having a tread surface to be in contact with a road surface; and at least one longitudinal groove defined between the plurality of ridges. At least in a partial area of each of a forefoot portion and a rear foot portion on a medial side of a foot, the plurality of ridges and the longitudinal groove extend in a longitudinal direction or a diagonal longitudinal direction and are set so that an angle of the ridges and that of the longitudinal groove with respect to a long axis of the outsole are in a range of 0° to 35°. A ratio of a length of the tread surface of the ridges with respect to a width of the tread surface is set to be 1.8 to 200. The width of the tread surface of the ridges is set to be greater than a width of the longitudinal groove by a factor of 2 to 100. 112-. (canceled)13. An outsole of a shoe , the outsole comprising: a plurality of ridges each having a tread surface to be in contact with a road surface; and at least one longitudinal groove defined between the plurality of ridges , wherein:at least in a partial area of each of a forefoot portion and a rear foot portion on a medial side of a foot, the plurality of ridges and the longitudinal groove are configured to extend in a longitudinal direction or in a diagonal longitudinal direction and are configured to be set so that angles of the ridges and the groove with respect to a long axis of the outsole are in a range of 0° to 35°;a ratio of a length of the tread surface of each of the ridges with respect to a width of the tread surface is set to be 1.8 to 200; andthe width of the tread surface of each of the ridges is set to be greater than a width of the longitudinal groove by a factor of 2 to 100.14. The outsole according to claim 13 , wherein a ratio of the width of the tread surface of each of the ridges with respect to a depth of the longitudinal groove is set to be 2 to 20.15. The outsole according to claim 13 , wherein:the outsole includes a ...

Подробнее
Номер записи: 86
28-08-2014 дата публикации

ELECTRONIC DEVICE

Номер: US20140240251A1
Автор: HIRAI Atsushi, Ikeda Kiyoshi, TAKANO Tomoki, TAKIZAWA Yuuichi, YAMAGUCHI Takeshi
Принадлежит: Panasonic Corporation

Provided is an electronic device. The electronic device includes a planar display unit, and a touch panel which is disposed so as to overlap the display unit and is capable of detecting a vertical distance between two-dimensional coordinates along a surface of the display unit and a finger. Resolution of the two-dimensional coordinates becomes finer as the vertical distance decreases. Thus, even when the operating finger is immobilized in a state where the electronic device is fixed, a display of a pointer is not wobbled or a display of a screen is not wobbled. In addition, when a line is drawn using a drawing mode, the line is not displayed jaggedly. 1. An electronic device comprising:a planar display unit; anda touch panel which is disposed so as to overlap the display unit and is capable of detecting a vertical distance between two-dimensional coordinates along a surface of the display unit and an indicator,wherein resolution of the two-dimensional coordinates becomes finer as the vertical distance decreases.2. The electronic device according to claim 1 , wherein the resolution becomes finest when the vertical distance is minimized.3. The electronic device according to claim 1 , wherein the resolution is switched in at least two stages.4. The electronic device according to claim 1 ,further comprising a control unit capable of dividing the two-dimensional coordinates into a plurality of regions and outputting one two-dimensional coordinates with respect to each divided region, andwherein the number of the divided regions is increased as the vertical distance decreases.5. The electronic device according to claim 4 ,wherein the two-dimensional coordinates are an X coordinate and a Y coordinate, andwherein the region is divided with respect to the X coordinate and the Y coordinate.6. The electronic device according to claim 4 , wherein the two-dimensional coordinate to be output is a central coordinate of the one divided region.7. The electronic device according to ...

Подробнее
Номер записи: 87
28-08-2014 дата публикации

SEMICONDUCTOR MEMORY DEVICE

Номер: US20140241037A1
Автор: Fukumizu Hiroyuki, KOBAYASHI Shigeki, Nojiri Yasuhiro, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A memory cell array includes first wiring lines, and second wiring lines, the first and second wiring lines intersecting, and memory cells disposed in the intersections of the first and second wiring lines, the memory cells including a variable resistance element. A control circuit controls voltages of selected first and second wiring lines. The first wiring lines are arranged at a first pitch in a first direction perpendicular to a substrate and extend in a second direction parallel to the substrate. The second wiring lines are arranged at a second pitch in the second direction and extend in the first direction. The control circuit is configured to change voltages applied to a selected first wiring line according to the positions of the selected first wiring lines in the first direction. 1. A semiconductor memory device comprising:a memory cell array comprising first wiring lines, and second wiring lines, the first and second wiring lines intersecting, and memory cells disposed in the intersections of the first and second wiring lines, memory cells having a variable resistance element; anda control circuit configured to control voltages of selected first and second wiring lines,the first wiring lines being arranged at a first pitch in a first direction perpendicular to a substrate, the first wiring lines extending in a second direction parallel to the substrate,the second wiring lines being arranged at a second pitch in the second direction, the second wiring lines extending in the first direction, andthe control circuit configured to change voltages applied to a selected first wiring line of the first wiring lines according to the positions of the selected first wiring lines in the first direction.2. The semiconductor memory device according to claim 1 , whereinthe control circuit configures to decide, when data is stored in a memory cell, the select first wiring line according to a code length of the data.3. The semiconductor memory device according to claim 2 , ...

Подробнее
Номер записи: 88
09-06-2016 дата публикации

SECONDARY-BATTERY MONITORING DEVICE AND BATTERY PACK

Номер: US20160164311A1
Автор: KAWAGUCHI Norihito, Nagata Shogo, So Yasuaki, YAMAGUCHI Takeshi
Принадлежит:

A secondary-battery monitoring device capable of realizing highly reliable overcurrent detection and a battery pack having it are provided. When an overcurrent flowing to a secondary battery is to be detected by utilizing a current detection voltage generated via on-resistance of a discharge-control switch and a charge-control switch, a voltage correction circuit that generates a correction voltage having a characteristic varied by positive slope or negative slope along with increase in a power supply voltage is provided, and the correction voltage is added to the detection voltage or a reference power supply voltage with the polarity that cancels out the slope of voltage variation caused in the detection voltage, and then the voltage is input to a comparator circuit. In this manner, variation in the overcurrent determination current is reduced. 122-. (canceled)23. A secondary-battery monitoring device comprising:first and second battery connection terminals to which a secondary battery is to be connected;first and second external terminals to which a load or a charger is to be connected;a first current path arranged between the first battery connection terminal and the first external terminal;a second current path arranged between the second battery connection terminal and the second external terminal;a switch circuit including a pair of FETs that control a flow of a charge current and a flow of a discharge current, respectively, the switch circuit being inserted in the second current path so as to control the charge current and the discharge current flowing in the secondary battery; anda switch control unit,wherein the switch control unit is provided with:a second power-supply terminal connected to the second current path connecting the second battery connection terminal with a terminal of the switch circuit;a first power-supply terminal to which a first power supply voltage from the secondary battery is supplied via the first current path with using the second ...

Подробнее
Номер записи: 89
18-06-2015 дата публикации

Resistive Random Access Memory Cell Having Three or More Resistive States

Номер: US20150171323A1
Автор: Clarke Ryan C., Hashim Imran, Lu Nan, Minvielle Tim, YAMAGUCHI Takeshi
Принадлежит:

Provided are resistive random access memory (ReRAM) cells, each having three or more resistive states and being capable of storing multiple bits of data, as well as methods of fabricating and operating such ReRAM cells. Such ReRAM cells or, more specifically, their resistive switching layer have wide range of resistive states and are capable of being very conductive (e.g., about 1 kOhm) in one state and very resistive (e.g., about 1 MOhm) in another state. In some embodiments, a resistance ratio between resistive states may be between 10 and 1,000 even up to 10,000. The resistive switching layers also allow establishing stable and distinct intermediate resistive states that may be assigned different data values. These layers may be configured to switching between their resistive states using fewer programming pulses than conventional systems by using specific materials, switching pluses, and resistive state threshold. 1. A semiconductor device comprising:a first layer operable as a first electrode;a second layer operable as a second electrode; and wherein the third layer is operable to switch between a first resistive state corresponding to a first resistance and a second resistive state corresponding to a second resistance different from the first resistance,', 'wherein the third layer comprises a first sub-layer, a second sub-layer, and a third sub-layer,', 'wherein the second sub-layer is disposed between the first sub-layer and the second sub-layer,', 'wherein the first sub-layer, the second sub-layer, and the third sub-layer comprise one or more metal oxides,', 'wherein a composition of the first sub-layer is different from a composition of the second sub-layer and from a composition of the third sub-layer,', 'wherein the composition of the second sub-layer is different from the composition of the third sub-layer,', 'wherein a thickness of the first sub-layer is different from a thickness of the second sub-layer and from a thickness of a third sub-layer,', ' ...

Подробнее
Номер записи: 90
16-06-2016 дата публикации

Electronic device and coordinate detecting method

Номер: US20160170536A1
Автор: Takeshi Yamaguchi, Tomoki Takano, Yuuichi Takizawa
Принадлежит: Panasonic Intellectual Property Corp of America

An electronic device includes a housing, a display, an electrostatic-capacitance touch panel, a transparent member that protects the touch panel, and a depression detector. The touch panel is configured to detect a pair of two-dimensional coordinates indicated by an indicator having predetermined conductivity, wherein when the touch panel detects a plurality of pairs of two-dimensional coordinates and when the depression detector detects a predetermined amount of deformation, at least one pair of two-dimensional coordinates detected during a predetermined time period prior to a time when the deformation is detected is validated; and a pair of two-dimensional coordinates detected before the predetermined time period prior to the time when the deformation is detected, is not validated, wherein the predetermined time period does not include a deformation of an amount equal to or greater than the predetermined amount of deformation.

Подробнее
Номер записи: 91
30-05-2019 дата публикации

NEEDLE TIP PROTECTOR FOR INDWELLING NEEDLE AND INDWELLING NEEDLE ASSEMBLY

Номер: US20190160265A1
Автор: Ishikura Kohzo, KUDO Tatsuya, ONO Yoshiei, YAMAGUCHI Takeshi
Принадлежит:

The present invention provides a needle tip protector of a novel structure for an indwelling needle, which enables improvements in safety, etc. as compared with conventional needle tip protectors. A needle tip protector for an indwelling needle includes a tubular peripheral wall , and is externally attached over a needle hub of an indwelling needle and moved toward a needle tip side so as to cover the needle tip . Detents , which are to be detained with the needle hub at a position in a movement of the protector toward the needle tip side of the indwelling needle so as to inhibit backward movement of the protector to the proximal end side of the indwelling needle and to prevent the needle tip from being reexposed, are formed within an inside enclosed by the peripheral wall , and are integrally molded with the peripheral wall 1. A needle tip protector for an indwelling needle configured to cover a needle tip of the indwelling needle by being externally mounted about a needle hub of the indwelling needle and by being moved to a needle tip side , the needle tip protector comprising:a tubular peripheral wall; andat least one detent formed in an inside covered with the tubular peripheral wall and configured to be detained with the needle hub at a position in a movement of the protector to the needle tip side of the indwelling needle and to prevent backward movement of the protector to a proximal end side of the indwelling needle such that reexposure of the needle tip is prevented, the detent being integrally molded with the tubular peripheral wall.2. The needle tip protector according to claim 1 , wherein the detent extends within the tubular peripheral wall toward a proximal end side of the peripheral wall.3. The needle tip protector according to claim 1 , wherein the detent is entirely housed in the inside covered with the tubular peripheral wall.4. The needle tip protector according to claim 1 , wherein an expansion part expanding radially outward is provided to a ...

Подробнее
Номер записи: 92
11-09-2014 дата публикации

ELECTRONIC DEVICE

Номер: US20140253518A1
Автор: TAKANO Tomoki, YAMAGUCHI Takeshi
Принадлежит: Panasonic Corporation

There is provided an electronic device that enables sufficient prevention of user's unintended manipulation during hover manipulation which enables performance of manipulation at a position distant from a touch panel. The electronic device a planar display section and a touch panel that is placed while being superimposed on the display section and that enables detection of two dimensional coordinates (x, y) of a finger, which serves as an indicator, on a surface of the display section and a vertical distance (z) from the finger. A valid zone that makes the two dimensional coordinates (x, y) valid is made narrower as the vertical distance (z) between the finger and the touch panel becomes greater. By adoption of such a configuration, it becomes possible to sufficiently prevent performance of user's unintended manipulation during hover manipulation that enables performance of manipulation at a position distant from the touch panel.

Подробнее
Номер записи: 93
01-07-2021 дата публикации

TISSUE PAPER

Номер: US20210198850A1
Автор: HOKKIRIGAWA Kazuo, SHIBATA Kei, TAKAHASHI Sachiko, YAMAGUCHI Takeshi
Принадлежит:

To provide a non-moisturizing high-grade type tissue paper having excellent softness. 1. A two-ply tissue paper to which a polyol is not applied by external addition , whereinthe tissue paper has{'sup': '2', 'a basis weight per ply of 14.0 to 17.0 g/m,'}a paper thickness for two plies of 160 to 220 μm, anda water content of 4.0 to 9.0% by mass,contains 0.15 to 0.45% by mass of an oily component to be extracted with diethyl ether, andhas a bending rigidity of less than 0.006 gf·cm/cm in CD (cross direction) and a bending recovery force of less than 0.005 gf·cm/cm in CD.2. The tissue paper according to claim 1 , havinga dry tensile strength of 200 to 350 cN in MD (machine direction) anda dry tensile strength of 50 to 90 cN in CD. The present invention relates to a tissue paper, and particularly to a non-moisturizing tissue paper to which a polyol such as glycerin is not applied by external addition.The tissue paper is roughly classified into a moisturizing tissue in which a hygroscopic polyol such as glycerin is applied to base paper, and a non-moisturizing tissue to which a polyol is not applied by external addition.Furthermore, the non-moisturizing tissue to which a polyol is not applied by external addition includes a general-purpose type having a basis weight per ply of about 12 g/mand placing importance on price, which is called a general-purpose tissue, and a product group having a high basis weight of 14.0 g/mor more and considered to be a high-price and high-grade product.The latter tissue paper having a high basis weight is considered to be a high-grade product like a moisturizing tissue as compared with a general-purpose type, and has such an advantage that the tissue paper gives a less sticky feeling derived from a polyol, gives a dry feeling, and is unlikely to transfer a chemical agent onto the skin, for example.Conventionally, in order to develop softness and smoothness as a high-grade product while having a high basis weight and a large thickness, in a ...

Подробнее
Номер записи: 94
25-06-2015 дата публикации

Atomic Layer Deposition of Metal Oxides for Memory Applications

Номер: US20150179935A1
Автор: Gopal Vidyut, Hashim Imran, Higuchi Randall J., Hong Zhendong, Minvielle Tim, Pham Hieu, YAMAGUCHI Takeshi
Принадлежит:

Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent. 1. A semiconductor device comprising:a first electrode; wherein the metal oxide film stack comprises a hard metal oxide film and a soft metal oxide film,', 'wherein the hard metal oxide film comprises a stoichiometric oxide of a metal,', 'wherein the soft metal oxide film comprises a non-stoichiometric oxide of the metal,', 'wherein the metal is one of hafnium, zirconium, or titanium, and', 'wherein a stoichiometric ratio of oxygen to the metal in the non-stoichiometric oxide is between about 1.70 and 1.90; and, 'a metal oxide film stack disposed on the first electrode,'}a second electrode disposed on the metal oxide film stack such that the metal oxide film stack is disposed between the first electrode and the second electrode.2. The semiconductor device of claim 1 , wherein the metal is hafnium.3. The semiconductor device of claim 1 , wherein the metal is zirconium.4. The semiconductor device of claim 1 , wherein the metal is titanium.5. The semiconductor device of claim 1 , wherein the metal oxide film stack has a thickness of between about 20 Angstroms and 200 Angstroms.6. ...

Подробнее
Номер записи: 95
18-09-2014 дата публикации

ELECTRONIC DEVICE AND METHOD FOR DETERMINING COORDINATES

Номер: US20140267154A1
Автор: Ikeda Kiyoshi, Satou Mitsuru, YAMAGUCHI Takeshi
Принадлежит: Panasonic Corporation

The electronic device has a display section with a display surface; and a touch panel that is provided while being superimposed on the display section and that can detect an area occupied by an indicator in which the occupied area is on a predetermined plane which is approximately parallel to and spaced apart by a predetermined distance from the display surface of the display section. When flattening of the area occupied by the indicator is smaller than a threshold value in which the occupied area is on the predetermined plane spaced apart from the display surface of the display section by a predetermined distance, coordinates of the center of the area are made valid. When the flattening is greater than the threshold value, the coordinates of the center of the area are made invalid. 1. An electronic device comprising:a display section having a display surface; anda touch panel that is superimposed on the display section and configured to detect a first width of an area occupied by an indicator and a second width orthogonal to the first width in which the occupied area is on a predetermined plane which is approximately parallel to and spaced apart by a predetermined distance from the display surface, whereincoordinates of a point corresponding to the area are taken as valid coordinates when flattening of the area determined from the first width and the second width is smaller than a predetermined value.2. The electronic device according to claim 1 , wherein coordinates of a point corresponding to the area are taken as valid coordinates when the flattening is smaller than a predetermined value claim 1 , andthe coordinates of the point corresponding to the area are not taken as valid coordinates at least when the flattening is greater than the predetermined value.3. The electronic device according to claim 1 , wherein coordinates of a center point of the area are taken as valid coordinates when the flattening is smaller than the predetermined value.4. The electronic ...

Подробнее
Номер записи: 96
30-06-2016 дата публикации

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF CONTROLLING THE SAME

Номер: US20160189776A1
Автор: Ode Hiroyuki, TAKAGI Takeshi, TANAKA Toshiharu, YAMAGUCHI Takeshi, Yamato Masaki
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A nonvolatile semiconductor memory device includes: a memory cell array; and a control circuit that controls a voltage applied to this memory cell array. The memory cell array includes: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell disposed at an intersection of these lines and including a variable resistance element. In a rewrite operation of the memory cell, the control circuit repeatedly perform a pulse application operation and a verify operation, the pulse application operation applying a pulse voltage to the memory cell, and the verify operation applying a first voltage to the memory cell to determine whether the rewrite operation has been completed or not. The control circuit is configured to, in a read operation from the memory cell, apply a second voltage to the memory cell. The second voltage has a voltage value larger than the first voltage. 1. A nonvolatile semiconductor memory device , comprisinga memory cell array; anda control circuit that controls a voltage applied to the memory cell array,the memory cell array comprising:a first wiring line;a second wiring line that intersects the first wiring line; anda memory cell disposed at an intersection of the first and second wiring lines and including a variable resistance element,the control circuit being configured to, in a rewrite operation of the memory cell, repeatedly perform a pulse application operation and a verify read operation, the pulse application operation applying a pulse voltage to the memory cell, and the verify read operation applying a first voltage to the memory cell to determine whether the rewrite operation has been completed or not,the control circuit being configured to, in a read operation from the memory cell, apply a second voltage to the memory cell, andthe second voltage having a voltage value which is larger than that of the first voltage.2. The nonvolatile semiconductor memory device according to claim 1 , whereinthe variable ...

Подробнее
Номер записи: 97
09-07-2015 дата публикации

SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF

Номер: US20150194210A1
Автор: KOBAYASHI Shigeki, YAMAGUCHI Takeshi
Принадлежит: KABUSHIKI KAISHA TOSHIBA

A semiconductor memory device according to an embodiment includes a control circuit configured to apply a first voltage to a selected first line, apply a second voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively. The control circuit includes a detection circuit configured to detect a transition of a resistance state of a selected memory cell using a reference voltage. The control circuit is configured to execute a read operation in which the control circuit applies the third voltage to the selected first line and the non-selected first line, applies the second voltage to the selected second line, and applies the fourth voltage to the non-selected second line, and set the reference voltage based on a voltage value of the selected second line. 1. A semiconductor memory device , comprising:a memory cell array including a plurality of first lines disposed on a substrate, a plurality of second lines disposed intersecting the first lines, and memory cells disposed at each of intersections of the first lines and the second lines and each configured having a variable resistance element; anda control circuit configured to apply a first voltage to a selected first line, apply a second voltage having a voltage value which is smaller than that of the first voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively, such that a first potential difference is applied to a selected memory cell disposed at the intersection of the selected first line and the selected second line,the control circuit including a detection circuit configured to, during the setting operation, detect a transition of a resistance state of the selected memory cell using a reference voltage, andthe control circuit being configured to, before the setting operation, ...

Подробнее
Номер записи: 98
16-07-2015 дата публикации

Transition Metal Oxide Bilayers

Номер: US20150200361A1
Автор: Gopal Vidyut, Hashim Imran, Minvielle Tim, Pham Hieu, Wang Yun, YAMAGUCHI Takeshi, Yang Hong Sheng
Принадлежит:

Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen. 1. A method of forming a semiconductor device , the method comprising: 'wherein the first layer comprises a first metal, a second metal, silicon, and oxygen,', 'forming a first layer on a substrate,'} wherein the second layer comprises the first metal, the second metal, silicon, and oxygen;', 'wherein the first metal is different from the second metal; and', 'wherein one of the first layer or the second layer has a linear resistance and a sub-stoichiometric composition while another one of the first layer or the second layer has a bistable resistance and a near-stoichiometric composition., 'forming a second layer on the first layer;'}2. The method of claim 1 , wherein the one of the first layer or the second layer having the sub-stoichiometric composition is formed in an atmosphere having an oxygen concentration of less than 33 volume %.3. The method of claim 2 , wherein the one of the first layer or the second layer having the sub-stoichiometric composition is formed in an atmosphere having an oxygen concentration of less than 5 volume %.4. The method of claim 2 , wherein the ...

Подробнее
Номер записи: 99
11-06-2020 дата публикации

SECONDARY-BATTERY PROTECTION CIRCUIT AND BATTERY PACK

Номер: US20200185937A1
Автор: MOTOICHI Yoshihiro, TAKESHITA Junji, YAMAGUCHI Takeshi
Принадлежит: MITSUMI ELECTRIC CO., LTD.

A secondary-battery protection circuit is configured to, in response to detecting that a first switching circuit is turned on and a second switching circuit is turned on, supply a first output voltage to a first load between a first terminal and a second terminal; and supply a third output voltage to a second load between the first terminal and a third terminal, the third output voltage indicating the sum of the first output voltage and a second output voltage, the second output voltage corresponding to a voltage across a second secondary battery. In response to detecting that the first switching circuit is turned off and the second switching circuit is turned on, the secondary-battery protection circuit is configured to stop supplying the first output voltage to the first load; and stop supplying the third output voltage via the first terminal and the third terminal. 1. A secondary-battery protection circuit for protecting each of series-connected first secondary battery and second secondary battery , the secondary-battery protection circuit comprising:a first terminal;a second terminal;a third terminal;a first switching circuit configured to be disposed in a current path between a negative electrode of the first secondary battery and the first terminal;a second switching circuit configured to be disposed in a current path between a negative electrode of the second secondary battery and the second terminal or in a current path between a positive electrode of the second secondary battery and the third terminal;a first protection IC configured to turn off the first switching circuit to protect the first secondary battery against overdischarge or discharge overcurrent;a second protection IC configured to turn off the second switching circuit to protect the second secondary battery against overdischarge or discharge overcurrent,wherein the secondary-battery protection circuit is configured to: supply a first output voltage to a first load between the first terminal and ...

Подробнее
Номер записи: 100