СИСТЕМА И СПОСОБЫ КОНСТРУИРОВАНИЯ ПОДВЕШЕННОЙ ПОЛОСКОЙ СТРУКТУРЫ ВОЗБУЖДЕНИЯ АНТЕННЫ

Изобретение относится к системе возбуждения антенн и способу конструирования структуры питания антенной решетки. Структура питания антенной решетки содержит одну или несколько схемных плат, на которых выполнена одна или несколько схем, один или несколько проводящих слоев, на которых смонтирована одна или несколько схемных плат, и один или несколько соединителей, подсоединенных к одной или нескольким схемам через отверстие в одном или нескольких проводящих слоях. Один или несколько проводящих слоев отделены диэлектриком от одной или нескольких схем и контактируют с одной или несколькими схемными платами, в результате чего одна или несколько схем изолированы от одного или нескольких проводящих слоев. Техническим результатом является уменьшение потерь и обеспечение защиты от удара молнии. 3 н. и 17 з.п. ф-лы, 12 ил.

Elektrisches Gerät

ELEKTRISCHE ABZWEIGDOSE SOWIE EIN VERFAHREN ZUR HERSTELLUNG DERSELBEN

Elektrischer Motor und Leiterplatte

Elektrischer Motor (1), zumindest aufweisend einen Stator (2) und einen ringförmigen Rotor (3), die entlang einer axialen Richtung (4) nebeneinander angeordnet sind; wobei der Stator (2) eine Mehrzahl von, entlang einer Umfangsrichtung (5) nebeneinander angeordneten und sich jeweils entlang der axialen Richtung (4) erstreckenden, Statorzähnen (6) aufweist; wobei an jedem Statorzahn (6) zumindest eine Spule (7) mit mindestens einer Windung (8) angeordnet ist; wobei die mindestens eine Windung (8) elektrisch leitend mit einer Leiterplatte (9) verbunden ist, wobei die Leiterplatte (9) an einer Stirnseite (10) des Stators (2) und entlang der axialen Richtung (4) neben dem Stator (2) angeordnet ist, wobei die Leiterplatte (9) eine Mehrzahl von elektrischen Verbindungsleitungen (11) umfasst, über die die mindestens eine Windung (8) jeder Spule (7) zumindest mit anderen Windungen (8) oder mit einem elektrischen Anschluss (12, 13) des Motors (1) verbunden ist.

Speichermodul Routing

Speichermodulplatine mit: einer ersten Oberfläche, die eingerichtet ist, eine erste Mehrzahl von Speichereinrichtungen zu verbinden; einer Mehrzahl von Signalleitungen; und einem Befehls- und Adressbus, der mit den Signalleitungen verbunden ist, wobei der Befehls und Adressbus von den Signalleitungen geführt ist und geeignet ist, wenigstens eine der ersten Vielzahl von Speichereinrichtungen in einer Weise zu verbinden, die nicht erfordert, dass die Befehls- und Adressbusleitungen sich mehr als annähernd neunzig Grad biegen, bevor sie an wenigstens eine der ersten Mehrzahl von Speichereinrichtungen angebunden werden.

Microwave module comprising substrate with HF and LF layers forming distribution network structures, includes intervening insulating layer

The high frequency structure layer (4) is separated from the low frequency structure layer (3) by the insulating layer (1). An Independent claim is included for the method of manufacture, which especially employs fine pitch flip-chip technology for bonding to the substrate.

Laminat mit integriertem elektronischen Bauteil

Die Erfindung betrifft Verfahren zur Herstellung eines Laminats zur Kontaktierung wenigstens eines elektronischen Bauteils, bei dem zwischen einer ersten Metallschicht und einer zweiten Metallschicht eine isolierende Schicht angeordnet wird, die Metallschichten in zumindest einem Kontaktbereich miteinander kontaktiert werden, in der isolierenden Schicht zumindest eine Aussparung erzeugt wird oder erzeugt werden, die Metallschichten mit der isolierenden Schicht laminiert werden, in der ersten Metallschicht im Kontaktbereich zumindest eine Ausnehmung zur Aufnahme wenigstens eines elektronischen Bauteils erzeugt wird, zumindest ein elektronisches Bauteil in wenigstens eine, durch eine Ausnehmung und eine Aussparung gebildete Vertiefung im Laminat eingesetzt und leitend mit der zweiten Metallschicht verbunden wird, so dass das elektronische Bauteil vollumfänglich in der Aussparung und/oder der Ausnehmung aufgenommen wird und, bezogen auf die Höhe (H) des elektronischen Bauteils, zumindest teilweise ...

Leiterplatte und Planer Transformatorgebiet der Erfindung

Beschrieben wird eine Leiterplatte mit: mehreren Isolierschichten mit einer ersten Isolierschicht, einer der ersten Isolierschicht gegenüberliegenden zweiten Isolierschicht und mindestens einer zwischen der ersten Isolierschicht und der zweiten Isolierschicht angeordneten Zwischenisolierschicht; mindestens zwei Leitungsschichten, die jeweils zwischen zwei benachbarten der Isolierschichten angeordnet sind; und ein Seitenflächenisolierteil, das mindestens eine Seitenfläche der mindestens einen Zwischenisolierschicht und zugewandte Seitenflächen der mindestens zwei Leitungsschichten bedeckt. Jede der ersten und zweiten Isolierschichten weist einen Verlängerungsabschnitt auf, der an mindestens einem Teil eines Umfangs davon ausgebildet ist und sich von der mindestens einen Zwischenisolierschicht in einer Ebenenrichtung nach außen erstreckt. Das Seitenflächenisolierteil ist zwischen den Verlängerungsabschnitten der ersten und zweiten Isolierschichten angeordnet.

ELEKTRONIKKARTE UND FLUGZEUG DAMIT

Video signal skew

System and method for electrostatic discharge protection in an electronic circuit

MULTIPLAYER PRINTED-CIRCUIT BOARDS

... 1356632 Printed circuits PLESSEY CO Ltd 6 July 1972 [9 July 1971] 32251/71 Heading H1R A multilayer printed circuit board is provided with two sets of plated through holes, each one of the holes of one set being linked by an exposed track to one of the holes of the other. All the connections to the internal layers of circuitry are made the holes of one set and components are connected by soldering in the holes of the other set. Changes to the circuitry may be made by breaking selected exposed linking tracks and providing alternative wired connections between the component terminals. The board may be a mother board, e.g. a computer back plane, the components being edge connectors for the daughter boards. The alternative connections are preferably made by dry wrapping.

Improvements in or relating to an anti-tamper device

ELECTRICAL PRINTED CIRCUIT CONNECTION PANEL

... 1449210 Printed circuit assemblies COMPAGNIE HONEYWELL BULL 22 March 1974 [26 March 1973] 12959/74 Heading H1R An electrical connection panel 10 comprises connectors 11 into which printed circuit boards are plugged for connection between contact strips on opposite sides of the latter and contact seatings of the connectors 11 having shanks extending through metal lined holes T of panel 10. Connectors 11 are disposed in rows between 2 part fixing bars 14, 15 of the panel 10 flanged to grip the connector ends. Metal lined holes T are aligned in rows referenced R 0 , R 1 , R 2 , &c. and columns C 0 , C 1 , C 2 , &c. and are themselves referenced to columns and rows, e.g. T 1À3 , with the axes of the rows being referenced M 1 , M 2 , M 3 , &c. (Figs. 1, 2). The panel 10 (Figs. 3, 4) comprises two layers 17, 18 of printed conductors respectively referenced 17P, 17Q, 17R &c. and 18F, 18G, 18H, &c. separated by an insulant layer 19 and sandwiched between conductive plates 20, 21 over insulant layers ...

Hybrid electronic circuit

Power converters with integrated capacitors

Dielectric filter.

A ceramic filter mountable on a multi-layer circuit board. The filter contains a two-level mounting surface for matingly engaging with a circuit board. One surface portion of the two-level mounting surface extends through a recessed area formed upon a surface of the circuit board. By mounting the filter such that the mounting surface matingly engages with the recessed area of the circuit board, the heightwise requirement of the filter above the surface of the circuit board is reduced.

Multiple layer printed circuit board inductive arrangement

A multiple layer printed circuit board inductive arrangement comprises first and second insulating layers 21, 22 with respective first and second conductive tracks 23, 24 formed thereon to provide first and second inductive coils which are connected in series. The arrangement may include a ground plane located such that the first insulating layer is between the ground plane and the second insulating layer. The inductive coils may be connected in series by a blind via 25 passing through one of the insulating layers. The inductive coils 23, 24 may be arranged to be mutually coupled. The arrangement may be applied to double-sided printed circuit boards. A combined inductance of the coils of at least 40 nH may be achieved.

Video signal skew compensation

Devices for reducing and determining the skew between colour video signals transmitted over at least two different video cables 118,120, e.g. four twisted pairs, are described. A KVM extender 102 including such devices is also described. The skew reduction device 122 includes a plurality of video signal transmission tracks selectably connectable by switch banks 156-162 to each of the video cables to increase the video signal transmission path length so as to more closely matching the total video signal path length for each of the colour video signals. The skew determination device comprises a processing device 140, a signal generator 130 for applying synchronised pulse signals to each of the video signal cables and signal detection circuitry 180-188 to receive measuring signals transmitted over the video signal cables. Detection signals are output to the processing device which is programmed to determine an indication of the transmission path length difference between the video signal cables ...

An improved circuit board

A printed circuit board which is of such a construction that patterns of electrically conductive strips and/or pads of either standard or non-standard form can be readily provided comprises a rigid board 1 of which at least the major surfaces are of electrically insulating material, which has extending through the board a multiplicity of holes 2 arranged in a pattern of rows and columns and which carries on one or each of its major surfaces a multiplicity of annular metal islands 3 each bounding a hole in the board and discrete with respect to the other annular islands. The rigid board 1 may also carry on said one or each of its major surfaces supplementary metal islands 4 and 5 each positioned between and discrete with respect to annular islands bounding adjacent holes in the rigid board. A circuit of either a standard or non-standard pattern can be formed by electrically interconnecting selected adjacent metal islands 3, 4 and 5 with local deposits of material of high electrical conductivity ...

An embedded magnetic component Device

A transformer device embedded in an insulating substrate with a cavity for housing a magnetic core, which may be a toroidal shape, and comprising an electrical winding around the core. Portions of the winding are on the first and second main surfaces of the substrate and comprise conductive traces, and by the use of conductive connectors are connected through the substrate itself to surround the magnetic core. The outer conductive connectors are made up of first 411 and second 411a sets of conductive connectors that connect through the substrate. The second set of connectors 411a are situated further from the core than the first set of connectors. The conductive traces may be curved.

Method of and apparatus for packaging multi-terminal modules

... 961,756. Circuit assemblies. TEXAS INSTRUMENTS Inc. Aug. 13, 1962 [Aug. 14, 1961], No. 31014/62. Heading H1R. Multi-terminal modules are packaged in bays formed by shaping and interleaving conductive and insulating sheets. Fig. 1 shows a conductive sheet 110 of Au-coated Ni-Fe-Co alloy, having a rectangular rim portion and cross bars 117, 117a . . . 117d, defining bays 111 . . . 116. Uniformly spaced conductive strips 118 . . . 122 extending the length of the sheet are cut out or trimmed to leave tabs in register with the terminals of modules 151 . . . 156, Fig. 2; alternatively, the sheets may be machined or stamped with tabs in desired patterns. End arrays of tabs 130 . . . 139 are provided, of which 130 is shown as being retained. A plurality of such conductive sheets 110, 160 . . . 163, Fig. 4, are interleaved with insulating sheets 1101 . . . 1631, e.g. of plastic film adhesively or otherwise secured to the conductive sheets and preferably shaped to form bays of slightly ...

Method and apparatus for multiple input power distribution to adjacent outputs

A power distribution unit (PDU) includes a multi-layer printed circuit board having first, second and third conducting layers or regions connecting three power inputs to respective power outputs. Thus adjacent sockets can be connected to different phases of a three-phase supply.

MULTILAYER PRINTED CIRCUIT BOARD

Flexible printed circuit board

Substrate for interconnecting electronic integrated circuit components, which is provided with a repair arrangement

An interconnecting substrate according to the invention comprises an insulating base on which rests a set of alternating, superimposed conductive and insulating layers. Contacts are formed on the uppermost insulating layer which border at least one site or zone intended for an integrated circuit chip device whose output conductors are to be connected to the said contacts. Through-connections enable the contacts to be coupled to one of the inner conductive layers. The through-connections include at least one through-connection on the inside of the site relative to at least a predetermined one of the said contacts. A shunt conductor means connected to the predetermined contact has a part outside the site which is connected to an additional contact which serves as a substitute or replaces the said predetermined contact for the connection to the associated output conductor of the chip device. The repair arrangement according to the invention allows one to substitute for a connection inside ...

CROSS CONNECTION BY PERMUTATIONS OF MEANS OF CONFIGURABLE PRINTED CIRCUIT BOARDS

METHOD FOR THE PRODUCTION OF AN ACOUSTICALLY ACTIVE ELEMENT IN THE STRUCTURE OF A MULTI-LAYER BOARD AND THE STRUCTURE OF A MULTI-LAYER BOARD

COMPOUND CERAMIC SUBSTRATE

Method for manufacturing an electronic module

Die vorliegende Erfindung betrifft em elektronisches Modul mit zumindest emer Komponente, die in Isoliermaterial eingebettet ist. Das elektronische Modul umfasst ein erstes Isoliermaterial mit einer ersten Oberfläche und einer zweiten Oberfläche und einer Dicke zwischen der ersten Oberfläche und der zweiten Oberfläche, zumindest eine Öffnung durch das erste Isoliermaterial, ein zweites Isoliermaterial auf der zweiten Oberfläche des ersten Isoliermaterials, zumindest eine Komponente, die in das zweite Isoliermaterial eingebettet ist, zumindest eine leitende Struktur in der zumindest einen Öffnung, wobei die zumindest eine leitende Struktur eine erste Oberfläche und eine zweite Oberfläche hat, wobei die zweite Oberfläche dem zweiten Isoliermaterial zugewandt ist und die erste Oberfläche vom zweiten Isoliermaterial abgewandt ist und eine Distanz zwischen der ersten Oberfläche des ersten Isoliermaterials und der zweiten Oberfläche der zumindest einen leitenden Struktur geringer oder größer ...

Leiterplattenstruktur

The invention relates to a printed circuit board structure (7) having at least one dielectric insulating layer (2, 5o, 5u) and at least one conducting layer (3, 4, 6o, 6u), wherein within the at least one insulating layer (5a), a layer (5) of a dielectric heat-conductive material is provided, which layer (5) is located in close proximity to or in contact with an inner conductor arrangement (3). In the immediate vicinity of or in contact with the layer (5) made of a dielectric heat-conductive material, a further heat-conductive layer (11), preferably an electrically conductive metal layer, can thereby be provided. Also, an at least heat-conductive, preferably electrically conductive, through-plating (9) can be guided from one conductor section (6om) located externally on the printed circuit board to the inside of the printed circuit board at least close to the layer (5) made of a dielectric heat-conductive material.

Verfahren zum Ankontaktieren und Umverdrahten

The invention relates to a method for contacting and rewiring an electronic component (1) embedded into a printed circuit board (2), characterized by the following steps: applying a first permanent resist layer (9) onto a contact side (8) of the printed circuit board (2), structuring the first permanent resist layer (11) in order to produce recesses (10, 12) in the region of contacts (7) of the electronic component (1), applying a second permanent resist layer (11) onto the structured first permanent resist layer (9), structuring the second permanent resist layer (11) in order to expose the recesses (10) in the region of the contacts (7) and in order to produce recesses (12) corresponding to the desired conductor tracks (15), chemically coating the recesses (10, 12) with copper, galvanically filling the recesses (10, 12) with copper, and removing the excess copper in the regions between the recesses (10, 12).

MARKIERUNG ZUM MARKIEREN BZW. CODIEREN EINES GEGENSTANDS SOWIE VERFAHREN ZUR HERSTELLUNG EINER DERARTIGEN MARKIERUNG UND VERWENDUNG

Bei einer Markierung zum Markieren bzw. Codieren eines Gegenstands ist vorgesehen, daß eine Mehrzahl von aus einem leitenden bzw. leitfähigen Material bestehenden Markierungselementen (4, 5, 6) vorgesehen ist, daß die Markierungselemente (4, 5, 6) auf einem aus einem isolierenden Material bestehenden Teilbereich des Gegenstands aufbringbar und/oder in diesen integrierbar sind, daß die Markierungselemente (4, 5, 6) zur Ausbildung eines Codes wenigstens teilweise miteinander durch jeweils wenigstens ein aus einem leitenden bzw. leitfähigen Material bestehendes Verbindungselement (7, 8) verbunden bzw. verbindbar sind und daß die Markierungselemente (4, 5, 6) zur Erfassung des Codes wenigstens teilweise durch einen leitenden Zustand zwischen einzelnen Markierungselementen (4, 5, 6) feststellende Elemente kontaktierbar sind.Darüber hinaus wird ein Verfahren zur Herstellung einer derartigen Markierung als auch eine Verwendung einer derartigen Markierung im Zusammenhang mit einer insbesondere ...

PROCEDURE FOR THE CONSTRUCTION OF MULTILEVEL CIRCUITS, STRUCTURES WITH PERSONALISIERUNGSMERKMALEN AND THEREIN USED COMPONENTS

VERFAHREN ZUR HERSTELLUNG EINER MEHRLAGIGEN LEITERPLATTE, HAFTVERHINDERUNGSMATERIAL SOWIE MEHRLAGIGE LEITERPLATTE UND VERWENDUNG EINES DERARTIGEN VERFAHRENS

In a method for producing a multilayer printed circuit board from a plurality of conducting or conductive and non-conducting or insulating layers or plies to be connected to each other, in particular to be pressed together, wherein after connecting at least partially planar layers at least a partial region (11) thereof is removed, and wherein in order to prevent adherence of the partial region (11) to be removed a material (8) preventing adhesion is applied in accordance with the partial region to be removed onto a layer (9) which adjoins the partial region to be removed, it is provided that the material (8) preventing adhesion is formed by a mixture comprising a release agent on the basis of at least one metal soap, preferably the fatty acid salts of Al, Mg, Ca, Na and Zn, a binding agent, and a solvent, whereby a partial region to be removed can be removed easily and reliably after appropriate treatment and/or processing steps of the multilayer printed circuit board. In addition, an adhesion ...

ACHIEVEMENT DISTRIBUTOR WITH A THREE-LINE DIRECTION COUPLER.

EINGEBETTENE RESERVE ENERGY STORE UNIT

MULTI-POSITION CIRCUIT PRODUCTION AND STUKTUR WITH POSSIBILITY OF ADAPTATION AND COMPONENTS FOR IT

MULTILEVEL ELECTRONIC CONSTRUCTION UNITS

Next high frequency improvement by using frequency dependent effective capacitance

AN ACOUSTICALLY ACTIVE ELEMENT FORMED IN A MULTI-LAYER CIRCUIT-BOARD STRUCTURE, A METHOD FOR FORMING ACOUSTICALLY ACTIVE ELEMENT IN A MULTI-LAYER CIRCUIT-BOARD STRUCTURE, AND A MULTI-LAYER CIRCUIT-BOARD STRUCTURE

Flexible illuminating multilayer structure

A flexible and illuminating multilayer structure wherein the flexible and illuminating multilayer structure (10) comprises at least two flexible foils (100, 102) laminated together. Each foil (100, 102) has a flexible electrically conductive pattern layer (104) and LED units (106) distributed over the foil (100, 102), the LED units (106) being electrically contacted with the contact pattern (104). The LED units (106) of a foil (100, 102) are positioned between positions of the LED units (106) of the other foils. At least one foil of the multilayer structure (10), towards which at least one of the LED units (106) is configured to radiate light, is transparent to the light. Brightness of the LED units (106) is at least foil- specifically controllable with operational electric power fed to the foils (100, 102) through the contact pattern (104). The LED units (106) of at least one foil (100, 102) are of a different tone or color or are controlled to output a different tone or color than the ...

Wireless headset antennas

Abstract of the Disclosure An accessory such as a wireless headset may have an antenna for transmitting and receiving wireless signals. First and second earbuds may be coupled to different ends of a housing for the accessory. A rigid flex printed circuit board in the housing may include a rigid printed circuit portion. The rigid printed circuit portion may include first and second rigid printed circuit layers. A first portion of a flexible printed circuit may be interposed between the first and second rigid layers. A second portion of the flexible printed circuit may extend from an end of the rigid layers and may be wrapped around the first rigid layer. Planar inverted-F antenna resonating element, antenna shorting, and antenna feeding traces may be formed on the second portion of the flexible printed circuit. The efficiency of the antenna may be undisturbed by the presence of a user's body adjacent to the accessory.

Multiple level spiral inductors used to form a filter in a printed circuit board

EMBEDDED TOROIDAL INDUCTORS

A method for making an embedded toroidal inductor (118) includes forming in a ceramic substrate (100) a first plurality of conductive vias (102) radially spaced a first distance from a central axis (101) so as to define an inner circumference. A second plurality of conductive vias (104) is formed radially spaced a second distance about the central axis so as to define an outer circumference. A first plurality of conductive traces (110) forming an electrical connection between substantially adjacent ones of the first and second plurality of conductive vias is formed on a first surface (106) of the ceramic substrate. Further, a second plurality of conductive traces (110) forming an electrical connection between circumferentially offset ones of the first and second plurality of conductive vias is formed on a second surface of the ceramic substrate opposed from the first surface to define a three dimensional toroidal coil.

INTEGRATED CIRCUIT WITH BUILT-IN REPAIR DEVICE

EMBEDDED TOROIDAL INDUCTORS

A method for making an embedded toroidal inductor (118) includes forming in a ceramic substrate (100) a first plurality of conductive vias (102) radially spaced a first distance from a central axis (101) so as to define an inner circumference. A second plurality of conductive vias (104) is formed radially spaced a second distance about the central axis so as to define an outer circumference. A first plurality of conductive traces (110) forming an electrical connection between substantially adjacent ones of the first and second plurality of conductive vias is formed on a first surface (106) of the ceramic substrate. Further, a second plurality of conductive traces (110) forming an electrical connection between circumferentially offset ones of the first and second plurality of conductive vias is formed on a second surface of the ceramic substrate opposed from the first surface to define a three dimensional toroidal coil.

CHANGE-OVER SWITCHING USING CONFIGURABLE PRINTED CIRCUIT BOARDS

L'invention concerne un câblage dans un boîtier de connexion , à l'aide d'un panneau de circuit imprimé qui comporte sur l'un de ses bords N bornes d'entrée, sur le bord opposé N bornes de sortie, et, entre ces deux bords, une pluralité d'étages de dispositifs élémentaires de connexion à deux entrées deux sorties, les deux entrées d'un dispositif étant reliées électriquement aux deux sorties dudit dispositif , d'une part, par deux liaisons directes et, d'autre part, par deux liaisons de dérivation croisés, les entrées des dispositifs du premier étage étant directement reliées électriquement aux bornes d'entrée, les sorties des dispositifs du dernier étage étant directement reliées électriquement aux bornes de sortie, et, entre deux étages successifs, les sorties des dispositifs de l'étage de rang inférieur sont reliées électriquement aux entrées des dispositifs de l'étage de rang supérieur. Pour personnaliser un câblage on coupe soit les liaisons directes, soit les liaisons de dérivation ...

COMPOUND, FR-900447, PRODUCTION AND USE THEREOF

A new compound, FR-900447, and pharmaceutically acceptable salts thereof has antimicrobial activity and antitumor activity. A process for the preparation thereof comprises culturing a FR-900447 producing strain belonging to the genus Streptomyces in a nutrient medium.

INTEGRATED CIRCUIT WITH BUILT-IN REPAIR DEVICE

L'invention se rapporte à un substrat d'interconnexion, du type comprenant un support isolant sur lequel repose un ensemble de couches conductrices et isolantes alternées et superposées; des plots formés sur la couche isolante supérieure et bordant au moins un domaine destiné à un composant dont les conducteurs de sortie sont à connecter auxdits plots; et des traversées permettant le couplage des plots, par l'intermédiaire de la couche conductrice supérieure, à l'une des couches conductrices intérieures et comprenant au moins une traversée intérieure au domaine relative à au moins un plot donné desdits plots, ledit substrat étant caractérisé en ce qu'il comporte un dispositif de réparation comprenant un moyen conducteur de dérivation relié audit plot donne et présentant une partie extérieure au domaine connectée à un plot additionnel se substituant audit plot donné pour la connexion audit composant.

COMPOSITION AND METHOD FOR TREATING A SUBTERRANEAN FORMATION

... : COMPOSITION AND METHOD FOR TREATING A SUBTERRANEAN FORMATION An aqueous composition has been developed to treat subterranean formations whereby the compositions can maintain for a period of time a sufficient viscosity to function as a hydraulic fluid and optionally to support particulate matter. Subsequently, the viscosity of the composition decreases to facilitate the removal of the composition. The composition comprises a hydratable polymeric material, a peroxygen compound, and a free radical scavenger.

MULTILAYER PRINTED WIRING BOARD

A MULTILAYER PRINTED WIRING BOARD This application discloses a multilayer printed wiring board having a plurality of pattern layers. Said printed wiring board has at least one pair of plated through holes, i.e. a first and a second plated through hole. The first plated through hole is directly connected to said patterns. The second plated through hole is not directly connected to said patterns. An electronic element terminal is connected to said second plated through hole. The first and second plated through holes are electrically connected to each other on a surface opposite an element mounting surface of the printed wiring board.

POWER BOARD AND PLUG-IN LIGHTING MODULE

The present invention provides a modular panel lighting apparatus comprising a multi layer power board and one or more lighting modules. The power board is a compound structure of one or more electrically conductive layers which are separated by one or more electrically insulating layers. The power board is configured to receive one or more lighting modules and can provide electrical, mechanical and thermal function adequate to meet a desired functionality of the lighting apparatus. A lighting module comprises one or more light-emitting elements operatively attached to a connector element that has one or more electrical contact portions. By inserting the connector element into the power board, the lighting module can be mounted anywhere on the face of the power board. When appropriately inserted into the power board, the one or more electrical contact portions of the connector element can establish selective electrical contact with the conductive layers of the power board and can secure ...

PRINTED CIRCUIT BOARD FOR REAL-TIME CLOCK IC AND MANUFACTURING METHOD FOR PRINTED CIRCUIT BOARD FOR REAL-TIME CLOCK IC

According to one embodiment, a printed circuit board for a real-time clock IC includes a plurality of wiring layers sequentially laminated to form one substrata and including at least one layer which forms an oscillator circuit pattern having a crystal oscillator generating a reference signal and an oscillation stabilizing portion which stabilizes and oscillates the reference signal and adjusts the oscillation frequency to a target frequency, and a power supply layer arranged in at least one of a position between the plurality of wiring layers and front and rear surfaces of the substrate, and forming a power supply circuit pattern which supplies electric power to a circuit on the substrate and removing a portion of the power supply circuit pattern which has width not smaller than width of the oscillator circuit pattern in a portion of the power supply circuit pattern which overlaps with the oscillator circuit pattern.

SUPERCONDUCTING PRINTED CIRCUIT BOARD RELATED SYSTEMS, METHODS, AND APPARATUS

A multilayer circuit board structure includes superconducting connections to internal layers thereof, for example by inclusion of superconducting vias. Two or more panels can each comprise respective electrically insulative substrates, each have one or more through-holes, and also include a respective bimetal foil on at least a portion of a respective surface thereof, which is patterned to form traces. The bimetal foil includes a first metal that is non-superconductive in a first temperature range and a second metal that is superconductive in the first temperature range. The panels are plated to deposit a third metal on exposed traces of the second metal, the third metal superconductive in the first temperature range. Panels are join (e.g., laminated) to form at least a three-layer superconducting printed circuit board with an inner layer, two outer layers, and superconducting vias between the inner layer and at least one of the two outer layers.

MULTI-LAYERED CERAMIC ELEMENTS AND METHOD FOR PRODUCING SAME

A multi-layered ceramic element which comprises a plurality of films or thin plates of ceramic and a plurality of inner electrodes which are alternatively arranged in layers, wherein the ends of the inner electrodes are exposed at side end faces of the multi-layered assembly and only the exposed portions of the inner electrodes and the ceramic surface in the vicinity of the exposed portions of the electrodes are covered with an insulating layer which comprises a polyimide resin having repeating units represented by the following general formula (I): ( I ) wherein X represents a tetravalent group selected from the group consisting of tetravalent phenyl groups; tetravalent biphenyl groups; and tetravalent polyphenyl and polybiphenyl groups in which at least one of either the phenyl groups or biphenyl groups are bonded through at least one member selected from the group consisting of O, CO, S, SO2, CH2, C(CH3)2 and C(CF3)2 and Y represents a bivalent group selected from the group consisting ...

Mehrschichtige gedruckte Schaltung und Verfahren zu ihrer Herstellung

SUBSTRATE COMPONENT INTERCONNECT INTEGRATED CIRCUIT ELECTRONIC.

Method for designing electrically conductive layers for producing printed circuits, as well as a multi-layer base material for carrying out the method

Method for designing electrically conductive layers for producing printed circuits, as well as a multilayer base material for carrying out the method

Method for designing electrically conductive layers for producing printed circuits, and a multilayer base material for carrying out the method

PACKAGING SUBSTRATE AND PACKAGE STRUCTURE

A manufacturing method of a Z-direction interconnected PCB and the PCB

Via stub termination structures and methods for making same

Solder paste and brazed joint

Substrate With Built-in Electronic Component

The invention provides a substrate with a built-in electronic component. Even through under the condition that more than two electronic components are accommodated in one cavity, the substrate with the built-in electronic component can enable the various electronic components configured in the cavity to have a high configuration freedom degree, furthermore, mutual interfaces of the various electronic components accommodated in the cavity can also be inhibited. The substrate with the built-in electronic component includes: a core layer that includes a core material and a cavity formed in the core material and containing an insulating material; an insulating layer that includes a ground wiring and a signal wiring and is formed on the core layer; and a plurality of electronic components that each include a first terminal and a second terminal and are stored in the cavity, the plurality of electronic components each having one end portion and the other end portion and each accommodated in the ...

电子元件和多层信号路由装置之间的电信号电气互连技术

... 本发明披露了一种用于在电子元件和多层信号路由装置之间电气互连电信号的技术。在一个特定的实施例中，这种技术是作为一种用于电气互连在电子元件和具有多个导电信号通路层的多层信号路由装置之间的电信号的互连阵列实现的。在这种情况下，所述互连阵列包括多个导电接点，它们被分组成为导电接点的多个布置，其中所述导电接点的多个布置的每个布置和所述导电接点的多个布置的其它相邻的布置通过在所述多层信号路由装置中相应地形成的沟槽分开，使得可以在其中在所述多个导电信号通路层上进行增加的数量的电信号的路由。 ...

Package substrate and package structure

Manufactoring process of printed circuits with multiple layers

ENSEMBLE A INTEGRATION A GRANDE ECHELLE COMPORTANT UN SUBSTRAT EN CERAMIQUE MULTICOUCHE

L'ENSEMBLE COMPREND : UN SUBSTRAT EN CERAMIQUE 9 AVEC UNE PLURALITE DE BORNES D'ENTREESORTIE1 SUR SA SURFACE INFERIEURE ET AU MOINS UNE COUCHE D'ALIMENTATION5 AYANT UNE PLURALITE DE LIGNES CONDUCTRICES, ET UNE PLURALITE DE TROUS TRAVERSANTS METALLISES4 ENTRE SES SURFACES INFERIEURE ET SUPERIEURE POUR CONNECTER CHACUNE DES BORNES, UNE PLURALITE DE COUCHES DE CABLAGE DE SIGNAL 6 SUR LE DESSUS DU SUBSTRAT AYANT UNE PLURALITE DE PASTILLES3 SUR LE DESSUS DE LA COUCHE SUPERIEURE DES COUCHES DE CABLAGE DE SIGNAL POUR LE MONTAGE ET LA CONNEXION D'ELEMENTS DE CIRCUIT; UNE PLURALITE DE PASTILLES DE RECHANGE7 SUR LA SURFACE DE LA COUCHE SUPERIEURE DE CABLAGE DE SIGNAL POUR LA CONNEXION DE FILS DE REPARATION; UNE PLURALITE DE BORNES DE RECHANGE8 SUR LE DESSOUS DU SUBSTRAT; ET UN MOYEN DE CABLAGE DE RECHANGE A TRAVERS LE SUBSTRAT ET LES COUCHES DE CABLAGE DE SIGNAL POUR CONNECTER LES PASTILLES ET LES BORNES DE RECHANGE.

Printed circuit doubles face and together electric conduction including/understanding such a printed circuit.

OUTLINE ELECTRICAL CIRCUIT MULTI-LAYER AND MANUFACTORING PROCESS OF MULTI-LAYER CIRCUITS BY COMPRISING APPLICATION

DEVICE OF DATA PROCESSING

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE COMPRISING A CHIP AND CORRESPONDING DEVICE.

PROVISION OF FILTERS INTEGREE IN A CHART OF CIRCUITS PRINT

SUBSTRAT D'INTERCONNEXION DE COMPOSANTS ELECTRONIQUES A CIRCUITS INTEGRES, MUNI D'UN DISPOSITIF DE REPARATION

L'invention concerne un substrat d'interconnexion 10 pourvu d'un ensemble de couches conductrices 19a-C et isolantes 20a, b alternées et superposées; des plots formés sur la couche isolante supérieure 20a et bordant au moins un domaine 13 destiné à un composant 11 dont les conducteurs de sortie 12 sont à connecter aux plots 14; et des traversées 21 comprenant au moins une traversée intérieure au domaine 13. L'invention présente un dispositif de réparation comprenant un moyen conducteur de dérivation 28a, b, 26a, b relié au plot 14 connecté à la traversée intérieure 21 et présentant au moins une plage de connexion auxiliaire 30 extérieure au domaine 13. L'invention permet de réparer le substrat sans avoir à enlever le composant il et s'applique à tout substrat porteur de pastilles de circuits intégrés.

ARRANGEMENT FOR CONNECTING ELECTRICAL CIRCUITS

PLATE HAS CIRCUITS PRINT MULTI-LAYER

ELECTRONIC DEVICE COMPRISING A CIRCUIT BOARD WITH IMPROVED COOLING.

Electrical connection box comprising two or more double-sided printed circuit boards - includes tongues from upper board folded in order to penetrate insulating support to contact lower circuit board layer

Hyperfrequency signal emitting and receiving module for airborne radar's active antenna, has hyperfrequency signal emission and receiving paths, switching unit and control unit with components arranged on faces of multilayered circuit

L'invention concerne un module d'émission et de réception de signaux hyperfréquences en bande X. Le module comprend une voie d'émission (2), une voie de réception (4), des moyens d'aiguillage (6) entre les voies d'émission (2) et de réception (4) et des moyens de contrôle (8). Selon l'invention, le substrat du module d'émission et de réception est réalisé par un circuit multicouche (14), les composants des voies d'émission (2) et de réception (4), des moyens d'aiguillage (6) et des moyens de contrôle (8) étant implantés sur des faces (14a, 14b) du circuit multicouche (14). Le module d'émission et de réception selon l'invention présente notamment pour avantage de pouvoir être réalisé à partir de matériaux organiques, de permettre un routage simple entre les composants et de présenter une très grande compacité. L'invention concerne également une antenne active comprenant un assemblage de tels modules d'émission et de réception.

SUITABLE FOR CONNECTION PORTABLE ELECTRONICS HAS CHIPS.

MULTILAYER CIRCUIT BOARD

Wiring arrangement for electrical connection individually different connection areas

TOUCH-WIRE OVERLAY MASKS FOR CATHODE RAY TUBES

Electrical interconnection box for printed circuits - uses pins pushed through pack of copper and insulating layers preformed with matrix of slots to join different layers

WIRING OF A LIGHT SOURCE OF HIGH RESOLUTION

L'invention se rapporte notamment à un module lumineux de véhicule terrestre qui comprend une source électroluminescente comprenant au moins un élément électroluminescent, un dispositif électronique apte à commander l'élément électroluminescent, et un interposeur reliant électriquement la source électroluminescente et le dispositif électronique.

CHART OF CIRCUIT PRINTS HAS MULTIPLE LAYERS

USING MIXING BY PERMUTATIONS OF THE CIRCUITS PRINT CONFIGURABLE

L'invention concerne un câblage dans un boîtier de connexion , à l'aide d'un panneau de circuit imprimé qui comporte sur l'un de ses bords N bornes d'entrée, sur le bord opposé N bornes de sortie, et, entre ces deux bords, une pluralité d'étages de dispositifs élémentaires de connexion à deux entrées deux sorties, les deux entrées d'un dispositif étant reliées électriquement aux deux sorties dudit dispositif , d'une part, par deux liaisons directes et, d'autre part, par deux liaisons de dérivation croisés, les entrées des dispositifs du premier étage étant directement reliées électriquement aux bornes d'entrée, les sorties des dispositifs du dernier étage étant directement reliées électriquement aux bornes de sortie, et, entre deux étages successifs, les sorties des dispositifs de l'étage de rang inférieur sont reliées électriquement aux entrées des dispositifs de l'étage de rang supérieur. Pour personnaliser un câblage on coupe soit les liaisons directes, soit les liaisons de dérivation ...

부품 실장 기판

... 층간 접속 도체(20)는 적층체(10)의 제 1 층(1~6)까지를 관통하고, 상면(10S)으로부터 돌출되어 있다. 부품 실장 기판(200)에서는 적층방향에 있어서, 상면(10S)으로부터의 층간 접속 도체(20)의 돌출 길이는 적층방향에 있어서의 층간 접속 도체(20) 및 도전 접합부(112)의 접속 위치와, 접속 전극(30) 및 도전 접합부(122)의 접속 위치의 차가 차분(d1)이 되도록 조정되어 있다. 적층방향에 있어서의 도전 접합부(112)의 길이와 도전 접합부(122)의 길이의 차분(d2)은 이 차분(d1)에 의해 상쇄된다. 그 결과, 상면(10S)과 하면(101S)이 평행하게 됨으로써 실장 기판(90)에 대한 고주파 부품(100)의 경사를 방지하고, 상기 경사에 기인하는 전기 접속의 불량 및 접합 강도의 저하를 방지할 수 있다.

METHOD OF MANUFACTURING RIGID-FLEXIBLE PRINTED CIRCUIT BOARD

보호층 구비 동장 적층판 및 다층 프린트 배선판

... 도전 차단 부위 형성용 관통 구멍 주위에 있어서, 스루홀 가공성과 평탄성이 뛰어난 스루홀 분할 다층 프린트 배선판 제공을 목적으로 한다. 이 목적을 달성하기 위하여, 「스루홀을 전기적으로 차단하는 도전 차단 부위를 갖는 프린트 배선판에 사용하는 동장 적층판이며, 당해 동장 적층판은, 도전 차단 부위 형성용 관통 구멍을 형성하고, 당해 도전 차단 부위 형성용 관통 구멍에 도금 레지스트가 충전된 후에 박리 가능한 보호층을 표면에 구비하고 있는 것을 특징으로 하는 보호층 구비 동장 적층판」 등을 채용한다.

터치 패널의 제조 방법

... 실시예에 따른 터치 패널의 제조 방법은, 기판을 준비하는 단계; 상기 기판에 투명 전극을 형성하는 단계; 상기 기판에 배선 전극 물질을 인쇄하는 단계; 상기 배선 전극 물질을 건조하여 배선 전극을 형성하는 단계; 및 상기 배선 전극에 회로 기판을 형성하는 단계를 포함한다.

COLLECTOR SHEET FOR SOLAR CELL AND SOLAR CELL MODULE EMPLOYING SAME

POWER MODULE, METHOD FOR PRODUCING SAME AND AIR CONDITIONER

Disclosed is a power module which can be produced at low cost. Specifically disclosed is a power module (5, 5A, 5B, 5C, 5D, 5E, 5F) comprising a power semiconductor (53a), a non-power semiconductor (53b), a resin substrate (51, 51A, 51B, 51C, 51D, 51E, 51F) and a cooling means (59, 59A). The power semiconductor and the non-power semiconductor constitute a power supply circuit for performing power conversion. Both the power semiconductor and the non-power semiconductor are mounted on the resin substrate, and the cooling means is arranged for cooling the power semiconductor. © KIPO & WIPO 2007 ...

PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD OF PRINTED CIRCUIT BOARD

The present invention relates to a printed circuit board and a manufacturing method of the printed circuit board. According to an embodiment of the present invention, the printed circuit board comprises: a first substrate comprising a first insulation layer and a first circuit layer formed on an upper portion of the first insulation layer and including a bonding pad; a second substrate formed on an upper portion of the first substrate and having a cavity exposing the bonding pad to the outside; and a dam formed between the bonding pad and an inner wall of the cavity. Therefore, the printed circuit board can prevent an afterimage of a dry film. COPYRIGHT KIPO 2016 ...

FLEXIBLE PRINTED CIRCUIT BOARD

A flexible printed circuit board of the present invention comprises: a first board unit; and a second board unit extended from the first board unit, and formed with the thickness thinner than that of the first board unit to be bent. The flexible printed circuit board is unnecessary to additionally change a shape for impedance matching since a loss of a signal line and a signal inputted from the outside are minimized, and the impedance does not change regardless of a position arranged inside a wireless terminal device. COPYRIGHT KIPO 2016 ...

Signal transmission line and circuit board

A signal line and a circuit board that can be easily bent in a U shape and prevent unwanted emission include a line portion includes a plurality of laminated line portion sheets made of a flexible material. Signal lines extend within the line portion in an x-axis direction. Ground lines are provided within the line portion on a positive direction side in a z-axis direction with respect to the signal lines and have line widths equal to or smaller than the line widths of the signal lines. Ground lines are provided within the line portion on a negative direction side in the z-axis direction with respect to the signal lines. The signal lines overlap the ground lines when seen in a planar view from the z-axis direction.

Z-directed pass-through components for printed circuit boards

A Z-directed signal pass-through component for insertion into a printed circuit board while allowing electrical connection from external surface conductors to internal conductive planes or between internal conductive planes. The Z-directed pass-through component is mounted within the thickness of the PCB allowing other components to be mounted over it. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body.

Printed circuit board with compound via

A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.

Printed circuit board

A power source terminal and a ground terminal for a semiconductor integrated circuit are connected to a conductor pattern through a capacitor. The conductor pattern is connected, through a filter, to a plane conductor connected to neither a ground plane nor a power source plane. Thus, a common mode noise arising from between the power source and the ground is caused to flow into the plane conductor. This reduces the common mode noise flowing in the ground and the power source of the printed wiring board, which relatively act as antennas.

Electrosurgical Systems and Printed Circuit Boards for Use Therewith

An electrosurgical system for treating tissue is disclosed. The system includes an electrosurgical generator, a printed circuit board, a generator ground and a patient ground. The printed circuit board is disposed in mechanical cooperation with the electrosurgical generator and includes a plurality of conductive layers. The generator ground includes a first portion and a second portion. The first portion is electro-mechanically connected to a conductive layer of the printed circuit board and the second portion is electro-mechanically connected to another conductive layer of the printed circuit board. The patient ground includes a portion that is at least partially interposed between the first portion of the generator ground and the second portion of the generator ground.

Plug connector and multi-layer circuit board

The invention relates to a multi-pole plug connector ( 90 ) for contacting a multi-layer circuit board ( 51 ), comprising a plurality of contact elements ( 50 a, 50 b - 50′ a, 50′ b ), as well as to a multi-layer circuit board for assembly with a multi-pole plug connector ( 90 ), comprising blind boreholes ( 60 a, 60 b - 60′ a, 60′ b ) for contacting terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) of the contact elements ( 50 a, 50 b - 50′ a, 50′ b ) of the multi-pole plug connector ( 90 ). The invention further relates to a combination of a multi-pole plug connector ( 90 ) for contacting with a multi-layer circuit board ( 51 ) and to a multilayer circuit board for assembly with the multi-pole plug connector ( 90 ). The plug connector ( 90 ) according to the invention is characterized by terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) that have different lengths for contacting the terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) with conductors ( 52 a, 52 b; 72 a, 72 b - 72′ a, 72′ b ) of the multi-layer circuit board ( 51 ) provided in different conductor levels ( 71 - 71 ′). The multi-layer circuit board ( 51 ) according to the invention is characterized by blind boreholes ( 60 a, 60 b - 60′ a, 60′ b ) that terminate in different conductor levels ( 71 - 71 ′) of the multilayer circuit board ( 51 ) for deliberately contacting the terminal pins ( 53 a, 53 b - 53′ a, 53′ b ) with conductors ( 52 a, 52 b; 72 a, 72 b - 72′ a, 72′ b ) of the multilayer circuit board ( 51 ) provided in different conductor levels ( 71 - 71 ′).

Reprogrammable circuit board with alignment-insensitive support for multiple component contact types

The present invention is directed to a system that programmably interconnects integrated circuit chips and other components at near-intra-chip density. The system's contact structure allows it to adapt to components with a wide variety of contact spacings and interconnection requirements, the use of releasable attachment means allows component placement to be modified as needed, the system identifies the contacts and the components to facilitate specifying the inter-component connections, and the system provides signal conditioning and retiming to minimize issues with signal integrity and signal skew.

Conductive sheet, usage method of conductive sheet and capacitive type touch panel

Disclosed are a conductive sheet, a usage method of the conductive sheet and a capacitive type touch panel. For a first conductive sheet ( 10 A), two or more conductive first large grids ( 14 A) are formed atop a first transparent base ( 12 A), wherein each first large grid ( 14 A) is constituted by combining two or more small grids ( 18 ), and the shapes of facing sides of each first large grid ( 14 A) are formed to alternate. For example, rectangular waveshapes of a first side portion ( 28 a ) of the first large grid ( 14 A) and of a fourth side portion ( 28 d ) facing the first side portion ( 28 a ) are made to alternate, and rectangular waveshapes of a second side portion ( 28 b ) of the first large grid ( 14 A) and of a third side portion ( 28 c ) facing the second side portion ( 28 b ) are made to alternate.

Method and apparatus for multiple input power distribution to adjacent outputs

Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs.

Apparatus for restricting moisture ingress

Apparatus and methods to protect circuitry from moisture ingress, e.g., using a metallic structure as part of a moisture ingress barrier.

Injection molded control panel with in-molded decorated plastic film that includes an internal connector

Provided are systems and methods for a control assembly including: a first film that is in-molded that includes decorative graphics, a front surface and a rear surface; and a second film molded to the rear surface of the first film having a printed circuit that includes sensors, control circuits and interconnects and a front and rear surface; and an internal connector.

Microelectronic structure including air gap

A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure.

Microelectronic structure including air gap

A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure.

Structure and circuit board

A structure ( 10 ) includes a conductor ( 151 ), conductors ( 111, 131 ) that are located on the same side with respect to the conductor ( 151 ), that are opposed to at least a part of the conductor ( 151 ), and that overlap each other when seen in a plan view, a connection member ( 101 ) that penetrates the conductors ( 111, 131, 151 ), that is connected to the conductor ( 151 ), and that is insulated from the conductors ( 111, 131 ), openings ( 112, 132 ) that are formed in the conductors ( 111, 131 ), respectively, and which the connection member ( 101 ) passes through, and conductor elements ( 121, 141 ) that are formed to be opposed to the openings ( 112, 132 ), that are connected to the connection member ( 101 ) passing through the openings ( 112, 132 ), and that are larger than the openings ( 112, 132 ). The number of layers in which the conductor elements ( 121, 141 ) are located is two or more and less than or equal to the number of layers in which the conductors ( 111, 131 ) are located.

PREPARING A SUBSTRATE FOR EMBEDDING WIRE

A portion of the surface of a substrate may be prepared for mounting an antenna wire such as by removing material to form a sequence of ditches (holes) separated by bridges (lands), and conforming to the pattern for the antenna, which is typically a flat squared spiral, having a number of turns. The antenna wire may be laid in the ditches and embedded in the bridges. Additional features, such as undermining or removing material from adjacent the bridges may facilitate displacement of substrate material at the bridges. The collapsed bridges form pinch points, securing the wire in the substrate. In some embodiments of the invention, relevant portions of the substrate are prepared for embedding antenna wire, without removing material. The substrate may be an inlay substrate or card body for a secure document. 1. A method of mounting a wire to a substrate for an electronic device comprising:preparing a selected area of the substrate with a sequence of ditches, separated by bridges, thereby removing material at some locations where an antenna wire will be scribed into the substrate; andscribing the antenna wire into ditches and embedding the antenna wire into the bridges.2. The method of claim 1 , wherein:the ditches coincide with a pattern for an antenna formed by the wire.3. The method of claim 2 , wherein:the pattern is a spiral pattern having a number of turns.4. The method of claim 1 , wherein:the ditches are elongated, being longer than they are wide.5. The method of claim 1 , wherein:the ditches are arranged generally end-to-end, but spaced apart from one another by the bridges.6. The method of claim 1 , wherein:{'b': '1', 'the ditches have a length (“L”);'}{'b': '2', 'the bridges have a length (“L”); and'}the ditches are longer than the bridges.7. The method of claim 6 , wherein:the ditches are at least twice as long as the bridges.8. The method of claim 6 , wherein:the ditches are approximately ten times long as the bridges.9. The method of claim 1 , wherein:the ...

Multilayer Circuit Board and Manufacturing Method Thereof

A multilayer circuit board is provided, which includes multiple core boards stacked together. The core board includes an insulation layer and at least one conductor layer attached together. The conductor layer includes a circuit. The core board has at least one identification conductor disposed at an edge of at least one conductor layer. The identification conductor forms an identification pattern on a side surface of the core board along a stacking direction of the core boards. The identification patterns of the multiple core boards are different from each other on the side surface of the multilayer circuit board along the stacking direction of the core boards. A manufacturing method of the multilayer circuit board is further provided. 1. A multilayer circuit board comprising:multiple core boards stacked together,wherein each of the core boards comprises an insulation layer and at least one conductor layer attached together,wherein each conductor layer comprises a circuit,wherein each core board has at least one identification conductor disposed at an edge of the at least one conductor layer,wherein each identification conductor forms an identification pattern on a side surface of the core board along a stacking direction of the core boards, andwherein identification patterns of the multiple core boards are different from each other on side surfaces of the multilayer circuit board along the stacking direction of the core boards.2. The multilayer circuit board according to claim 1 , wherein a length of the identification conductor is greater than or equal to 2 millimeters (mm).3. The multilayer circuit board according to claim 1 , wherein a width of the identification conductor ranges from 5 to 10 thousandths of an inch (mil).4. The multilayer circuit board according to claim 1 , wherein the identification conductor is a non-functional copper sheet.5. The multilayer circuit board according to claim 1 , wherein the identification patterns on different core boards ...

ELECTRONIC COMPONENT INCLUDING MULTILAYER SUBSTRATE

The multilayer substrate includes: a plurality of dielectric layers stacked on one another; a first conductor pattern which is disposed along a principal surface of a dielectric layer and which is electrically connected to a ground; and second conductor patterns and which are disposed along the principal surface of a dielectric layer and which are opposed to the first conductor pattern only through the dielectric layers therebetween, the second conductor patterns and forming inductor elements. Only the dielectric layers that sandwich the first conductor pattern therebetween are bonded to each other via openings through formed in the first conductor pattern As viewed from the stacking direction, the second conductor patterns substantially entirely overlap a portion other than the openings through in the first conductor pattern 1. An electronic component including a multilayer substrate , the multilayer substrate comprising:a plurality of dielectric layers stacked on one another;a first conductor pattern which is disposed along principal surfaces of the dielectric layers and which is electrically connected to a ground; anda second conductor pattern which is disposed along the principal surfaces of the dielectric layers and which is opposed to the first conductor pattern only through the dielectric layer therebetween, the second conductor pattern forming an inductor element, a stripline, or a microstrip line, which is electrically connected to an element other than a ground,wherein an opening is formed in the first conductor pattern, and only the dielectric layers that sandwich the first conductor pattern therebetween in a stacking direction of the dielectric layers are bonded to each other via the opening, andwherein, as viewed from the stacking direction in which the dielectric layers are stacked, the second conductor pattern substantially entirely overlaps portions other than the openings in the first conductor.2. The electronic component including the multilayer ...

Power converters with integrated capacitors

An apparatus having a power converter circuit having a first active layer having a first set of active devices disposed on a face thereof, a first passive layer having first set of passive devices disposed on a face thereof, and interconnection to enable the active devices disposed on the face of the first active layer to be interconnected with the non-active devices disposed on the face of the first passive layer, wherein the face on which the first set of active devices on the first active layer is disposed faces the face on which the first set of passive devices on the first passive layer is disposed.

CARD STRUCTURE, SOCKET STRUCTURE, AND ASSEMBLY STRUCTURE THEREOF

A card structure includes a first substrate, a second substrate, an intermediate unit, and a connector. The first substrate includes a base surface. The second substrate is disposed on the base surface of the first substrate and coupled to the first substrate. The connector is disposed on the base surface of the first substrate to juxtapose the second substrate via the intermediate unit and coupled to the first substrate. 1. A card structure , comprising:a first substrate comprising a base surface;a second substrate disposed on the base surface of the first substrate and coupled to the first substrate;an intermediate unit; anda connector disposed on the base surface of the first substrate to juxtapose the second substrate via the intermediate unit and coupled to the first substrate.2. The card structure as claimed in claim 1 , wherein the intermediate unit comprises at least one connecting portion claim 1 , and the connector comprises a contact unit coupled to the first substrate via the at least one connecting portion of the intermediate unit.3. The card structure as claimed in claim 2 , wherein the contact unit of the connector comprises at least one first contact portion and at least one second contact portion claim 2 , and the at least one first contact portion and the at least one second contact portion of the contact unit of the connector are coupled to the connector.4. The card structure as claimed in claim 3 , wherein the at least one first contact portion of the contact unit of the connector comprises a plurality of pad portions claim 3 , and the at least one second contact portion of the contact unit of the connector comprises a plurality of elastic plates.5. The card structure as claimed in claim 2 , wherein the at least one connecting portion of the intermediate unit comprises a cylindrical conductive structure.6. The card structure as claimed in claim 2 , wherein the at least one connecting portion of the intermediate unit comprises a cylindrical non- ...

Card structure, socket structure, and assembly structure thereof

A card structure includes a first substrate, a second substrate, and a connector. The first substrate includes a base surface, wherein at least one electronic part region and a terminal region are disposed on the base surface. The second substrate is disposed on the base surface and is coupled to the terminal region of the first substrate. The connector is disposed on the base surface to juxtapose the second substrate. The connector includes a connecting surface, a contact unit, and a plurality of contact regions disposed on the connecting surface and coupled to the contact unit and the terminal region, such that the plurality of contact regions are coupled to the second substrate via the terminal region of the first substrate.

Circuit board structure

A circuit board structure including a dielectric layer, a fine circuit pattern and a patterned conductive layer is provided, wherein the fine circuit pattern is embedded in a surface of the dielectric layer, and the patterned conductive layer is disposed on another surface of the dielectric layer and protrudes therefrom.

Wireless terminal with reduced specific absorption rate peak and implementation method thereof

The disclosure discloses a wireless terminal with a reduced Specific Absorption Rate (SAR) peak. The wireless terminal comprises a Printed Circuit Board (PCB), wherein a fractal gap is formed at an edge of a metal ground on the PCB to disturb distribution of induced current at the edge of the metal ground. The disclosure also discloses a method for reducing an SAR peak. On the premise of the non-influence on the communication quality of the wireless terminal, the SAR and the production cost can be reduced and the structure space of wireless terminal can be saved by using the wireless terminal and the method.

Test Structure and Method of Testing Electrical Characteristics of Through Vias

A method and apparatus for testing the electrical characteristics, such as electrical continuity, is provided. A substrate, such as a wafer or an interposer, having a plurality of through vias (TVs) is provided. Along one side of the substrate, a conductive layer electrically couples two or more of the TVs. Thereafter, the electrical characteristics of the TVs may be test by, for example, a probe card in electrical contact with the TVs on the other side of the substrate. During testing, current passes through a first TV from a first side of the substrate, to the conductive layer on a second side of the substrate, to a second TV, and back to the first side of the substrate through the second TV.

METHOD FOR PRODUCING AN ELECTRICAL MULTI-LAYER COMPONENT AND ELECTRICAL MULTI-LAYER COMPONENT

A method for producing an electrical multi-layer component is described, wherein a first ceramic layer () comprising a first and a second ceramic material () is applied to a ceramic substrate (). The first ceramic material () is applied to a first surface partition () of the substrate () by a first inkjet printing step and the second ceramic material () is applied to a second surface partition () of the substrate () by a second inkjet printing step, the second surface partition () surrounding and enclosing the first surface partition (). The second ceramic material () is different from the first ceramic material (). 1. A method for producing an electrical multi-layer component , comprising the steps:providing a ceramic substrate; andapplying a first ceramic layer to the substrate,wherein the first ceramic layer comprises a first ceramic material and a second ceramic material, the first ceramic material is applied to a first surface partition of the substrate by a first inkjet printing step, and the second ceramic material is applied to a second surface partition of the substrate by a second inkjet printing step,wherein the second surface partition surrounds and encloses the first surface partition, andwherein the second ceramic material is different from the first ceramic material.2. The method according to claim 1 , wherein the first surface partition has a surface area which is equal to or smaller than 500 μm times 500 μm claim 1 , preferably equal to or smaller than 100 μm times 100 μm.3. The method according to or claim 1 , wherein the first ceramic layer has a thickness of equal to or less than 100 μm claim 1 , preferably of equal to or less than 50 μm.4. The method according to claim 1 , wherein a first electrode layer is applied to the substrate claim 1 , the first ceramic layer is applied upon the first electrode layer claim 1 , and a second electrode layer is applied to the first ceramic layer.5. The method according to claim 4 , wherein the first and ...

Printed circuit board and method for manufacturing the same

Disclosed herein is a printed circuit board, including: a core layer; and a plurality of circuit layers stacked on the core layer, wherein one of the circuit layers includes a mesh pattern and a solid pattern, and another of the circuit layers include a first signal pattern opposite to the mesh pattern and a second signal pattern opposite to the solid pattern, the second signal pattern having a high-speed signal line with a higher speed, as compared with the second signal pattern.

ALUMINUM ALLOY FILM, WIRING STRUCTURE HAVING ALUMINUM ALLOY FILM, AND SPUTTERING TARGET USED IN PRODUCING ALUMINUM ALLOY FILM

The present invention provides an Al alloy film that, in a production step of a thin-film transistor substrate, reflective film, reflective anode, touch panel sensor, or the like, can effectively prevent corrosion such as pinhole corrosion (black dots) or corrosion of the Al alloy surface when immersed in a sodium chloride solution, has superior corrosion resistance, is able to suppress hillock formation, and has superior heat resistance. The Al alloy thin film is used as a reflective film or a wiring film on a substrate, and contains 0.01-0.5 at % of Ta and/or Ti and 0.05-2.0 at % of a rare earth element. 1. An Al alloy film , comprising:from 0.01 to 0.5 at. % of Ta, Ti, or a mixture thereof; andfrom 0.05 to 2.0 at. % of a rare earth element.2. The Al alloy film according to claim 1 , wherein the rare earth element is at least one element selected from the group consisting of Nd claim 1 , La claim 1 , and Gd.3. The Al alloy film according to claim 1 , wherein when the Al alloy film is immersed in a 1% aqueous sodium chloride solution at 25° C. for 2 hours and a surface of the Al alloy film is observed with an optical microscope at a magnification of 1000 claim 1 , a fraction of a corroded area in an Al alloy film surface relative to a total area of the Al alloy film surface is suppressed to 10% or less.4. A wiring structure claim 1 , comprising:a substrate;{'claim-ref': {'@idref': 'CLM-00001', 'claim 1'}, 'the Al alloy film according to ; and'}a transparent conductive film,wherein from the substrate side,the Al alloy film and the transparent conductive film are formed in that order, orthe transparent conductive film and the Al alloy film are formed in that order.5. The wiring structure according to claim 4 , wherein the Al alloy film is directly connected to the transparent conductive film.6. The wiring structure according to claim 4 ,wherein the Al alloy film and the transparent conductive film are formed in that order from the substrate side, andwherein when an ...

Flexible Circuit Sheet

A flexible circuit assembly can include a base layer, a plurality of circuit traces and an insulative layer. The plurality of circuit traces can each be coupled to a pair of circuit pads, and the circuit traces can be formed on an upper side of the base layer. The insulative layer can be formed over the circuit traces to isolate the circuit traces from an external environment. The base layer, plurality of circuit traces and insulative layer can form a flexible circuit sheet. The base layer and the insulative layer can include material properties and a thickness configured to facilitate the flexible circuit sheet being flexible such that the flexible circuit sheet is adapted to conform to a non-planar surface of the medical device. 1. A flexible circuit assembly for a navigated medical instrument , comprising:a base layer;a plurality of circuit traces each coupled to a pair of circuit pads, the circuit traces formed on an upper side of the base layer; andan insulative layer formed over the circuit traces to isolate the circuit traces from an external environment, wherein the base layer, plurality of circuit traces and insulative layer form a flexible circuit sheet;wherein the base layer and the insulative layer include material properties and a thickness configured to facilitate the flexible circuit sheet being flexible such that the flexible circuit sheet is adapted to conform to a non-planar surface of the medical device.2. The flexible circuit assembly of claim 1 , wherein the flexible circuit sheet includes a thickness of approximately 0.05 mm.3. The flexible circuit assembly of claim 2 , wherein the flexible circuit sheet includes a thickness of 0.04 mm.4. The flexible circuit assembly of claim 1 , wherein the base layer and the insulative layer are formed from polyimide or a photoimageable coverlay.5. The flexible circuit assembly of claim 1 , further comprising an adhesive configured to contact a lower side of the base layer and adapted to adhere the flexible ...

MULTI-LAYERED PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A multi-layered printed circuit board and a method of manufacturing the multi-layered printed circuit board are disclosed. The multi-layered printed circuit board in accordance with an embodiment of the present invention includes: an insulation layer; an inner-layer pad disposed inside the insulation layer; an inner-layer circuit wiring disposed inside the insulation layer and formed to be thinner than that of the inner-layer pad; a via connected with the inner-layer pad by penetrating the insulation layer; and an outer-layer circuit wiring formed on an outside surface of the insulation layer. 1. A multi-layered printed circuit board comprising:an insulation layer;an inner-layer pad disposed inside the insulation layer;an inner-layer circuit wiring disposed inside the insulation layer and formed to be thinner than that of the inner-layer pad;a via connected with the inner-layer pad by penetrating the insulation layer; andan outer-layer circuit wiring formed on an outside surface of the insulation layer.2. The multi-layered printed circuit board of claim 1 , wherein a height of the via protruded from the insulation layer is the same as a height of the outer-layer circuit wiring.3. The multi-layered printed circuit board of claim 1 , constituted with three layers claim 1 , which comprise one layer of inner-layer circuit wiring formed inside the insulation layer and two layers of outer-layer circuit wiring formed claim 1 , respectively claim 1 , on either surface of the insulation layer.4. A method of manufacturing a multi-layered printed circuit board claim 1 , comprising:forming a metal layer on one surface of a first insulation layer;etching the metal layer so that an inner-layer circuit wiring becomes thinner than an inner-layer pad;laminating a second insulation layer on one surface of the first insulation layer;forming a via hole in such a way that the inner-layer pad is exposed; andforming a via in the via hole and forming an outer-layer circuit wiring on an ...

PRINTED CIRCUIT BOARD HAVING WIRE PATTERN

A printed circuit board (PCB) includes a wire pattern having first and second surfaces facing in opposite directions from each other, the wire pattern including a first region having a first thickness and a second region having a second thickness greater than the first thickness; a core insulation layer on the second surface in the first region, the core insulation layer having a third surface adjacent to the second surface in the first region and a fourth surface facing in an opposite direction from the third surface, the fourth surface being connected to the second surface; and a first protection layer covering a portion of the fourth surface of the core insulation layer and a portion of the second surface in the second region. 1. A printed circuit board (PCB) , comprising:a wire pattern having first and second surfaces facing in opposite directions from each other, the wire pattern including a first region having a first thickness and a second region having a second thickness greater than the first thickness;a core insulation layer on the second surface in the first region, the core insulation layer having a third surface adjacent to the second surface in the first region and a fourth surface facing in an opposite direction from the third surface, the fourth surface being connected to the second surface; anda first protection layer covering a portion of the fourth surface of the core insulation layer and a portion of the second surface in the second region.2. The PCB as claimed in claim 1 , wherein:the first protection layer includes an opening exposing another portion of the second surface in the second region, anda width of the opening is smaller than a width of the second region.3. The PCB as claimed in claim 2 , further comprising a first external connection terminal on the second surface in the second region claim 2 , the first external connection terminal extending through the opening.4. The PCB as claimed in claim 3 , further comprising a second external ...

Wiring board and method for manufacturing the same

A wiring board includes a first multilayer wiring board having first conductive layers and having a surface, a second multilayer wiring board having second conductive layers and positioned such that the second multilayer wiring board has a surface facing the surface of the first multilayer wiring board, and an adhesive layer including an adhesive sheet and interposed between the first multilayer wiring board and the second multilayer wiring board such that the adhesive layer is adhering the first multilayer wiring board and the second multilayer wiring board. The first multilayer wiring board has a first pad on the surface of the first multilayer wiring board, the second multilayer wiring board has a second pad on the surface of the second multilayer wiring board, and the first pad and the second pad are positioned such that the first pad and the second pad face each other across the adhesive layer.

TRANSPARENT CONDUCTIVE FILM

A transparent conductive film includes a film base, a cured resin layer formed at one side of the film base, and an indium composite oxide layer laminated at a side of the cured resin layer opposite to the film base. The indium composite oxide layer has a thickness of 20 nm to 50 nm. The cured resin layer has a plurality of spherical particles and a binder resin layer which fixes the plurality of spherical particles to the film base. A difference w−d between a mode particle size w and a thickness d of the binder resin layer is greater than zero and less than or equal to 1.2 μm, where w is a mode particle size of the spherical particles and d is a thickness of the binder resin layer. 1. A transparent conductive film comprising:a film base, a first cured resin layer formed at one side of the film base, and a first indium composite oxide layer laminated at a side of the first cured resin layer opposite to the film base,wherein the first indium composite oxide layer has a thickness of 20 nm to 50 nm,the first cured resin layer has a plurality of spherical particles and a first binder resin layer which fixes the plurality of spherical particles to the film base, anda difference w−d between a mode particle size w and a thickness d of the first binder resin layer is greater than zero and less than or equal to 1.2 μm, where w is a mode particle size of the spherical particles and d is a thickness of the first binder resin layer.2. The transparent conductive film according to claim 1 , wherein the difference w−d is 0.1 μm to 1.0 μm claim 1 , and the mode particle size w is 0.5 μm to 3.0 μm.3. The transparent conductive film according to claim 2 , wherein the difference w−d is 0.3 μm to 0.9 μm claim 2 , and the mode particle size w is 1.0 μm to 2.0 μm.4. The transparent conductive film according to claim 1 , wherein the first cured resin layer contains 0.1 parts by weight to 4.0 parts by weight of the plurality of spherical particles with respect to 100 parts by weight of a ...

MULTI-LAYER WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF

Embodiments of the presently-disclosed subject matter include a multilayer wiring substrate including a first laminated structure that includes at least one conductive layer and at least one resin insulating layer; a core substrate that includes a reinforced fiber and that is laminated on the first laminated structure; and a second laminated structure that includes at least one conductive layer and at least one resin insulating layer and that is formed on the core substrate; and a plurality of via conductors which penetrate the first laminated structure, the core substrate, and the second laminated structure in the thickness direction, wherein the plurality of via conductors all expand in diameter in one direction, and the reinforced fiber is located above a center of the core substrate in the thickness direction. 1. A multilayer wiring substrate comprising:a first laminated structure that includes at least one conductive layer and at least one resin insulating layer;a core substrate that includes a reinforced fiber and that is laminated on the first laminated structure;a second laminated structure that includes at least one conductive layer and at least one resin insulating layer and that is formed on the core substrate; anda plurality of via conductors that penetrate the at least one resin insulating layer of the first laminated structure, the core substrate, and the at least one resin insulating layer of the second laminated structure,wherein the plurality of via conductors all expand in diameter in the same direction, andwherein the reinforced fiber is located above a center of the core substrate in a thickness direction.2. A method of manufacturing a multilayer wiring substrate comprising:forming, on a support board, a first laminated structure that includes at least one conductive layer and at least one resin insulating layer;forming, on the first laminated structure, a core substrate that includes a reinforced fiber by laminating the core substrate on the ...

MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING SAME

A multilayer wiring board includes a double-sided wiring board, an insulating substrate stacked on the double-sided wiring board, vias provided in through-holes in the insulating substrate, an outermost wiring on an upper surface of the insulating substrate, a first fiducial mark provided on the double-sided wiring board, and a second fiducial mark provided on the insulating substrate. The first fiducial mark contains a wiring of the double-sided wiring board. The second fiducial mark contains at least one via out of the vias. The first and second fiducial marks are provided for positioning the double-sided wiring board and the insulating substrate to each other. This multilayer wiring board includes layers positioned precisely. 1. A multilayer wiring board comprising: a first insulating board,', 'a plurality of first wirings provided on an upper surface of the first insulating board and made of conductive foil, and', 'a plurality of second wirings provided on a lower surface of the first insulating board and made of conductive foil;, 'a first double-sided wiring board including'}a first insulating substrate stacked on the first double-sided wiring board, the first insulating substrate having a lower surface situated on the upper surface of the first insulating board such that the first wirings are embedded in the first insulating substrate, the first insulating substrate having a plurality of first through-holes provided therein;a plurality of first vias each of which is provided in respective one of the first through-holes of the first insulating substrate;an outermost wiring formed on an upper surface of the first insulating substrate;a first fiducial mark provided on the first double-sided wiring board to position the first double-sided wiring board;a second fiducial mark provided on the first insulating substrate to position the first insulating substrate;a second insulating substrate stacked on the first double-sided wiring board, the second insulating ...

LAMINATE BODY, LAMINATE PLATE, MULTILAYER LAMINATE PLATE, PRINTED WIRING BOARD, AND METHOD FOR MANUFACTURE OF LAMINATE PLATE

A laminate body containing at least one resin composition layer and at least one glass substrate layer, wherein the resin composition layer comprises a resin composition containing a thermosetting resin and an inorganic filler. A laminate plate containing at least one cured resin layer and at least one glass substrate layer, wherein the cured resin layer comprises a cured product of a resin composition that contains a thermosetting resin and an inorganic filler. A printed wiring board having the laminate plate and a wiring provided on the surface of the laminate plate. A method for producing a laminate plate containing at least one cured resin layer comprising a cured product of a resin composition containing a thermosetting resin and an inorganic filler, and at least one glass substrate layer, which comprises a cured resin layer forming step of forming a cured resin layer on the surface of a glass substrate. 1. A laminate body containing at least one resin composition layer and at least one glass substrate layer , wherein the resin composition layer comprises the resin composition containing the thermosetting resin and the inorganic filler.2. The laminate body according to claim 1 , wherein the thickness of the glass substrate layer is from 30 μm to 200 μm.3. The laminate body according to claim 1 , wherein the thermosetting resin is one or more selected from an epoxy resin claim 1 , a phenolic resin claim 1 , an unsaturated imide resin claim 1 , a cyanate resin claim 1 , an isocyanate resin claim 1 , a benzoxazine resin claim 1 , an oxetane resin claim 1 , an amino resin claim 1 , an unsaturated polyester resin claim 1 , an allyl resin claim 1 , a dicyclopentadiene resin claim 1 , a silicone resin claim 1 , a triazine resin and a melamine resin.4. The laminate body according to claim 1 , wherein the inorganic filler is one or more selected from silica claim 1 , alumina claim 1 , talc claim 1 , mica claim 1 , aluminium hydroxide claim 1 , magnesium hydroxide claim ...

Printed circuit board and the method for manufacturing the same

Provided is a method for manufacturing a printed circuit board. The method for manufacturing a printed circuit board includes preparing an insulation board, irradiating a laser onto a graytone mask to each a surface of the insulation board, thereby forming a circuit pattern groove and a via hole at the same time, and filling the circuit pattern groove and the via hole to form a buried circuit pattern and the via. Thus, the circuit pattern groove and the via hole may be formed using the graytone mask at the same time without performing a separate process for forming the via hole. Therefore, the manufacturing process may be simplified to reduce the manufacturing costs.

Microelectronics device including anisotropic conductive layer and method of forming the same

A microelectronics device includes a first substrate, first electrodes disposed on the first substrate, an insulating layer covering the first electrodes, the insulating layer including openings on the first electrodes, and an anisotropic conductive film on the insulating layer, the anisotropic conductive film including conductive particles electrically connected to the first electrodes through the openings.

Circuit Board, Method for Fabricating the Same and Semiconductor Package Using the Same

A circuit board is provided including a core insulation film having a thickness and including a first surface and an opposite second surface, an upper stack structure and a lower stack structure. The upper stack structure has a thickness and has an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film. The lower stack structure has a thickness and has a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film. A ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.2. 1. A circuit board comprising:a core insulation film having a thickness and including a first surface and an opposite second surface;an upper stack structure having a thickness and having an upper conductive pattern having a thickness and an overlying upper insulation film stacked on the first surface of the core insulation film; anda lower stack structure having a thickness and having a lower conductive pattern having a thickness and an overlying lower insulation film stacked on the second surface of the core insulation film, wherein a ratio P of a sum of the thicknesses of the upper conductive pattern and the lower conductive pattern to a sum of the thicknesses of the core insulation film, the upper stack structure and the lower stack structure is in a range from about 0.05 to about 0.25.2. The circuit board of claim 1 , wherein the upper conductive pattern and the upper insulation film comprise a plurality of layers sequentially and repeatedly stacked on the first surface and the lower conductive pattern and the lower conductive pattern and the lower insulation film comprise a plurality of layers sequentially and repeatedly stacked on ...

MULTILAYER ELECTRONICS ASSEMBLY AND METHOD FOR EMBEDDING ELECTRICAL CIRCUIT COMPONENTS WITHIN A THREE DIMENSIONAL MODULE

A multilayer electronics assembly and associated method of manufacture are provided. The multilayer electronics assembly includes a plurality of stacked substrate layers. Each of the substrate layers is fusion bonded to at least an adjacent one of the plurality of substrate layers. A first discrete electrical circuit component is bonded to a first layer of the plurality of layers. A bonding material is interposed between the discrete electrical circuit component and the first layer. The bonding material has a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers. 1. A multilayer electronics assembly , comprising:a plurality of stacked substrate layers, each of the plurality of substrate layers fusion bonded to at least an adjacent one of the plurality of substrate layers;a first discrete electrical circuit component bonded to a first layer of the plurality of layers; anda bonding material interposed between the discrete electrical circuit component and the first layer, the bonding material having a reflow temperature at which the bonding material becomes flowable that is higher than a fusion bonding temperature of the substrate layers.2. The multilayer electronics assembly according to claim 1 , further comprising:a second discrete electrical circuit component bonded to a second layer of the plurality of layers.3. The multilayer electronics assembly according to claim 2 , wherein the plurality of substrate layers are stacked in a first direction claim 2 , and the first discrete electrical component overlaps the second discrete electrical component in the first direction.4. The multilayer electronics assembly according to claim 1 , wherein the plurality of substrate layers are stacked in a first direction claim 1 , and the first discrete electrical circuit component is positioned between adjacent layers of the plurality of stacked substrate layers.5. The multilayer electronics ...

ELECTRONIC CARD, AN ELECTRONIC DEVICE INCLUDING SUCH A CARD, AND A METHOD OF PROTECTING AN ELECTRONICS CARD

An electronics card comprising a stack of printed circuit layers, each comprising an electrically insulating support having at least one conductive track extending thereon, and two electromagnetic shields extending respectively over a top face and over a bottom face of the stack, each shield comprising a grid and a plate that are superposed and electrically conductive, each extending over an electrically insulating support, and the conductive tracks being obtained by solid copper type etching. The invention also provides a device including such a card, and a method of protecting such a card of such a device against a lightning strike and against electromagnetic radiation. 1. An electronics card comprising a stack of printed circuit layers , each comprising an electrically insulating support having at least one conductive track extending thereon , and two electromagnetic shields extending respectively over a top face and over a bottom face of the stack , the card being characterized in that each shield comprises a grid and a plate that are superposed and electrically conductive , each extending over an electrically insulating support , and the conductive tracks are obtained by solid copper type etching.2. The card according to claim 1 , wherein the grid extends between the support of the plate and the stack.3. The card according to claim 1 , wherein the grid has tracks that are about 1 mm wide and that are spaced apart from one another by about 5 mm.4. An electronic device comprising a housing containing at least one electronics card comprising a stack of printed circuit layers claim 1 , each comprising an electrically insulating support having at least one conductive track extending thereon claim 1 , and two electromagnetic shields extending respectively over a top face and over a bottom face of the stack claim 1 , the card being provided with an electrical connection with the outside of the housing claim 1 , and with at least one anti-lightning component claim 1 , ...

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

In a suspension board, a conductor layer having a predetermined pattern is formed on the upper surface of a first insulating layer. The first insulating layer has a thick portion having a large thickness and a thin portion having a small thickness. A reinforcing layer is formed on the upper surface of the first insulating layer so as to overlap with a boundary between the thick portion and the thin portion. 1. A printed circuit board comprising:a first insulating layer that has first and second surfaces and includes a first portion and a second portion having a smaller thickness than a thickness of said first portion;a conductor layer that is formed on said first surface of said first insulating layer and has a predetermined pattern; anda reinforcing layer that is formed in a partial region on said first surface of said first insulating layer so as to overlap with a boundary between said first portion and said second portion.2. The printed circuit board according to claim 1 , whereinsaid partial region on said first surface of said first insulating layer is formed to be flat, and a step caused by the boundary between said first portion and said second portion is formed on said second surface of said first insulating layer.3. The printed circuit board according to claim 1 , whereinat least part of said conductor layer is formed so as to overlap with said second portion.4. The printed circuit board according to claim 1 , whereinat least part of said conductor layer is formed in another region excluding said partial region on one surface of said first insulating layer so as to overlap with the boundary between said first portion and said second portion.5. The printed circuit board according to claim 1 , whereinsaid reinforcing layer includes polyimide resin.6. The printed circuit board according to claim 1 , whereinsaid reinforcing layer includes copper.7. The printed circuit board according to claim 1 , further comprising a support substrate that is provided on said ...

CIRCUIT BOARD

A circuit board includes a circuit substrate, a first dielectric layer, a first conductive layer, a second conductive layer and a second dielectric layer. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via. The second conductive layer is electrically connected to the first circuit layer via the first conductive layer. The second dielectric layer is disposed on the first dielectric layer and covers the second conductive layer and the second surface of the first dielectric layer. 1. A circuit board comprising:a circuit substrate having a first surface and a first circuit layer;a first dielectric layer disposed on the circuit substrate and covering the first surface and the first circuit layer, the dielectric layer having a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern;a first conductive layer disposed in the at least a blind via;a second conductive layer disposed in the intaglio pattern and the at least a blind via and covering the first conductive layer, the second conductive layer being electrically connected to the first circuit layer via the first conductive layer; anda second dielectric layer disposed on the first dielectric layer and coving the second conductive layer and the second surface of the first dielectric layer.2. The circuit board as claimed in claim 1 , wherein a height of the at least a blind via is denoted as H and a thickness of the first conductive layer is denoted as h claim 1 , and a relationship between h and H complies with 0.2≦(h/H)≦0.9.3. ...

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A printed wiring board including a rigid multilayer board, a first substrate having multiple conductors, and a second substrate having multiple conductors electrically connected to the conductors of the first substrate. The conductors of the second substrate have an existing density which is set higher than an existing density of the conductors of the first substrate, and the first substrate and/or the second substrate is embedded in the rigid multilayer board. 115-. (canceled)16. A printed wiring board , comprising:a first substrate comprising a non-flexible base material and having a plurality of conductors including a conductor layer formed on a surface of the first substrate;a second substrate comprising a non-flexible base material and having a plurality of conductors including a conductor layer formed on a surface of the second substrate;an insulation layer comprising an insulative material and formed over the first substrate and the second substrate such that the insulation layer covers the conductor layers formed on the surfaces of the first and second substrates; anda wiring layer formed on the insulation layer and having a plurality of interlayer connection portions formed through the insulation layer such that the conductor layers formed on the surfaces of the first and second substrates are directly and electrically connected through the wiring layer,wherein the first substrate has an accommodation section configured to accommodate the second substrate, the insulation layer is formed over the first substrate and the second substrate such that the second substrate is embedded in the accommodation section of the first substrate, the insulation layer has a plurality of vias formed through the insulation layer, and the interlayer connection portions of the wiring layer are formed in the vias, respectively.17. The printed wiring board according to claim 16 , wherein the accommodation section of the first substrate is configured to accommodate a plurality of ...

MANUFACTURING METHOD OF PRINTED WIRING BOARD AND PRINTED WIRING BOARD

Object of the present invention is to provide a method for manufacturing a printed wiring board which enables fine wiring formation at low costs and with high yields without introducing any special equipment, and a printed wiring board manufactured by the method. To achieve the object, a method for forming the wiring pattern adopted includes steps; for forming a laminate having a structure in which a copper foil layer formed using copper foil without roughening treatment having surface roughness (Rzjis) at a bonding surface of 2 μm or less and thickness of 5 μm or less is laminated to a conductive layer via an insulating layer; for providing a blind-hole composed of a hole perforating the copper foil layer and the insulating layer; and a bottom composed of the conductive layer in the laminate; for filling-up the blind-hole by a electro-plated copper in the time for depositing an electro-plated copper layer on a surface of the electroless-plated copper layer to make the total thickness of a copper layer provided on the insulating layer 15 μm or less, for providing of an etching resist layer having thickness of 15 μm or less and for etching of the copper layer. 1. Manufacturing method of a printed wiring board comprising:a laminate formation step for forming a laminate having a structure in which a copper foil layer formed using copper foil without roughening treatment having surface roughness (Rzjis) at a bonding surface of 2 μm or less and thickness of 5 μm or less is laminated to a conductive layer via an insulating layer;a blind-hole formation step for providing a blind-hole composed of a hole perforating the copper foil layer and the insulating layer; and a bottom composed of the conductive layer in the laminate;an electroless copper plating step for providing an electroless-plated copper layer on a surface of the copper foil layer and an inner wall of the blind-hole;a panel plating step for providing an electro-plated copper layer on a surface of the electroless ...

COMPOSITE LAYER STRUCTURE AND TOUCH DISPLAY DEVICE HAVING THE SAME THEREOF

A composite layer structure used in a touch display device is disclosed. The composite layer structure comprises a matrix material, a non-conductive metal layer and a transparent electrical-conductive layer. The non-conductive metal layer is disposed on the matrix material. The non-conductive metal layer and the transparent electrical-conductive layer are formed a stacked structure. 1. A composite layer structure used in a touch display device , the composite layer structure comprising:a matrix material;a non-conductive metal layer disposed on the matrix material; anda transparent electrical-conductive layer, the transparent electrical-conductive layer and the non-conductive metal layer staked on each other.2. The composite layer structure according to claim 1 , wherein the transparent electrical-conductive layer is a patterned transparent electrical-conductive layer.3. The composite layer structure according to claim 2 , wherein an area of the non-conductive metal layer is larger than an area of the patterned transparent electrical-conductive layer.4. The composite layer structure according to claim 2 , wherein the composite layer structure comprises a first area and a second area claim 2 , the first area has the non-conductive metal layer and the patterned transparent electrical-conductive layer claim 2 , the second area has the non-conductive metal layer.5. The composite layer structure according to claim 4 , wherein the first area has a first light transmittance and a first light reflectivity claim 4 , the second area has a second light transmittance and a second light reflectivity claim 4 , a difference between the first light transmittance and the second light transmittance is smaller than 2.01 claim 4 , a difference between the first light reflectivity and the second light reflectivity is smaller than 1.63.6. The composite layer structure according to claim 1 , wherein a sheet resistance of a material for forming the non-conductive metal layer is larger than ...

LAMINATE WITH INTEGRATED ELECTRONIC COMPONENT

The invention relates to methods for producing a laminate for contacting an electronic component, in which an insulating layer is arranged between first and second metal layers. The method includes contacting the metal layers to each other in a contact region, generating a recess in the insulating layer, laminating the metal layers to the insulating layer, generating a notch for accommodating the electronic component in the contact region in the first metal layer, inserting the electronic component in a depression in the laminate formed through a notch and recess. The electronic component is connected in a conductive manner to the second metal layer, such that an entire circumference of the electronic component is accommodated in the recess and/or notch, and at least part of the height of the electronic component is accommodated in the notch and/or recess. The invention also relates to such a laminate for contacting an electronic component. 116.-. (canceled)171112181828414242122231323. A method for producing a laminate ( , , ) for contacting at least one electronic component ( , , ) in which an insulating layer ( , , ) is arranged between a first metal layer ( , , ) and a second metal layer ( , , ) , the method comprising:{'b': 2', '3', '12', '13', '22', '23, 'contacting the first and second metal layers (, , , , , ) to each other in at least one contact region;'}{'b': 6', '16', '26', '4', '14', '24, 'generating at least one recess (, , ) in the insulating layer (, , );'}{'b': 2', '3', '12', '13', '22', '23', '4', '14', '24, 'laminating the metal layers (, , , , , ) to the insulating layer (, , );'}{'b': 7', '17', '27', '8', '18', '28', '2', '12', '22, 'generating at least one notch (, , ) for accommodating the at least one electronic component (, , ) in the first metal layer (, , );'}{'b': 8', '18', '28', '1', '11', '21', '7', '17', '27', '6', '16', '26', '8', '18', '28', '3', '13', '23', '8', '18', '28', '6', '16', '26', '7', '17', '27', '8', '18', '28', '7', '17 ...

MULTILAYERED WIRING SUBSTRATE AND ELECTRONIC APPARATUS

A multilayered wiring substrate that includes at least one signal layer and at least one ground layer is provided. The multilayered wiring substrate includes a first signal via that extends in a direction substantially perpendicular to the layers of the multilayered wiring substrate, is conductively connected to one of a pair of differential signaling wires provided in the signal layer, and is formed on a first grid point; and a second signal via that extends in a direction substantially perpendicular to the layers of the multilayered wiring substrate, is conductively connected to the other of the pair of differential signaling wires, and is formed on a second grid point that is positioned diagonally adjacent with respect to the first signal via. 1. A multilayered wiring substrate that includes at least one signal layer and at least one ground layer , the multilayered wiring substrate comprising:a first signal via extending in a direction substantially perpendicular to the layers of the multilayered wiring substrate, the first signal via being conductively connected to one of a pair of differential signaling wires provided in the signal layer, and formed on a first grid point; anda second signal via extending in a direction substantially perpendicular to the layers of the multilayered wiring substrate, the second signal via being conductively connected to the other of the pair of differential signaling wires and formed on a second grid point that is positioned diagonally adjacent with respect to the first signal via.2. The multilayered wiring substrate of claim 1 , further comprising:differential signaling wires aligned to pass between the first signal via and the second signal via.3. A multilayered wiring substrate that includes at least one signal layer and at least one ground layer claim 1 , the multilayered wiring substrate comprising:a first signal via extending in a direction substantially perpendicular to the layers of the multilayered wiring substrate and ...

MULTILAYERED PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME

A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers. 1. A multilayered printed wiring board , comprising:a plurality of insulating layers;a plurality of wiring layers which are located between the corresponding adjacent insulating layers; anda plurality of interlayer connection conductors for electrically connecting said wiring layers through said insulating layers,wherein a cavity is formed through one or more of said insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for said insulating layers.2. The multilayered printed wiring board as set forth in claim 1 ,wherein said second electric/electronic component is mounted on the same surface level as a bottom of said cavity.3. The multilayered printed wiring board as set forth in claim 1 ,wherein at least one portion of said second electric/electronic component is contacted with a resin of a prepreg composing one of said insulating layers.4. The multilayered printed wiring board as set forth in claim 1 ,wherein an inner wall of said cavity is coated with a resin5. The multilayered printed wiring board as set forth in claim 1 ,wherein said multilayered printed wiring board is composed of a first printed wiring board and a second printed wiring board; andwherein said second electric/electronic component is mounted on said first printed wiring board and said cavity is formed in said second printed wiring board.6. The multilayered printed wiring board ...

PRINTED CIRCUIT BOARD FOR MOBILE PLATFORMS

The invention provides a printed circuit board for mobile platforms. An exemplary embodiment of the printed circuit board for mobile platforms includes a core substrate having a first side. A ground plane covers the first side. A first insulating layer covers the ground plane. A plurality of first signal traces and a plurality of first ground traces are alternatively arranged on the first insulating layer. A second insulating layer connects to the first insulating layer. A plurality of second signal traces separated from each other is disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto. 1. A printed circuit board for mobile platforms , comprising:a core substrate having a first side;a ground plane covering on the first side;a first insulating layer covering the ground plane;a plurality of first signal traces and a plurality of first ground traces, alternatively arranged on the first insulating layer;a second insulating layer connecting to the first insulating layer; anda plurality of second signal traces separated from each other, disposed on the second insulating layer, wherein the second signal traces are disposed directly on spaces between the first signal traces and the first ground traces adjacent thereto.2. The printed circuit board for mobile platforms as claimed in claim 1 , wherein the second insulating layer covers the first signal traces and the first ground traces claim 1 , and wherein the ground plane is disposed at the bottommost layered level of the printed circuit board claim 1 , the first signal traces and the first ground traces are disposed at a middle layered level of the printed circuit board and the second signal traces are disposed at a topmost layered level of the printed circuit board.3. The printed circuit board for mobile platforms as claimed in claim 2 , wherein the topmost layered level of the printed circuit ...

PRINTED WIRING BOARD

A printed wiring board includes a core substrate, a first buildup layer laminated on a first surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on a second surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost conductive layer of the first buildup layer includes pads positioned to mount a semiconductor device on a surface of the first buildup layer, and the outermost interlayer resin insulation layer of the first buildup layer has a thermal expansion coefficient which is set lower than a thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer. 1. A printed wiring board , comprising:a core substrate having a first surface and a second surface on an opposite side of the first surface;a first buildup layer laminated on the first surface of the core substrate and comprising an outermost interlayer resin insulation layer and an outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer; anda second buildup layer laminated on the second surface of the core substrate and comprising an outermost interlayer resin insulation layer and an outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer,wherein the outermost conductive layer of the first buildup layer includes a plurality of pads positioned to mount a semiconductor device on a surface of the first buildup layer, and the outermost interlayer resin insulation layer of the first buildup layer has a thermal expansion coefficient which is set lower than a thermal expansion coefficient of the ...

Process for making stubless printed circuit boards

A process of copper plating a through-hole in a printed circuit board, and the printed circuit board made from such process. The process comprises: providing a printed circuit board with at least two copper interconnect lines separated by an insulator in the vertical direction; providing a through-hole in the printed circuit board in the vertical direction such that the interconnect lines provide a copper land in the through-hole; applying a seed layer to an interior surface of the through-hole; removing an outermost portion of the seed layer from the interior surface of the through-hole with a laser; applying copper on the seed layer.

METHOD OF FORMING A SUBSTRATE CORE STRUCTURE USING MICROVIA LASER DRILLING AND CONDUCTIVE LAYER PRE-PATTERNING AND SUBSTRATE CORE STRUCTURE FORMED ACCORDING TO THE METHOD

A method of fabricating a substrate core structure comprises: providing first and second patterned conductive layers defining openings therein on each side of a starting insulating layer; providing a first and a second supplemental insulating layers onto respective ones of a first and a second patterned conductive layer; laser drilling a set of via openings extending through at least some of the conductive layer openings of the first and second patterned conductive layers; filling the set of via openings with a conductive material to provide a set of conductive vias; and providing a first and a second supplemental patterned conductive layer onto respective ones of the first and the second supplemental insulating layers, the set of conductive vias contacting the first supplemental patterned conductive layer at one side thereof, and the second supplemental patterned conductive layer at another side thereof. 1. A multilayer substrate core structure including:a starting insulating layer;a first patterned conductive layer on one side of the starting insulating layer, and a second patterned conductive layer on another side of the starting insulating layer;a first supplemental insulating layer on the first patterned conductive layer;a second supplemental insulating layer on the second patterned conductive layer;a first supplemental patterned conductive layer on the first supplemental insulating layer;a second supplemental patterned conductive layer on the second supplemental insulating layer;a set of conductive vias provided in corresponding laser-drilled via openings extending from the second supplemental patterned conductive layer to the first supplemental patterned conductive layer, the via openings further extending through the first patterned conductive layer and the second patterned conductive layer.2. The substrate core structure of claim 1 , wherein the set of conductive vias include a plated conductive material therein.3. The substrate core structure of claim 1 , ...

CONDUCTIVE FILM HAVING OXIDE LAYER AND METHOD OF MANUFACTURING THE SAME

Provided are a conductive film and a method of manufacturing the same. The conductive film includes a substrate, a first conductive layer formed on the substrate, and a patterned second conductive layer formed on the first conductive layer. Here, oxide layers are formed on top and side surfaces of the second conductive layer. The conductive film may prevent defects of the conductive layer caused by rapid oxidation or damage to the substrate, and increase emission uniformity. 1. A conductive film , comprising:a substrate;a first conductive layer formed on the substrate; anda patterned second conductive layer formed on the first conductive layer,wherein oxide layers are formed on top and side surfaces of the second conductive layer.2. The conductive film according to claim 1 , wherein the substrate includes one or more resins selected from the group consisting of polyesters claim 1 , acetates claim 1 , polyether sulfones claim 1 , polycarbonates claim 1 , polyamides claim 1 , polyimides claim 1 , (meth)acrylates claim 1 , polyvinyl chlorides claim 1 , polyvinylidene chlorides claim 1 , polystyrenes claim 1 , polyvinyl alcohols claim 1 , polyacrylates and polyphenylene sulfides.3. The conductive film according to claim 1 , wherein the first conductive layer is formed of ITO or a zinc oxide-based thin film doped with an element M (ZnO:M) claim 1 , and the element M is a group 13 element or a transition metal having an oxidation number of +3.4. The conductive film according to claim 1 , wherein the second conductive layer includes copper (Cu) claim 1 , aluminum (Al) claim 1 , molybdenum (Mb) claim 1 , chromium (Cr) claim 1 , magnesium (Mg) claim 1 , calcium (Ca) claim 1 , sodium (Na) claim 1 , potassium (K) claim 1 , titanium (Ti) claim 1 , indium (In) claim 1 , yttrium (Y) claim 1 , lithium (Li) claim 1 , gadolinium (Gd) claim 1 , silver (Ag) claim 1 , tin (Sn) claim 1 , lead (Pb) or an alloy containing two or more thereof.5. The conductive film according to claim 1 , ...

STACKED ELECTRODE, STACKED ELECTRODE PRODUCTION METHOD, AND PHOTOELECTRIC CONVERSION DEVICE

A stacked electrode of an embodiment includes: a multi-layered graphene film and a metal wiring formed thereon, wherein the metal wiring contains randomly oriented metal nanowires, the multi-layered graphene film contains a laminate of graphene sheets, the graphene sheets each contain an aggregate of graphene plates, and the graphene plates have an average area of (A+B)nmor more, wherein A (nm) represents the average diameter of the metal nanowires, B (nm) satisfies the equation (1) of B/(A+B)=(1−X), and X represents the ratio of the area of the metal nanowires projected in the stacking direction of the stacked electrode. 1. A stacked electrode comprising:a multi-layered graphene film anda metal wiring formed thereon, whereinthe metal wiring contains randomly oriented metal nanowires,the multi-layered graphene film contains a laminate of graphene sheets,the graphene sheets each contain an aggregate of graphene plates, and{'sup': 2', '2', '2', '2, 'the graphene plates have an average area of (A+B)nmor more, wherein A (nm) represents the average diameter of the metal nanowires, B (nm) satisfies the equation (1) of B/(A+B)=(1−X), and X represents the ratio of the area of the metal nanowires projected in a stacking direction of the stacked electrode.'}2. The stacked electrode according to claim 1 , wherein the graphene plates have an average area of 2(A+B)nmor more.3. The stacked electrode according to claim 1 , wherein the graphene plates have an average area of 3(A+B)nmor more.4. The stacked electrode according to claim 1 , wherein the metal nanowires have an average diameter of 30 to 150 nm.5. The stacked electrode according to claim 1 , wherein the metal nanowires contain silver claim 1 , gold claim 1 , or copper.6. The stacked electrode according to claim 1 , wherein the multi-layered graphene film has a thickness of 5 nm or less.7. The stacked electrode according to claim 1 , coated with a near-infrared transparent resin.8. The stacked electrode according to claim ...

LAYERED STRUCTURE HAVING LAYERED CONDUCTIVE PATTERNS, MANUFACTURING PROCESS THEREOF AND TOUCHSCREEN WITH LAYERED STRUCTURE

A manufacturing process for manufacturing a layered structure is provided. In the manufacturing process, transfer layers including conductive layers are transferred from transfer films so as to form a first transfer layer defining a first conductive pattern and a second transfer layer defining a second conductive pattern on a surface of a substrate, such that the first conductive layer and the second conductive layer are stacked onto each other. At least one of the first transfer layer and the second transfer layer has a non-conductive layer on a surface facing the other of the first transfer layer and the second transfer layer. The non-conductive layer is provided between the first conductive pattern and the second conductive pattern. 1. A manufacturing process for manufacturing a layered structure having layered conductive patterns , the manufacturing process comprising:transferring a first transfer layer onto a substrate from a first transfer material having the first transfer layer including a conductive layer; andtransferring a second transfer layer onto the substrate from a second transfer material having the second transfer layer including a conductive layer such that the second transfer layer is stacked onto the first transfer layer, whereina first conductive pattern is formed on the substrate by the conductive layer of the first transfer layer, and a second conductive pattern different from the first conductive pattern is formed on the substrate by the conductive layer of the second transfer layer such that the second conductive pattern is stacked onto the first conductive pattern, whereina non-conductive layer is formed on a surface of at least one of the first transfer layer and the second transfer layer, the non-conductive layer being provided between the first conductive pattern and the second conductive pattern by transferring the first transfer layer and the second transfer layer onto the substrate.2. The manufacturing process according to claim 1 , ...

MULTILAYER FLEXIBLE SUBSTRATE

A multilayer flexible substrate includes a first structural layer including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and filled vias disposed in the insulating layer; and a second structural layer provided on a principal surface of a portion of the first structural layer and including at least one resin sheet including an insulating layer, a wiring conductor provided on a principal surface of the insulating layer, and a filled via provided in the insulating layer. The multilayer flexible substrate includes rigid regions and a flexible region that is more flexible than the rigid regions. In the multilayer flexible substrate, the filled via disposed in the flexible region has a higher porosity than the filled via disposed in the second structural layer. 1. A multilayer flexible substrate comprising:a first structural layer including at least one resin sheet including a first insulating layer, a first wiring conductor provided on a principal surface of the first insulating layer, and first filled vias provided in the first insulating layer; anda second structural layer which is provided on a portion of a principal surface of the first structural layer and which includes at least one resin sheet including a second insulating layer, a second wiring conductor provided on a principal surface of the insulating layer, and a second filled via disposed in the insulating layer; whereinthe multilayer flexible substrate includes a rigid region including a portion of the first structural layer and the second structural layer and a flexible region that is more flexible than the rigid region and including another portion of the first structural layer;the first filled vias are provided in the rigid region and in the flexible region;the first filled vias provided in the flexible region have a higher porosity than the second filled via provided in the second structural layer.2. The multilayer ...

TOUCH PANEL, DISPLAY DEVICE INCLUDING THE TOUCH PANEL, AND METHOD OF MANUFACTURING THE TOUCH PANEL

A external connecting terminal () includes a first interconnect layer (A) formed of a same film as a first conductive pattern for touch position detection under an interlayer insulating film (), and a second interconnect layer (B) formed of a same film as a second conductive pattern for touch position detection on the interlayer insulating film (). the first and the second interconnect layers are electrically connected to a lead line () at a portion overlapping the lead line (), and electrically connected together at a portion outside the lead line (). 1. A touch panel , comprising:a touch region for detecting a touch position touched by a contact body;a terminal region provided outside the touch region and connected to an external circuit;a first conductive pattern for touch position detection located in the touch region and made of transparent conductive oxide;an interlayer insulating film provided to cover at least part of the first conductive pattern;a second conductive pattern for touch position detection provided on the interlayer insulating film and made of transparent conductive oxide;a protection insulating film provided to cover the second conductive pattern;a lead line electrically connected to at least one of the first conductive pattern or the second conductive pattern, drawn from the touch region to the terminal region, and covered by the insulating film; andan external connecting terminal connected to a lead top of the lead line, drawn out of the insulating film, and provided in the terminal region, whereinthe external connecting terminal includes a first interconnect layer formed of a same film as the first conductive pattern, and a second interconnect layer formed of a same film as the second conductive pattern, the first and second interconnect layers being electrically connected to the lead line at a portion overlapping the lead line and being electrically connected together at a portion outside the lead line.2. The touch panel of claim 1 , ...

NOVEL PHOTOSENSITIVE RESIN COMPOSITION AND USE THEREOF

In order to provide (A) a photosensitive resin composition which (i) obtains an excellent tack-free property after being applied and dried, (ii) can be subjected to fine processing so as to have photosensitivity, (iii) prepares a cured film having excellent flexibility, flame retardancy, and electrical insulation reliability, and (iv) has small warpage after being cured, (B) a resin film, (C) an insulating film, and (D) an printed wiring board provided with an insulating film, the photosensitive resin composition containing at least (A) binder polymer; (B) cross-linked polymer particles, whose polymer has a urethane bond in its molecule; (C) thermosetting resin; and (D) photo-polymerization initiator is used. 1. A photosensitive resin composition , comprising at least:(A) binder polymer;(B) cross-linked polymer particles, whose polymer has a urethane bond in its molecule;(C) thermosetting resin; and(D) photo-polymerization initiator,wherein the (A) binder polymer contains (A1) resin having a urethane bond in its molecule.2. (canceled)3. The photosensitive resin composition as set forth in claim 1 ,wherein the (A1) resin having a urethane bond in its molecule has at least one organic group selected from the group consisting of the following (a1)-(a3):(a1) a (meth)acryloyl group;(a2) a carboxyl group; and(a3) an imide group.4. The photosensitive resin composition as set forth in claim 1 ,wherein the (A) binder polymer contains (A2) resin having an imide group in its molecule.5. The photosensitive resin composition as set forth in claim 1 ,wherein the (A) binder polymer contains (A3) resin having a (meth)acryloyl group in its molecule.6. The photosensitive resin composition as set forth in claim 1 ,wherein the (A) binder polymer contains (A4) resin having a carboxyl group in its molecule.7. The photosensitive resin composition as set forth in claim 1 ,wherein an average particle diameter of the (B) cross-linked polymer particle falls within a range from 1 μm to 20 μm.8 ...

Wiring Substrate and Method for Manufacturing Wiring Substrate

A method for manufacturing a wiring substrate includes alternately stacking first wiring patterns and first insulative layers on a first surface of a core substrate and alternately stacking second wiring patterns and second insulative layers on a second surface of the core substrate at an opposite side of the first surface. The number of the second insulative layers excluding the outermost second insulative layer differs from the number of the first insulative layers. The method further includes forming a via hole in the outermost first insulative layer to expose a portion of the outermost first wiring pattern, and exposing the outermost second wiring pattern by reducing the outermost second insulative layer in thickness. The method further includes forming a via in the via hole and forming a wiring pattern, which is connected by the via to the outermost first wiring pattern, on the outermost first insulative layer. 1. A method for manufacturing a wiring substrate , the method comprising:alternately stacking a plurality of first wiring patterns and a plurality of first insulative layers on a first surface of a core substrate and alternately stacking a plurality of second wiring patterns and a plurality of second insulative layers on a second surface of the core substrate located at an opposite side of the first surface, wherein the number of the second insulative layers excluding an outermost one of the second insulative layers differs from the number of the first insulative layers;forming a via hole in an outermost one of the first insulative layers to expose a portion of an outermost one of the first wiring patterns;exposing an outermost one of the second wiring patterns by reducing the outermost second insulative layer in thickness;forming a first seed layer, which covers the outermost first insulative layer, the exposed outermost first wiring pattern, and a wall of the via hole, and a second seed layer, which covers the outermost second insulative layer and the ...

Many-up wiring substrate, wiring board, and electronic device

A many-up wiring substrate includes an insulating base substrate in which a plurality of wiring board regions are arranged in at least one of a vertical direction and a horizontal direction; a hole disposed in one main surface of the insulating base substrate, and straddling adjacent wiring board regions of the plurality of wiring board regions or straddling the wiring board regions and a dummy region; a conductor disposed on an inner surface of the hole; and a through hole disposed so as to extend from the inner surface of the hole of the wiring board regions to the other main surface of the insulating base substrate.

MICRO-ELECTRO-MECHANICAL SYSTEMS (MEMS) AND CORRESPONDING MANUFACTURING PROCESS

An embodiment of a micro-electro-mechanical system of the MEMS type comprising at least one micro-electro-mechanical device of the MEMS type and one junction with a duct suitable to being associated with an external apparatus. Said junction being a printed circuit board PCB comprising at least two layers with juxtaposed faces, a channel being present in at least one face of at least one of said at least two layers suitable for realizing the duct with the juxtaposition of the other face of at least another one of at least two layers. 1. Micro-Electro-Mechanical System of the MEMS type comprising at least one micro-electro-mechanical device of the MEMS type and one junction with a duct suitable for being associated with an external apparatus , wherein said junction comprises a printed circuit board comprising at least two layers with juxtaposed faces , a channel being present in at least one face of said at least two layers suitable for realizing said duct with juxtaposition of the other face of at least two layers.2. MEMS system according to claim 1 , wherein said junction comprises at least two holes claim 1 , an input one and an output one claim 1 , in contact with said duct.3. MEMS system according to claim 2 , wherein a first layer of said at least two layers comprises a slot suitable for realizing said duct with the juxtaposition of said other face of a second layer of said at least two layers and of a face of a further layer.4. MEMS system according to claim 3 , wherein said input hole has sizes different from said output hole.5. MEMS system according to claim 4 , wherein said junction comprises a first spacer limited to said output hole for the junction of said MEMS device and a second spacer limited to said input for the connection to said external element.6. MEMS system according to claim 5 , further comprising a protective envelope which covers at least partially said junction and said MEMS device claim 5 , to make a single body.7. MEMS system according to ...

JOINING SHEET, ELECTRONIC COMPONENT, AND PRODUCING METHOD THEREOF

A joining sheet contains solder particles, a thermosetting resin, a thermoplastic resin, and a blocked carboxylic acid. 1. A joining sheet comprising:solder particles, a thermosetting resin, a thermoplastic resin, and a blocked carboxylic acid.2. The joining sheet according to claim 1 , whereinthe blocked carboxylic acid is a reacting product of vinyl ether and a carboxylic acid.3. The joining sheet according to claim 2 , whereinthe vinyl ether is alkyl vinyl ether and the carboxylic acid is a bifunctional carboxylic acid.4. The joining sheet according to claim 1 , whereinthe dissociation temperature of the blocked carboxylic acid is 150° C. or more.5. The joining sheet according to claim 1 , whereinthe volume ratio of the thermosetting resin to the thermoplastic resin is 25:75 to 75:25.6. The joining sheet according to claim 1 , whereinthe thermosetting resin is an epoxy resin.7. The joining sheet according to claim 1 , whereinthe thermoplastic resin is an acrylic resin.8. The joining sheet according to claim 1 , whereinthe solder particles are made of a tin-bismuth alloy.9. The joining sheet according to claim 1 , whereinthe joining sheet further contains a curing agent.10. A method for producing a joining sheet comprising:preparing a mixture by mixing solder particles, a thermosetting resin, a thermoplastic resin, and a blocked carboxylic acid to heat the mixture at a temperature that is below the dissociation temperature of the blocked carboxylic acid and below the melting point of the solder particles, and not less than the softening temperature of the thermoplastic resin to be formed into a sheet shape.11. A method for producing an electronic component comprising the steps of:preparing a laminate in which a joining sheet is disposed between two pieces of wired circuit boards arranged so that corresponding terminals thereof are spaced in opposed relation to each other, whereinthe joining sheet comprisessolder particles, a thermosetting resin, a thermoplastic ...

Injection molded control panel with in-molded decorated plastic film that includes an internal connector

Provided are systems and methods for a control assembly including: a first film that is in-molded that includes decorative graphics, a front surface and a rear surface; and a second film molded to the rear surface of the first film having a printed circuit that includes sensors, control circuits and interconnects and a front and rear surface; and an internal connector.

TOUCH PANEL AND METHOD FOR MANUFACTURING THE SAME

Provided is a method for manufacturing a touch panel. In the method, a substrate is prepared, a transparent electrode is formed on the substrate, an interconnection electrode material is applied to the substrate by printing, an interconnection electrode is formed by drying the interconnection electrode material, and a circuit board is disposed on the interconnection electrode. 1. A method for manufacturing a touch panel , comprising:preparing a substrate;forming an electrode on the substrate;applying an interconnection electrode material to the substrate by printing;forming an interconnection electrode by drying the interconnection electrode material; andforming a circuit board on the interconnection electrode.2. The method according to claim 1 , wherein the applying of the interconnection electrode material is performed by a method including at least one of gravure offset printing claim 1 , reverse offset printing claim 1 , screen printing claim 1 , and gravure printing.3. The method according to claim 1 , wherein in the applying of the interconnection electrode material claim 1 , a single layer is formed through a single process.4. The method according to claim 1 , wherein the interconnection electrode material comprises a metal paste.5. The method according to claim 4 , wherein the paste comprises an Ag powder claim 4 , a binder claim 4 , and a solvent.6. The method according to claim 5 , wherein the paste comprises 60 to 85 parts by weight of the Ag powder for every 100 parts by weight of the paste.7. The method according to claim 5 , wherein the binder comprises an epoxy-containing binder.8. The method according to claim 5 , wherein the paste comprises 5 to 15 parts by weight of the binder for every 100 parts by weight of the paste.9. The method according to claim 5 , wherein the solvent comprises an ether-containing solvent.10. The method according to claim 9 , wherein the paste comprises 10 to 25 parts by weight of the solvent for every 100 parts by weight of ...

CIRCUIT DEVICE AND METHOD FOR MANUFACTURING SAME

Provided are: a circuit device which has improved connection reliability in a solder joint portion by suppressing the occurrence of sink of solder; and a method for manufacturing the circuit device. In a method for manufacturing a circuit device of the present invention, a plurality of solders (), which are apart from each other, are firstly formed on the upper surface of a pad (A), and a chip component (B) and a transistor (C) are affixed at the same time. After that, a solder paste () is supplied to the upper surface of the pad (A) using a syringe (), a heatsink (D) is mounted on top of the solder paste (), and melting is caused by a reflow process. There is little risk of sinking of the solders () in the present invention since the solders () are discretely arranged on the upper surface of the pad (A). 1. A circuit device comprising:a substrate;a pad formed on an upper surface of the substrate; anda circuit element attached to the pad with solder, whereinan alloy layer made of an intermetallic compound of a metal forming the solder and a metal forming the pad is formed at a border between the solder and the pad, andthe alloy layer has a first alloy layer and a second alloy layer thicker than the first alloy layer.2. The circuit device according to claim 1 , whereinthe first alloy layer is formed as portions spaced away from each other and arranged in matrix.3. The circuit device according to claim 2 , whereinthe first alloy layer is formed in grids between the portions of the second alloy layer.4. The circuit device according to claim 1 , whereinthe circuit element is a heat sink to an upper surface of which a semiconductor element is attached.5. A method of manufacturing a circuit device claim 1 , comprising the steps of:forming a plurality of portions of first solder on an upper surface of a pad placed on a circuit substrate, the portions being spaced away from each other;applying solder paste to cover the portions of first solder and the upper surface of the ...

CIRCUIT BOARD, ELECTRIC DEVICE, AND METHOD OF MANUFACTURING CIRCUIT BOARD

A circuit board includes an insulative substrate having a first surface on which an electronic component is mounted, a second surface opposite to the first surface, and a through-hole open in the first surface and the second surface, a first conductive layer formed on the first surface so as to reach the through-hole, to which the electronic component is electrically connected, a second conductive layer formed on the second surface so as to reach the through-hole and electrically connected to the first conductive layer through the through-hole, a third conductive layer formed over the second surface so as to reach the through-hole, covering at least part of the second conductive layer, and filling at least part of the through-hole, a first protective glass layer covering the second conductive layer and the third conductive layer, and an adhesive layer formed on the first protective glass layer. 1. A circuit board comprising:an insulative substrate having a first surface on which an electronic component is mounted, a second surface which is opposite to the first surface, and a through-hole which is open in the first surface and the second surface;a first conductive layer which is formed on the first surface so as to reach the through-hole and to which the electronic component is electrically connected;a second conductive layer which is formed on the second surface so as to reach the through-hole and which is electrically connected to the first conductive layer through the through-hole;a resistance layer which is formed on the second surface and electrically connected to the second conductive layer;a third conductive layer which is formed over the second surface so as to reach the through-hole, covers at least part of the second conductive layer, and fills at least part of the through-hole;a first protective glass layer which covers the second conductive layer, the third conductive layer, and the resistance layer; andan adhesive layer which is formed on the first ...

MULTI-LAYER INTERCONNECTION STRUCTURE

Provided are a multi-layer interconnection structure and a manufacturing method thereof. The multi-layer interconnection structure includes a substrate; a first wiring on the substrate; an interlayer insulation layer on the first wiring; a second wiring on the interlayer insulation layer; and a via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring. 1. A multi-layer interconnection structure comprising:a substrate;a first wiring on the substrate;an interlayer insulation layer on the first wiring;a second wiring on the interlayer insulation layer; anda via contact including at least one conductive filament penetrating through the interlayer insulation layer between the second wiring and the first wiring to be electrically connected to the first wiring and the second wiring.2. The multi-layer interconnection structure of claim 1 , wherein the conductive filament comprises a conductive metal compound chain where sub-micro or nano-sized particles of a metal compound are connected to each other.3. The multi-layer interconnection structure of claim 2 , wherein the via contact further comprises a top electrode formed of the metal compound between the second wiring and the conductive filament.4. The multi-layer interconnection structure of claim 3 , wherein the metal compound comprises Ag.5. The multi-layer interconnection structure of claim 1 , wherein the interlayer insulation layer comprises an organic compound.6. The multi-layer interconnection structure of claim 5 , wherein the interlayer insulation layer comprises at least one of Poly Methyl Methacrylate (PMMA) claim 5 , a Polyvinyl Pyrrolidone (PVP) claim 5 , and Polyvinyl Alcohol (PVA).7. The multi-layer interconnection structure of claim 1 , wherein the substrate comprises a glass or a flexible printed circuit board (PCB). This is a divisional of ...

Mechanical adhesion of copper metallization to dielectric with partially cured epoxy fillers

In some embodiments, an improved mechanical adhesion of copper metallization to dielectric with partially cured epoxy fillers is presented. In this regard, a substrate build-up film is introduced having epoxy material and a plurality of epoxy microspheres, wherein an interior of the microspheres is not fully cured. Other embodiments are also disclosed and claimed.

WIRING BOARDS AND SEMICONDUCTOR PACKAGES INCLUDING THE SAME

A wiring board and a semiconductor package are provided. The wiring board includes: a metal core including a first surface and a second surface opposite the first surface; a first buildup portion and a second buildup portion including an insulating layer and a pad pattern sequentially stacked, the first and second buildup portions being provided on the first surface and the second surface, respectively; a mask pattern including an opening exposing the pad pattern, the mask pattern being provided on the second buildup portion; and a bather pattern in an area in which a region of the metal core which overlaps with the pad pattern of the second buildup portion is removed, wherein a minimum width of an outer circumference of the barrier pattern is greater than a maximum width of the pad pattern of the second buildup portion. 1. A wiring board comprising:a metal core comprising a first surface and a second surface opposite the first surface;a first buildup portion comprising a first insulating layer and a first pad pattern sequentially stacked, the first buildup portion being on the first surface;a second buildup portion comprising a second insulating layer and a second pad pattern sequentially stacked, the second buildup portion being on the second surface;a mask pattern comprising an opening exposing the second pad pattern, the mask pattern being on the second buildup portion; anda barrier pattern in an area in which a region of the metal core which overlaps with the second pad pattern is removed,wherein a minimum width of an outer circumference of the barrier pattern is greater than a maximum width of the second pad pattern.2. The wiring board of claim 1 , wherein a shape of the outer circumference of the barrier pattern is a circle or a polygon.3. The wiring board of claim 1 , wherein the barrier pattern comprises copper.4. The wiring board of claim 1 , wherein a maximum width of the outer circumference of the barrier pattern is greater than a maximum width of the ...

WIRING BOARD AND METHOD OF MANUFACTURING THE SAME

A wiring board includes a core layer, a through-hole penetrating through the core layer in its thickness direction, a first wiring layer formed on a first surface of the core layer, a through-hole wiring formed in the through-hole and electrically connected to the first wiring layer, and a curved first chamfered portion formed in a boundary portion between an inner side surface of the through-hole and the first surface of the core layer. The first wiring layer includes a first metal layer formed outside the first chamfered portion on the first surface of the core layer and a second metal layer formed on the first chamfered portion and the first metal layer. 1. A wiring board comprising:a core layer;a through-hole penetrating through the core layer in its thickness direction;a first wiring layer formed on a first surface of the core layer;a through-hole wiring formed in the through-hole and electrically connected to the first wiring layer; anda curved first chamfered portion formed in a boundary portion between an inner side surface of the through-hole and the first surface of the core layer,wherein the first wiring layer includes a first metal layer formed outside the first chamfered portion on the first surface of the core layer and a second metal layer formed on the first chamfered portion and the first metal layer.2. The wiring board according to claim 1 , wherein the first chamfered portion has a ring shape claim 1 , and the first metal layer has a ring shape.3. The wiring board according to claim 1 , further comprising:a second wiring layer formed on a second surface of the core layer and electrically connected to the first wiring layer by the through-hole wiring; anda curved second chamfered portion formed in a boundary portion between the inner side surface of the through-hole and the second surface of the core layer,wherein the second wiring layer includes a third metal layer formed outside the second chamfered portion on the second surface of the core layer ...

FABRIC-TYPE MULTILAYER PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

A fabric-type multilayer PCB and a manufacturing method thereof are provided. The method electrically connects first and second circuit patterns by compressing the first and second unit circuits with a conductor therebetween to introduce the conductor into an insulating layer, and thus can save on manufacturing cost and achieve more precise junction. Also, the fabric-type multilayer PCB includes a conductor that is formed on a fabric material, and directly joined to the first and second circuit patterns to electrically connect the first and second circuit patterns, and thus enables efficient electrical connection. Moreover, even when a shape is deformed by the torsion of flexible fabrics, an electrical connection can be maintained. 1. A method of manufacturing a fabric-type multilayer printed circuit board (PCB) , the method comprising:providing a first unit circuit formed on a fabric material, a first circuit pattern being exposed on the first unit circuit;providing an insulating layer and a second unit circuit that comprises a second circuit pattern disposed under the insulating layer;providing a conductor between the first and second unit circuits; anddirectly joining and electrically connecting the first and second circuit patterns by compressing the first and second unit circuits with the conductor therebetween to introduce the conductor into the insulating layer.2. The method of claim 1 , wherein the providing of a conductor comprises:disposing a mask layer on the insulating layer, a a plurality of holes corresponding to the second circuit pattern being formed in the mask layer;disposing the conductor in the hole of the mask layer;joining the mask layer, in which the conductor is disposed, onto the insulating layer; andremoving the mask layer.3. The method of claim 1 , wherein the insulating layer is an adhesive resin layer.4. The method of claim 3 , wherein the insulating layer contains a thermoplastic resin.5. The method of claim 1 , wherein the compression ...

WIRED CIRCUIT BOARD AND PRODUCING METHOD THEREOF

A wired circuit board includes an insulating layer to be formed with an opening extending therethrough in a thickness direction of the wired circuit board, a conductive layer formed on one surface of the insulating layer in the thickness direction and including a one-side terminal portion, an other-side terminal portion formed on the other surface of the insulating layer in the thickness direction, disposed so as to overlap the opening and the one-side terminal portion when projected in the thickness direction, and used to be connected to an electronic element via a conductive adhesive, and a conductive portion filling the opening to provide electrical conduction between the one-side terminal portion and the other-side terminal portion. 1. A wired circuit board , comprising:an insulating layer to be formed with an opening extending therethrough in a thickness direction of the wired circuit board;a conductive layer formed on one surface of the insulating layer in the thickness direction and including a one-side terminal portion;an other-side terminal portion formed on the other surface of the insulating layer in the thickness direction, disposed so as to overlap the opening and the one-side terminal portion when projected in the thickness direction, and used to be connected to an electronic element via a conductive adhesive; anda conductive portion filling the opening to provide electrical conduction between the one-side terminal portion and the other-side terminal portion.2. A wired circuit board according to claim 1 , wherein the other-side terminal portion has asperities formed in the other surface in the thickness direction.3. A wired circuit board according to claim 2 , wherein the asperities are formed at least in a region of the other-side terminal portion which overlaps the one-side terminal portion when projected in the thickness direction.4. A wired circuit board according to claim 1 , further comprising:a plating layer formed on the other surface of the ...

MODULATED COMPOSITIONAL AND STRESS CONTROLLED MULTILAYER ULTRATHIN CONFORMAL SiNx DIELECTRICS USED IN NANO DEVICE FABRICATION

A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided. 1. A method comprising:providing a substrate, wherein said substrate has a plurality of steps;depositing on said substrate a layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers;carrying out a plasma nitridation process on said layer to densify and control stress of said layer; andrepeating said steps of depositing and carrying out plasma nitridation for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained;wherein said predetermined thickness of said layers conforms to said steps of said substrate with a conformality of at least seventy percent.2. The method of claim 1 , wherein said depositing comprises plasma enhanced chemical vapor deposition.3. The method of wherein said depositing is carried out at a temperature of less than 450 degrees Centigrade.4. The method of claim 1 , wherein said depositing is carried out at a radio frequency power of less than 2 watts per square centimeter claim 1 , with a radio frequency ranging from 400 KHz to 60 MHz.5. The method of claim 4 , ...

PORTABLE TERMINAL

Disclosed herein is a portable terminal, including: a case; a first substrate disposed at one side of the case; a second substrate spaced from the first substrate to form a battery installing space; and a connection substrate electrically connecting between the first substrate and the second substrate and disposed in parallel with a side of the case. 1. A portable terminal , comprising:a case;a first substrate disposed at one side of the case;a second substrate spaced from the first substrate to form a battery installing space; anda connection substrate electrically connecting between the first substrate and the second substrate and disposed in parallel with a side of the case.2. The portable terminal as set forth in claim 1 , further comprising:a first flexible substrate electrically connecting between the first substrate and one side of the connection substrate; anda second flexible substrate electrically connecting the second substrate and the other side of the connection substrate.3. The portable terminal as set forth in claim 1 , wherein the connection substrate is disposed perpendicularly to the first substrate and the second substrate.4. The portable terminal as set forth in claim 1 , wherein the first substrate and the second substrate are a rigid substrate.5. The portable terminal as set forth in claim 1 , wherein the connection substrate is a rigid substrate.6. A portable terminal claim 1 , comprising:a case including a horizontal plane having a predetermined length and width and a vertical plane having a predetermined height;a flexible-rigid substrate including a first rigid substrate part formed horizontally in a horizontal plane of the case, a second rigid substrate part formed almost perpendicularly to the horizontal plane in the vertical plane of the case, and a flexible substrate part formed integrally so as to bendably and electrically connect between the first rigid substrate part and the second rigid substrate part; anda battery electrically ...

CIRCUIT SUBSTRATE

A circuit substrate includes a base layer, a first patterned conductive layer, a dielectric layer, a conductive block and a second patterned conductive layer. The first patterned conductive layer is disposed on the base layer and has a first pad. The dielectric layer is disposed on the base layer and covers the first patterned conductive layer, wherein the dielectric layer has an opening and the first pad is exposed by the opening. The conductive block is disposed in the opening and covers the first pad. The second patterned conductive layer is disposed on a surface of the dielectric layer and has a second pad, wherein the second pad and the conductive block are integrally formed. 1. A circuit substrate , comprising:a base layer;a first patterned conductive layer disposed on the base layer and having a first pad;a dielectric layer disposed on the base layer and covering the first patterned conductive layer, wherein the dielectric layer has an opening exposing the first pad;a conductive block disposed in the opening and covering the first pad; anda second patterned conductive layer disposed on a surface of the dielectric layer and having a second pad, wherein the second pad is connected to the conductive block in a form of one piece.2. The circuit substrate of claim 1 , wherein an outer diameter of the first pad is smaller than an outer diameter of the conductive block so that the first pad is covered by the conductive block.3. The circuit substrate of claim 1 , wherein the second patterned conductive layer further comprises a wire and the second pad is connected to the wire.4. The circuit substrate of claim 1 , wherein the first patterned conductive layer further comprises a wire and the first pad is composed of one end of the wire.5. The circuit substrate of claim 1 , wherein an outer diameter of the second pad is substantially equal to an outer diameter of the conductive block.6. A circuit substrate claim 1 , comprising:a base layer;a first patterned conductive ...

WIRING SUBSTRATE

A wiring substrate includes an insulating layer, an upper wiring pattern, and a lower wiring pattern, the wiring patterns sandwiching the insulating layer. The lower wiring pattern includes an interlayer connecting conductor integral therewith and projecting toward the upper wiring pattern for electrical connection to the upper wiring pattern. The interlayer connecting conductor is joined to the upper wiring pattern so as to penetrate into the upper wiring pattern beyond a joining interface between the insulating layer and the upper wiring pattern. Thus, the wiring substrate adaptable for a large current is provided without causing degradation of reliability in connection, which may occur by cracking, disconnection, interlayer peeling-off, etc. 1. (canceled)2. A wiring substrate comprising:an insulating layer;a first conductive pattern and a second conductive pattern arranged to sandwich the insulating layer; andan interlayer connecting conductor penetrating through the insulating layer in a direction of thickness thereof and electrically connecting the first conductive pattern and the second conductive pattern to each other; whereinthe interlayer connecting conductor is integral and unitary with the first conductive pattern, and the interlayer connecting conductor is joined to the second conductive pattern so as to penetrate into the second conductive pattern beyond a joining interface between the insulating layer and the second conductive pattern.3. The wiring substrate according to claim 2 , wherein the insulating layer includes a plurality of layers claim 2 , and the second conductive pattern is located on a surface of an uppermost one of the plurality of layers.4. The wiring substrate according to claim 2 , wherein the interlayer connecting conductor and the second conductive pattern are electrically connected to each other along at least portions thereof through a conductive adhesive.5. The wiring substrate according to claim 3 , wherein the first conductive ...

INSULATION FILM HAVING METAL LAYER

Disclosed herein is an insulation film having a metal layer, including: a carrier; a metal layer formed on the carrier; and an insulation layer formed on the metal layer. 1. An insulation film having a metal layer , comprising:a carrier;a metal layer formed on the carrier; andan insulation layer formed on the metal layer.2. The insulating film as set forth in claim 1 , wherein the carrier is made of copper (Cu).3. The insulating film as set forth in claim 1 , wherein the carrier has a thickness of 18 μm to 35 μm.4. The insulating film as set forth in claim 1 , wherein the metal layer is made of copper (Cu).5. The insulating film as set forth in claim 1 , wherein the metal layer has a thickness of 100 nm to 3000 nm.6. The insulating film as set forth in claim 1 , wherein the insulation layer has a thickness of 10 μm to 40 μm.7. The insulating film as set forth in claim 1 , wherein the insulation layer is made of a resin insulation material having an inorganic filler included therein.8. An insulation film having a metal layer claim 1 , comprising:an insulation layer; anda metal layer formed on the insulation layer.9. The insulating film as set forth in claim 8 , wherein the insulation layer has a thickness of 10 μm to 40 μm.10. The insulating film as set forth in claim 8 , wherein the insulation layer is made of a resin insulation material having an inorganic filler included therein.11. The insulating film as set forth in claim 8 , wherein the metal layer is made of copper (Cu).12. The insulating film as set forth in claim 8 , wherein the metal layer has a thickness of 100 nm to 3000 nm. This application claims the benefit of Korean Patent Application No. 10-2012-0076609, filed on Jul. 13, 2012, entitled “Insulation film Having Metal Layer”, which is hereby incorporated by reference in its entirety into this application.1. Technical FieldThe present invention relates to an insulation film having a metal layer.2. Description of the Related ArtA printed circuit board ...

FABRICS WITH MULTI-LAYERED CIRCUIT AND MANUFACTURING METHOD THEREOF

Fabrics with a multi-layered circuit of high reliability and a manufacturing method thereof are provided. The fabrics with the multi-layered circuit include: a base layer; a first conductive pattern which is formed on the base layer; a second conductive pattern which is formed to intersect with the first conductive pattern at least in part; and an insulating pattern which is formed on an intersection portion which is a region where the first conductive pattern and the second conductive pattern intersect. 1. Fabrics with a multi-layered circuit , the fabrics comprising:a base layer;a first conductive pattern which is formed on the base layer;a second conductive pattern which is formed to intersect with the first conductive pattern at least in part; andan insulating pattern which is formed on an intersection portion which is a region where the first conductive pattern and the second conductive pattern intersect.2. The fabrics as claimed in claim 1 , wherein the first conductive pattern and the second conductive pattern comprise silver (Ag).3. The fabrics as claimed in claim 1 , wherein the insulating pattern comprises silicone resin.4. The fabrics as claimed in claim 1 , wherein the insulating pattern is formed to be wider than a width of the first conductive pattern and cover the first conductive pattern.5. The fabrics as claimed in claim 1 , wherein the first conductive pattern and the second conductive pattern are electrically connected with each other.6. The fabrics as claimed in claim 5 , further comprising a via hole which is formed on the intersection portion and electrically connects the first conductive pattern and the second conductive pattern.7. A method for manufacturing fabrics with a multi-layered circuit claim 5 , the method comprising:forming a first conductive pattern on a base layer;forming an insulating pattern on a predetermined region of the first conductive pattern; andforming a second conductive pattern on the insulating pattern to intersect ...

WIRING SUBSTRATE, METHOD FOR MANUFACTURING THE WIRING SUBSTRATE, AND SEMICONDUCTOR PACKAGE

A wiring substrate includes an insulating layer including a reinforcement member and having a first surface and a second surface positioned on an opposite side of the first surface, an electrode pad exposed from the first surface, a layered body including first insulating layers and being formed on the second surface, the first insulating layers having a first insulating material as a main component, another layered body including second insulating layers and being formed on the layered body, the second insulating layers having a second insulating material as a main component, and another electrode pad exposed from a surface of the another layered body that is opposite to the layered body. The number of the first insulating layers is equal to that of the second insulating layers. The first insulating layers have a thermal expansion coefficient that is greater than that of the second insulating layers. 1. A wiring substrate comprising:an insulating layer including a reinforcement member and having a first surface and a second surface positioned on an opposite side of the first surface;a first electrode pad that is exposed from the first surface of the insulating layer including the reinforcement member;a first layered body including a plurality of first insulating layers and being formed on the second surface of the insulating layer including the reinforcement member, the plurality of first insulating layers having a first insulating material as a main component;a second layered body including a plurality of second insulating layers and being formed on the first layered body, the plurality of second insulating layers having a second insulating material as a main component; anda second electrode pad that is exposed from a surface of the second layered body that is opposite to the first layered body;wherein the number of the plurality of first insulating layers is equal to the number of the plurality of second insulating layers,wherein the plurality of first insulating ...

Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules

A layout for simultaneously sub-accessible memory modules is disclosed. In one embodiment, a memory module includes a printed circuit board having a plurality of sectors, each sector being electrically isolated from the other sectors and having a multi-layer structure. At least one memory device is attached to each sector, the memory devices being organized into a plurality of memory ranks. A driver is attached to the printed circuit board and is operatively coupled to the memory ranks. The driver is adapted to be coupled to a memory interface of the computer system. Because the sectors are electrically-isolated from adjacent sectors, the memory ranks are either individually or simultaneously, or both individually and simultaneously accessible by the driver so that one or more memory devices on a particular sector may be accessed at one time. In an alternate embodiment, the printed circuit board includes a driver sector electrically isolated from the other sectors and having a multi-layer structure, the driver being attached to the driver sector.

CIRCUIT BOARD

A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer. 1. A circuit board , comprising:a circuit substrate having a first surface and a first circuit layer;a dielectric layer disposed on the circuit substrate and covering the first surface and the first circuit layer, wherein the dielectric layer has a second surface, at least a blind via extended form the second surface to the first circuit layer and an intaglio pattern;a first conductive layer disposed in the blind via; anda second conductive layer disposed in the intaglio pattern and the blind via, and covering the first conductive layer, wherein the second conductive layer is electrically connected to the first circuit layer through the first conductive layer.2. The circuit board as claimed in claim 1 , wherein a height of the blind via is denoted as H and a thickness of the first conductive layer is denoted as h claim 1 , and a relationship between h and H complies with 0.2≦(h/H)≦0.9.3. The circuit board as claimed in claim 1 , wherein the intaglio pattern is connected to the blind via.4. The circuit board as claimed in claim 1 , further comprising an activation layer disposed between the intaglio pattern of the dielectric layer and the second conductive layer and disposed between the first conductive layer ...

Flexible multilayer substrate

A flexible multilayer substrate includes a multilayer body including a plurality of laminated resin layers. The multilayer body includes an innermost surface, which is a surface on an inner side when the substrate is bent, and an outermost surface, which is a surface on an outer side when the substrate is bent. Each of the plurality of resin layers includes a skin layer on one surface. Lamination of the multilayer body includes a skin layer joint plane at one location at a central portion in the thickness direction, and the skin layer and other surface come in contact with each other at another location along the central portion in the thickness direction. A skin layer joint plane is arranged on a side closer to the innermost surface than a central plane in the thickness direction of the multilayer body.

CERAMIC WIRING BOARD, MULTI-PIECE CERAMIC WIRING BOARD, AND METHOD FOR PRODUCING SAME

Provided are a ceramic wiring substrate; a multi-piece ceramic wiring substrate array for providing a plurality of the wiring substrates; and a method for reliably producing the wiring substrate array. The ceramic wiring substrate includes a substrate main body, which has a front surface, a back surface, side surfaces, a groove surface located on a side toward the front surface, and a fracture surface located on a side toward the back surface; and a notch which has a concave shape in plan view, and which is provided on at least one of the side surfaces so as to extend between the front surface and the back surface, wherein, in the side surface having the notch, the boundary between the groove surface and the fracture surface has curved portions on opposite sides of the notch, the curved portions being convex toward the front surface of the substrate main body in side view. 1. A ceramic wiring substrate comprising:a substrate main body which has a rectangular shape in plan view, and which has a front surface and a back surface and has side surfaces, each being located between the front surface and the back surface, and having a groove surface located on a side toward the front surface and a fracture surface located on a side toward the back surface; anda notch which has a concave shape in plan view, and which is provided on at least one of the side surfaces so as to extend between the front surface and the back surface, the ceramic wiring substrate being characterized in that:in the side surface having the notch, the boundary between the groove surface and the fracture surface has curved portions on opposite sides of the notch, the curved portions being convex toward the front surface of the substrate main body in side view.2. A ceramic wiring substrate comprising:a substrate main body which has a rectangular shape in plan view, and which has a front surface and a back surface and has side surfaces, each being located between the front surface and the back surface, ...

BVA INTERPOSER

A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds. 1. A method for making an interposer , comprising the steps of:forming a plurality of wire bonds having first extremities including bases bonded to one or more surfaces of a first element and second extremities opposite from the first extremities, the wire bonds having edge surfaces extending between the first and second extremities;forming a dielectric encapsulation contacting the edge surfaces and separating adjacent wire bonds from one another; andthen further processing comprising removing at least portions of the first element,wherein after the further processing, the interposer is provided having first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.2. The method of claim 1 , the dielectric encapsulation having first and second oppositely-facing surfaces claim 1 , wherein the interposer has a through opening extending between the first and second oppositely-facing sides claim 1 , the opening sized to receive an entire ...

CERAMIC MULTILAYER SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

A ceramic multilayer substrate includes stacked ceramic layers; internal conductors which are stacked with one of the ceramic layers therebetween, and are arranged such that at least a portion of the internal conductors overlap each other in a stacking direction; and a constraining layer which is arranged on a layer different from layers on which the internal conductors are located. The constraining layer overlaps, in the stacking direction, an internal conductor-overlapping region where at least two of the internal conductors overlapping each other in the stacking direction, has a planar area not more than twice the planar area of the internal conductor-overlapping region, and contains an unsintered inorganic material powder. The constraining layer has a planar area not more than one-half the planar area of the ceramic layers. The constraining layer is arranged so as to entirely cover the internal conductor-overlapping region. 1. A ceramic multilayer substrate comprising:a plurality of stacked ceramic layers;a plurality of internal conductors which are stacked on each other with a respective one of the ceramic layers between adjacent pairs of the plurality of internal conductors, the plurality of internal conductors being arranged such that at least a portion of the plurality of internal conductors overlap each other in a stacking direction; andat least one constraining layer which is located on a layer different from layers on which the internal conductors are located; whereinthe at least one constraining layer is arranged to overlap, in a stacking direction, an internal conductor-overlapping region where at least two of the internal conductors overlapping each other in the stacking direction overlap each other;the at least one constraining layer includes a planar area that is not more than twice a planar area of an internal conductor-overlapping region; andthe at least one constraining layer contains an unsintered inorganic material powder.2. The ceramic ...

PRINTED CIRCUIT BOARD STRUCTURE

A printed circuit board structure includes a plurality of circuit layer plates stacked together in which each of the stacked circuit layer plates includes an epoxy resin plate body and a fabric structure completely encapsulated in the epoxy resin plate body, and each circuit layer plate stacked between two circuit layer plates is further provided with filler particles distributed in its epoxy resin plate body, and the two opposite and outermost circuit layer plates thereof have metal soldering pads on the outer surfaces of the epoxy resin plate body thereof, and the two opposite and outermost circuit layer plates do not have the filler particles in its epoxy resin plate body thereof. 1. A printed circuit board structure comprising a plurality of circuit layer plates stacked together , and each of the circuit layer plates comprising:an epoxy resin plate body; anda fiber fabric completely encapsulated inside the epoxy resin plate body,wherein each of the circuit layer plates which is stacked between two of the circuit layer plates is further provided with filler particles distributed in the epoxy resin plate body of the circuit layer plate; andwherein, in all of the circuit layer plates, the two opposite and outermost circuit layer plates thereof are provided with metal soldering pads on outer surfaces of the epoxy resin plate bodies of the two opposite and outermost circuit layer plates, respectively, and both the two opposite and outermost circuit layer plates thereof are free of the filler particles in the epoxy resin plate body thereof.2. The printed circuit board structure according to claim 1 , wherein claim 1 , in all of the stacked circuit layer plates claim 1 , conductive patterns are respectively sandwiched between every two neighboring circuit layer plates claim 1 , and electrically connected with the metal soldering pads on the two opposite and outermost circuit layer plates thereof.3. A printed circuit board structure comprising:two opposite and outermost ...

METHOD FOR MAKING A TWO-LAYER CAPACITIVE TOUCH SENSOR PANEL

A method of fabricating a two-layer capacitive touch sensor panel comprising the following steps: a) depositing a first transparent electrically conductive layer on a transparent cover sheet; b) forming a pattern in the transparent electrically conductive layer to create a first set of discrete electrode structures; c) depositing a transparent dielectric layer over the discrete electrode structures; d) depositing a second transparent electrically conductive layer onto the transparent dielectric layer; e) forming a pattern in the transparent electrically conductive layer to create further discrete electrode structures by laser ablation, this pattern either not penetrating or penetrating only part way through the dielectric layer so as to avoid damaging the first set of discrete electrode structures; f) forming electrical connections or vias between the two transparent electrically conductive layers through the dielectric layer; and g) forming electrical connections between the transparent electrically conductive layer(s) and an electrical track or busbar formed at the periphery of the panel.) The method provides a maskless, chemical free way to fabricate a two-layer “cover integrated” sensor. A two-layer capacitive touch sensor panel fabricated by this method is also described 1. A method of fabricating a two-layer capacitive touch sensor panel comprising the following steps:a) depositing a first transparent electrically conductive layer on a transparent cover sheet;b) forming a first pattern in the first transparent electrically conductive layer to create a first set of discrete electrode structures therein;c) depositing a transparent dielectric layer over the first discrete electrode structure of the first transparent electrically conductive layer;d) depositing a second transparent electrically conductive layer onto the transparent dielectric layer;e) forming a second pattern in the second transparent electrically conductive layer to create a second set of discrete ...

WIRED CIRCUIT BOARD

A wired circuit board includes a first insulating layer, a conductive pattern formed on its surface at one side in a thickness direction, and a second insulating layer formed on the surface of the first insulating layer at the one side in the thickness direction so as to cover the conductive pattern. An outer end surface of the first insulating layer in a perpendicular direction to the thickness direction is formed to be inclined outwardly gradually from the one side toward the other side in the thickness direction. An outer end surface of the second insulating layer in the perpendicular direction has an end edge at the other side in the thickness direction which is located between both end edges of the outer end surface of the first insulating layer in the perpendicular direction which are located at the one side and the other side in the thickness direction. 1. A wired circuit board , comprising:a first insulating layer;a conductive pattern formed on a surface of the first insulating layer at one side in a thickness direction; anda second insulating layer formed on the surface of the first insulating layer at the one side in the thickness direction so as to cover the conductive pattern, whereinan outer end surface of the first insulating layer in a perpendicular direction which is perpendicular to the thickness direction is formed to be inclined outwardly in the perpendicular direction gradually from the one side in the thickness direction toward the other side in the thickness direction, andan outer end surface of the second insulating layer in the perpendicular direction has an end edge at the other side in the thickness direction which is located between both end edges of the outer end surface of the first insulating layer in the perpendicular direction which are located at the one side and the other side in the thickness direction.2. A wired circuit board according to claim 1 , wherein the outer end surface of the second insulating layer in the perpendicular ...

SIGNAL LINE AND CIRCUIT SUBSTRATE

A signal line is a linear conductor provided within a laminated body. A first ground conductor is provided on a positive direction side in a z axis direction within the laminated body, compared with the signal line, and overlaps with the signal line in a planar view seen from the z axis direction. A second ground conductor is provided on a negative direction side in the z axis direction within the laminated body, compared with the signal line, and overlaps with the signal line in the planar view seen from the z axis direction. Via hole conductors connect the ground conductors to each other. In the first ground conductor, a plurality of opening portions are arranged along the signal line in the planar view seen from the z axis direction. The via hole conductors are provided between the opening portions adjacent to one another, in an x axis direction. 1. (canceled)2. A signal line comprising:a laminated body including a plurality of insulator layers that include flexible material and are laminated on each other in a lamination direction;a linear signal line provided within the laminated body;a first ground conductor located above the linear signal line in the lamination direction within the laminated body and overlapping with the linear signal line in a planar view seen from the lamination direction;a second ground conductor located below the linear signal line in the lamination direction within the laminated body and overlapping with the linear signal line in the planar view seen from the lamination direction; anda via hole conductor connecting the first ground conductor and the second ground conductor to each other; whereinin the first ground conductor, a plurality of first opening portions are arranged along the linear signal line in the planar view seen from the lamination direction; andin the planar view seen from the lamination direction, the via hole conductor is provided on an imaginary line that connects two corners of the first opening portions adjacent to ...

Printed circuit board and method for manufacturing the same

Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a center part having a first width and a contact part having a second width, the contact part makes contact with a surface of the core insulating layer, and the first width is larger than the second width. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure.

PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer. The via includes a first part, a second part below the first part, and a third part between the first and second parts, and the third part includes a metal different from a metal of the first and second parts. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure. 1. A printed circuit board comprising:a core insulating layer;at least one via formed through the core insulating layer;an inner circuit layer buried in the core insulating layer; andan outer circuit layer on a top surface or a bottom surface of the core insulating layer,wherein the via includes a first part, a second part below the first part, and a third part between the first and second parts, and the third part includes a metal different from a metal of the first and second parts.2. The printed circuit board of claim 1 , wherein the core insulating layer comprises:a first insulating layer for burying the first and third parts of the via; anda second insulating layer located below the first insulating layer to bury the second part of the via.3. The printed circuit board of claim 2 , wherein the inner circuit layer is formed by using a material identical to a material for the third part of the via.4. The printed circuit board of claim 1 , wherein the first and second parts of the via are formed by using a same material.5. The printed circuit board of claim 1 , wherein the inner circuit layer has a rectangular sectional shape.6. The printed circuit board of claim 2 , wherein the inner circuit layer is buried in the ...

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD

A printed wiring board has an interlayer insulation layer, a conductive pattern formed on the interlayer insulation layer, a solder-resist layer formed on the interlayer insulation layer and the conductive pattern and having an opening portion exposing a portion of the conductive pattern and a portion of the interlayer insulation layer around the portion of the conductive pattern, a metal layer formed in the opening portion of the solder-resist layer such that the metal layer is covering the portion of the conductive pattern and the portion of the interlayer insulation layer exposed through the opening portion of the solder-resist layer, and a bump structure formed in the opening portion of the solder-resist layer such that the bump structure is formed on the metal layer in the opening portion of the solder-resist layer. 1. A printed wiring board , comprising:an interlayer insulation layer;a conductive pattern formed on the interlayer insulation layer;a solder-resist layer formed on the interlayer insulation layer and the conductive pattern and having an opening portion exposing a portion of the conductive pattern and a portion of the interlayer insulation layer around the portion of the conductive pattern;a metal layer formed in the opening portion of the solder-resist layer such that the metal layer is covering the portion of the conductive pattern and the portion of the interlayer insulation layer exposed through the opening portion of the solder-resist layer; anda bump structure formed in the opening portion of the solder-resist layer such that the bump structure is formed on the metal layer in the opening portion of the solder-resist layer.2. The printed wiring board according to claim 1 , wherein the metal layer is formed in the opening portion of the solder-resist layer such that the metal layer is covering an entire portion exposed through the opening portion of the solder-resist layer.3. The printed wiring board according to claim 1 , wherein the bump ...

PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD

A printed wiring board has an interlayer insulation layer, a conductive pattern formed on the interlayer insulation layer, a solder-resist layer formed on the interlayer insulation layer and conductive pattern and having opening exposing a portion of the conductive pattern and a portion of the interlayer insulation layer around the portion of the conductive pattern, a metal layer formed in the opening of the solder-resist layer such that the metal layer is covering the portion of the conductive pattern exposed through the opening of the solder-resist layer, and a bump formed in the opening of the solder-resist layer such that the bump is on the metal layer in the opening of the solder-resist layer. The opening of the solder-resist layer has space formed with side surface of the bump, inner wall of the solder-resist layer and the portion of the interlayer insulation layer in the opening of the solder-resist layer. 1. A printed wiring board , comprising:an interlayer insulation layer;a conductive pattern formed on the interlayer insulation layer;a solder-resist layer formed on the interlayer insulation layer and the conductive pattern and having an opening portion exposing a portion of the conductive pattern and a portion of the interlayer insulation layer around the portion of the conductive pattern;a metal layer formed in the opening portion of the solder-resist layer such that the metal layer is covering the portion of the conductive pattern exposed through the opening portion of the solder-resist layer; anda bump structure formed in the opening portion of the solder-resist layer such that the bump structure is formed on the metal layer in the opening portion of the solder-resist layer,wherein the opening portion of the solder-resist layer has a space formed with a side surface of the bump structure, an inner wall of the solder-resist layer and the portion of the interlayer insulation layer in the opening portion of the solder-resist layer.2. The printed wiring ...

Layered Body, Production Method and Use Thereof

The invention relates to a layered body, in particular one with two sheets of electric functional layers, as well as a use of this layered body for example in a touch screen with improved resolution. By changing the grid structure at the intersection areas a moiré effect can be avoided by superimposition of the patterns. 1. Layered body , at least two sheets of electrically conductive and transparent functional layers with conductive , non-transparent conductor paths on at least one transparent support , so extensive that individual conductor paths or grid structures consisting of conductor paths of the first sheet form intersection areas with individual conductor paths or grid structures of the second sheet in the layer construction , characterized in that at least one of the two sheets has a grid structure consisting of conductor paths , which is non-periodic.2. Layered body according to claim 1 , characterized in that the non-periodicity of the grid structure is present at the intersection areas.3. Layered body according to one of or claim 1 , characterized in that the non-periodicity of the grid structure is achieved by a change of the grid constant.4. Layered body according to one of the previous claims claim 1 , characterized in that the non-periodicity of the grid structure is achieved by narrowing or discontinuation of individual conductor paths.5. Layered body according to one of the previous claims claim 1 , characterized in that a difference in the periodicity of the grid structure in the edge area of the intersection areas is not identical to a difference in the periodicity of grid structure at the intersection area.6. Layered body according to one of the previous claims claim 1 , characterized in that a difference in the periodicity of the grid structure in the edge area and/or at the intersection area is realized by omission of individual conductor paths.7. Layered body according to one of the previous claims claim 1 , characterized in that a ...

WIRING BOARD, LIGHT-EMITTING DEVICE, AND METHOD OF MANUFACTURING THE WIRING BOARD

According to one embodiment, a wiring board includes a base assuming a flat plate shape, a wiring pattern provided in a position on one surface of the base and apart from a peripheral edge of the base, a first metal layer provided on the opposite side of the base side of the wiring pattern, and a second metal layer configured to cover the first metal layer and a sidewall of the wiring pattern. 1. A wiring board comprising:a base assuming a flat plate shape;a wiring pattern provided in a position on one surface of the base and apart from a peripheral edge of the base;a first metal layer provided on an opposite side of the base side of the wiring pattern; anda second metal layer configured to cover the first metal layer and a sidewall of the wiring pattern.2. The wiring board according to claim 1 , whereinthe wiring board includes, on the second metal layer, a solder section including at least tin, andactivation energy necessary for a material of the first metal layer and the tin to diffuse each other is higher than activation energy necessary for a material of the wiring pattern and the tin to diffuse each other.3. The wiring board according to claim 1 , wherein a material of the second metal layer has ionization energy higher than ionization energy of a material of the wiring pattern and a material of the first metal layer.4. The wiring board according to claim 1 , wherein a thickness dimension of the first metal layer is larger than a thickness dimension of the second metal layer.5. The wiring board according to claim 1 , wherein the first metal layer substantially does not include phosphorus.6. The wiring board according to claim 1 , wherein a thickness dimension of the first metal layer is equal to or larger than 0.003 mm and equal to or smaller than 0.1 mm.7. The wiring board according to claim 1 , wherein a thickness dimension of the second metal layer is equal to or larger than 0.0001 mm and equal to or smaller than 0.0003 mm.8. The wiring board according to ...

CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

A circuit board includes a circuit pattern formed on a substrate, a first solder resist layer formed on the circuit pattern, an electroless plating layer formed on the circuit pattern on which the first solder resist layer is opened, and a second solder resist layer formed on the first solder resist layer, and a method for manufacturing the same. According to certain embodiments, it is possible to cover a portion which has vulnerable plating quality due to solder resist residue or insufficient wetting around an edge of an existing solder resist layer by including an additional solder resist layer on a surface-treated plating layer. Further, it is possible to protect an undercut portion under the solder resist layer by forming the additional solder resist layer. 1. A circuit board comprising:a circuit pattern formed on a substrate;a first solder resist layer formed on the circuit pattern;an electroless plating layer formed on the circuit pattern on which the first solder resist layer is opened; anda second solder resist layer formed on the first solder resist layer.2. The circuit board according to claim 1 , wherein the second solder resist layer extends to a portion of the electroless plating layer including the region in which the first solder resist layer is formed.3. The circuit board according to claim 1 , wherein the electroless plating layer is formed of at least one layer selected from a nickel (Ni) layer claim 1 , a palladium (Pd) layer claim 1 , and a gold (Au) layer.4. The circuit board according to claim 1 , wherein the circuit pattern uses copper (Cu).5. A method for manufacturing a circuit board claim 1 , comprising:forming a circuit pattern on a substrate;applying a first solder resist layer on the circuit pattern;etching the first solder resist layer to open the circuit pattern;forming an electroless plating layer by surface-treating the circuit pattern; andforming a second solder resist layer on the surface-treated first solder resist layer.6. The ...

PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME

Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a first part, a second part below the first part, a third part between the first and second parts, and at least one barrier layer including a metal different from a metal of the first to third parts. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure. 1. A printed circuit board comprising:a core insulating layer;at least one via formed through the core insulating layer;an inner circuit layer buried in the core insulating layer; andan outer circuit layer on a top surface or a bottom surface of the core insulating layer,wherein the via includes a first part, a second part below the first part, a third part between the first and second parts, and at least one barrier layer including a metal different from a metal of the first to third parts.2. The printed circuit board of claim 1 , wherein the core insulating layer comprises:a first insulating layer for burying the first and third parts of the via; anda second insulating layer located below the first insulating layer to bury the second part of the via.3. The printed circuit board of claim 2 , wherein the inner circuit layer is formed by using a material identical to a material for the third part of the via.4. The printed circuit board of claim 1 , wherein the first to third parts of the via are formed by using a same material.5. The printed circuit board of claim 1 , wherein the inner circuit layer has a rectangular sectional shape.6. The printed circuit board of claim 1 , wherein the barrier layer ...

PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME

Disclosed herein is a method of manufacturing a printed circuit board, including: preparing a base substrate; disposing a mask having through-holes formed therein on one surface of the base substrate; inserting metal core balls into the through-holes of the mask, performing reflow treatment on the metal core balls, and removing the mask; and laminating an insulating layer on one surface of the base substrate. 1. A method of manufacturing a printed circuit board , comprising:preparing a base substrate;disposing a mask having through-holes formed therein on one surface of the base substrate;inserting metal core balls into the through-holes of the mask, performing reflow treatment on the metal core balls, and removing the mask; andlaminating an insulating layer on one surface of the base substrate.2. The method according to claim 1 , further comprising claim 1 , after the laminating of the insulating layer on one surface of the base substrate claim 1 , desmear-treating a portion of the insulating layer.3. The method according to claim 2 , wherein in the desmear-treating of the portion of the insulating layer claim 2 , the insulating layer is desmear-treated so that one end of the metal core ball is formed as a plane.4. The method according to claim 2 , further comprising claim 2 , after the desmear-treating of the portion of the insulating layer claim 2 , forming a circuit layer on one surface of the insulating layer.5. The method according to claim 1 , wherein in the laminating of the insulating layer on one surface of the base substrate claim 1 , the insulating layer is formed so that one end of the metal core ball is exposed.6. The method according to claim 1 , wherein the metal core ball includes a metal ball having a spherical shape and a solder part enclosing the metal ball.7. The method according to claim 6 , wherein the metal ball is made of a metal or is formed by plating or coating a surface of a resin material with a metal.8. The method according to claim 7 ...

CONDUCTIVE SHEET AND TOUCH PANEL

In this conductive sheet and touch panel, a laminated conductive sheet is configured by laminating: a first conductive sheet having a first conductive pattern configured from a plurality of first sensor units; and a second conductive sheet having a second conductive pattern configured from a plurality of second sensor units. The first sensor units have: a band-shaped section extending in a direction approximately perpendicular to one direction; and a jutting section that juts from both sides of the band-shaped section in the one direction. The second sensor units are formed in a manner so as to approximately fill the regions demarcated by the band-shaped section and the jutting section. 1. A conductive sheet comprising a first conductive part and a second conductive part , stacked with a substrate interposed therebetween , whereinthe first conductive part contains two or more first conductive patterns arranged in one direction, the first conductive patterns being composed of thin metal wires,the second conductive part contains two or more second conductive patterns arranged in another direction approximately perpendicular to the one direction, the second conductive patterns being composed of thin metal wires,the first conductive patterns each contain two or more first sensing portions connected with each other, the first sensing portions being composed of thin metal wires,the second conductive patterns each contain two or more second sensing portions connected with each other, the second sensing portions being composed of thin metal wires,the first sensing portions and the second sensing portions each contain a plurality of small lattices arranged,the first sensing portions each contain a strip and protrusions, the strip extends in the other direction approximately perpendicular to the one direction, and the protrusions extend from both sides of the strip in the one direction,the second sensing portions each cover most of a region surrounded by the strip and the ...

Wiring substrate

A wiring substrate includes a first insulating layer, an adhesion insulating layer formed under the first insulating layer and an outer face of the adhesion insulating layer is made to a roughened face, a first wiring layer formed on the first insulating layer, a second insulating layer formed on the first insulating layer, and in which a first via hole reaching the first wiring layer is provided, a second wiring layer formed on the second insulating layer, and connected to the first wiring layer through the first via hole, a second via hole formed in the adhesion insulating layer and the first insulating layer, and reaching the first wiring layer, and a third wiring layer formed on the outer face of the adhesion insulating layer, and connected to the first wiring layer through the second via hole.

MANUFACTURING METHOD FOR PRINTED CIRCUIT BOARD

A printed circuit board is manufactured by forming on a top surface of a support base, in a pattern having a predetermined width, a first metal layer for defining boundary ends between adjacent printed circuit boards in a printed circuit board assembly, forming on top of the first metal layer a wiring structure portion having an insulating layer and a conductive layer for each printed circuit board in the printed circuit board assembly, forming, in the wiring structure portion, grooves having a pattern corresponding to the pattern of the first metal layer to expose the first metal layer, forming a second metal layer on the wall surface of the grooves in the wiring structure portion, and cutting the first metal layer on the bottom surface of the grooves to separate each printed circuit board. 1. A manufacturing method for a printed circuit board comprising:forming on a top surface of a support base, in a pattern having a predetermined width, a first metal layer for defining boundary ends between adjacent printed circuit boards in a printed circuit board assembly;forming on top of the first metal layer a wiring structure portion having an insulating layer and a conductive layer for each printed circuit board in the printed circuit board assembly;forming, in the wiring structure portion, grooves having a pattern corresponding to the pattern of the first metal layer to expose the first metal layer;forming a second metal layer on the wall surface of the grooves in the wiring structure portion; andcutting the first metal layer on the bottom surface of the grooves to separate each printed circuit board.2. The method according to claim 1 , wherein forming the grooves in the wiring structure portion further comprises:forming the grooves in the wiring structure portion using a laser drill.3. The method according to claim 1 , wherein forming the second metal layer on the wall surface of the grooves in the wiring structure portion further comprises:forming a metal film on the ...