УСТРОЙСТВО ДЛЯ ФОРМИРОВАНИЯ МНОГОСЛОЙНЫХ СТРУКТУР

Устройство для формирования многослойных структур относится к области технологии полупроводниковых материалов и приборов, а более конкретно к устройствам для нанесения тонких пленок полупроводниковых соединений и твердых растворов на их основе. Технической задачей, решаемой данным изобретением, является создание конструкции контейнера, обеспечивающего увеличение производительности и дающего возможность создавать чередующиеся слои разного состава. Устройство для формирования многослойных структур состоит из основной кварцевой ампулы и двух дополнительных ампул, с помощью которых осуществляется выращивание легированных пленок из газовой фазы с использованием двух дополнительных источников пара, один с собственным компонентом, другой с легирующей примесью. Предлагаемое устройство от прототипа отличается тем, что оно содержит изолированные друг от друга камеры с отверстиями, расположенные с возможностью размещения между ними нагревателя, а в основной камере с возможностью размещения в ней подложек ...

МОНОКРИСТАЛЛИЧЕСКИЙ АЛМАЗНЫЙ МАТЕРИАЛ

Изобретение относится к технологии получения монокристаллического алмазного материала для электроники и ювелирного производства. Способ включает выращивание монокристаллического алмазного материала методом химического осаждения из паровой или газовой фазы (CVD) на главной поверхности (001) алмазной подложки, которая ограничена по меньшей мере одним ребром <100>, длина упомянутого по меньшей мере одного ребра <100> превышает наиболее длинное измерение поверхности, которое является ортогональным упомянутому по меньшей мере одному ребру <100>, в соотношении по меньшей мере 1,3:1, при этом монокристаллический алмазный материал растет как по нормали к главной поверхности (001), так и вбок от нее, и во время процесса CVD значение α составляет от 1,4 до 2,6, где α=(√3×скорость роста в <001>) ÷ скорость роста в <111>. Изобретение позволяет получать имеющие большую площадь алмазные материалы с низкой плотностью дислокаций. 2 н. и 12 з.п. ф-лы, 8 ил., 3 пр.

СИНТЕТИЧЕСКИЙ CVD АЛМАЗ

Изобретение относится к технологии производства синтетического алмазного материала, который может быть использован в электронных устройствах. Алмазный материал содержит одиночный замещающий азотв концентрации более примерно 0,5 ч/млн и имеющий такое полное интегральное поглощение в видимой области от 350 нм до 750 нм, что по меньшей мере примерно 35% поглощения приписывается. Алмазный материал получают путем химического осаждения из паровой или газовой фазы (CVD) на подложку в среде синтеза, содержащей азот в атомной концентрации от примерно 0,4 ч/млн до примерно 50 ч/млн, при этом газ-источник содержит: атомную долю водорода, H, от примерно 0,40 до примерно 0,75; атомную долю углерода, C, от примерно 0,15 до примерно 0,30; атомную долю кислорода, O, от примерно 0,13 до примерно 0,40; причем H+C+O=1; отношение атомной доли углерода к атомной доле кислорода, C:O, удовлетворяет соотношению примерно 0,45:1 Подробнее

СПОСОБ ПОЛУЧЕНИЯ ЭПИТАКСИАЛЬНЫХ СТРУКТУР НИТРИДОВ ЭЛЕМЕНТОВ ГРУППЫ A3

Изобретение относится к технологии получения полупроводниковых соединений типа А3N и может быть использовано при изготовлении эпитаксиальных структур различного назначения. Сущность изобретения: способ получения эпитаксиальных структур нитридов элементов группы А3 на кристаллических подложках включает создание в вакуумной камере в бесстолкновительном режиме одного или нескольких молекулярных потоков, содержащих элементы группы А3, и молекулярного потока аммиака посредством подачи его в вакуумную камеру из газового источника; отношение плотности молекулярного потока амиака к суммарной плотности молекулярных потоков элементов группы А3 лежит в пределах 100 - 10000. Изобретение позволяет повысить качество эпитаксиальных структур, а также скорость их роста. 1 ил.

СПОСОБ ПОЛУЧЕНИЯ МОНОКРИСТАЛЛИЧЕСКИХ СЛОЕВ ОКСИДА ЦИНКА НА НЕОРИЕНТИРУЮЩИХ ПОДЛОЖКАХ

Использование: в электронной технике. Сущность: предложен способ получения монокристаллических слоев оксида цинка на неориентирующих подложках из стекла, керамики, плавленого кварца, тугоплавкого металла или полупроводника с отличными от оксида цинка постоянными решеток - методом химических транспортных реакций (ХТР) в проточном реакторе пониженного давления в атмосфере водорода. Для обеспечения автоэпитаксии на поверхность неориентирующей подложки предварительно методом магнетронного распыления наносят оптимизированный промежуточный слой оксида цинка толщиной 200-1000 представляющий собой текстуру базисной ориентации вне зависимости от ориентирующих свойств подложек. Техническим результатом изобретения является получение эпитаксиальных слоев ZnO на неориентирующих подложках методом ХТР с высоким структурным совершенством, однородностью и очень гладкой поверхностью. 1 ил.

СПОСОБ ИЗГОТОВЛЕНИЯ ПЛАСТИН И/ИЛИ ЛИСТОВ ФОЛЬГИ АНИЗОТРОПНОГО ПИРОЛИТИЧЕСКОГО НИТРИДА БОРА, ЛИСТ ФОЛЬГИ, ИЗГОТОВЛЕННЫЙ ЭТИМ СПОСОБОМ, ИЗДЕЛИЕ ИЗ АНИЗОТРОПНОГО ПИРОЛИТИЧЕСКОГО НИТРИДА БОРА В ВИДЕ ПАКЕТА ПЛАСТИН И/ИЛИ ЛИСТОВ ФОЛЬГИ И СПОСОБ ЕГО ПОЛУЧЕНИЯ

Изобретение относится к технологии изготовления изделий из высокотемпературных диэлектрических, электроизоляционных материалов и технологии их получения методом химического осаждения из газовой фазы для изготовления различных деталей для СВЧ-техники и интегральных микросхем. Сущность изобретения: пластины и/или листы фольги нитрида бора получают путем образования на подложке в реакторе пакета, содержащей параллельные слои нитрида бора, путем неоднократного чередования процесса химического осаждения нитрида бора из газовой фазы при взаимодействии трифторида бора и аммиака и процесса обработки поверхности осажденного слоя нитрида бора в течение не менее 15 мин при тех же температуре и давлении газообразным агентом, пассивирующим активные центры кристаллизации поверхности образовавшегося слоя нитрида бора с образованием границы раздела, а затем образовавшийся пакет механически расщепляют по границам раздела на пластины и/или листы фольги. В качестве газообразного агента используют аммиак, ...

СПОСОБ ПОЛУЧЕНИЯ ПОЛИКРИСТАЛЛИЧЕСКОГО СЕЛЕНИДА ЦИНКА

Изобретение относится к области силовой ИК-оптики и касается способа получения поликристаллического селенида цинка, используемого в качестве пассивных элементов CO2-лазеров и других приборов, работающих в ИК-диапазоне. Способ заключается в химическом осаждении селенида цинка из газовой фазы в реакторе, содержащем подложки. Способ включает нагрев реактора и подачу на подложки в смеси с аргоном потоков паров цинка и селеноводорода в молярном соотношении 0,8 - 1,3. С целью снижения коэффициента поглощения и уменьшения концентрации объемных дефектов подложки нагревают до 670 - 70°С при общем давлении в реакторе 6 - 10 Торр и расходе селеноводорода на единицу площади поперечного сечения реактора 35-42 мкмоль/мин·см2. Коэффициент объемного поглощения полученного селенида цинка на длине волны 10,6 мкм не превышает 1·10-3см-1 , концентрация мелких (до 50 мкм в диаметре) объемных дефектов составляет (0,7-1,2)·103см-3, крупных (свыше 50 мкм в диаметре) - ниже 1 см-3. 1 табл.

СПОСОБ ПОЛУЧЕНИЯ ИЗОТОПИЧЕСКИ ЧИСТЫХ АЛМАЗНЫХ ПЛЕНОК

Данное изобретение направлено на получение монокристаллического алмаза, состоящего из изотопически чистого углерода-12 или углерода-13. Изотопически чистый монокристаллический алмаз выращивают на монокристаллическом субстрате непосредственно из изотопически чистого углерода-12 или углерода-13. Способ включает стадии введения в реакционную камеру монокристаллической подложки, нагревают ее до температуры образования алмаза, вводят газообразную смесь водорода и углеводорода, имеющего изотопически чистый углерод-12 или углерод-13. В результате газообразная смесь по крайней мере частично разлагается в камере и на подложке осаждается монокристаллическая пленка. Она необязательно может быть удалена с монокристаллической подложки. Пленка имеет стабильные характеристики и высокую удельную теплопроводность. 3 з. п. ф-лы.

СПОСОБ ЭПИТАКСИАЛЬНОГО ВЫРАЩИВАНИЯ МОНОКРИСТАЛЛОВ НИТРИДОВ МЕТАЛЛОВ 3А ГРУППЫ ХИМИЧЕСКИХ ЭЛЕМЕНТОВ

Использование: способы выращивания монокристаллических полупроводников для электронной промышленности, в частности промышленное производство объемных монокристалллов нитридов металлов, принадлежащих к ЗА группе химических элементов, и нитридов переменного состава на их основе. Сущность изобретения: способ эпитаксиального выращивания монокристалла нитрида по меньшей мере одного металла, принадлежащего к подгруппе "А" третьей группы химических элементов, из паровой фазы включает размещение параллельно друг напротив друга испаряющей поверхности источника металла, задаваемого в составе выращиваемого монокристалла, и ростовой поверхности подложки, образующих ростовую зону, создание в ростовой зоне потока аммиака, нагрев источника и подложки до температур, обеспечивающих рост монокристалла на подложке, поддерживая температуру источника выше температуры подложки. При этом согласно изобретению в качестве материала источника используют смесь, содержащую металлический компонент, включающий по меньшей ...

Способ выращивания нитевидных кристаллов кремния

Изобретение относится к технологии получения полупроводниковых материалов. Способ выращивания нитевидных кристаллов кремния включает подготовку кремниевой пластины путем нанесения на ее поверхность частиц катализатора из двухкомпонентного сплава металл-кремний эвтектического состава с последующим помещением в ростовую печь, нагревом, подачей в газовую фазу водорода и тетрахлорида кремния, осаждением кремния из газовой фазы по схеме пар → жидкая капля → кристалл при температуре, минимально превышающей температуру эвтектики. При этом дополнительно в газовую фазу подают инертный газ, устанавливают постоянное значение соотношения молярных объемов инертного газа и водорода n, где n≥0,01. Катализатор выбирают из золота, платины, палладия и серебра. Обеспечивается получение нитевидных кристаллов кремния постоянного диаметра. 1 ил., 6 пр.

Однофотонный источник излучения

Изобретение относится к области оптических систем связи, а именно, к истинно однофотонным источникам оптического излучения и может быть использовано для создания высокозащищенных систем передачи информации на основе принципа квантовой криптографии и реализации протокола квантового распределения ключа (КРК, QKD) через существующие оптоволоконные сети. Однофотонный источник излучения содержит канал оптической накачки, канал люминесценции, приемный канал и дихроичное зеркало. В канале оптической накачки расположен источник возбуждающего излучения. В канале люминесценции расположены элемент генерации одиночных фотонов на основе алмаза, система увеличения с кратностью М и система сканирования. Дихроичное зеркало обеспечивает возможность направления возбуждающего излучения в канал люминесценции, а генерируемых фотонов - в приемный канал. Элемент генерации выполнен в виде монокристалла алмаза с ростовыми центрами люминесценции концентрации N. В канале оптической накачки и приемном канале установлены ...

СПОСОБ СИНТЕЗА АЛМАЗОВ

Изобретение относится к производству синтетических алмазов и может быть использовано в машиностроения. Способ состоит в том, что алмаз синтезируют из смеси простых газообразных соединений типа CO2 и CH4, CO и C2H2, CH4 и CX4, где X CL, Br, в которых углерод находится в разновалентном состоянии. Процесс ведут на затравку при 200-350°С и давлении 200-2500 ат, достигают упрощения и удешевления процесса за счет существенного снижения температуры и давления.

СПОСОБ ВЫРАЩИВАНИЯ СЛОЕВ АЛМАЗА

... 1. Способ выращивания слоев алмаза на поверхности затравочного кристалла разложением паров углеродсодержащих соединений в потоке водорода, отличающийся тем, что, с целью ускорения процесса и получения монокристаллических слоев, пары углеродсодержащего соединения получают непосредственно в процессе выращивания нагреванием твердого материала, например, графита, расположенного рядом с затравочным кристаллом. 2. Способ по п.1, отличающийся тем, что процесс ведут при нагревании твердого материала до температуры 1500-2500°С, температуре затравочного кристалла 500-1500°С и температурном градиенте между ними 103-107 град/см.

СПОСОБ ВЫРАЩИВАНИЯ КРИСТАЛЛА GaN И КРИСТАЛЛИЧЕСКАЯ ПОДЛОЖКА ИЗ GaN

... 1. Способ выращивания кристалла GaN для выращивания кристалла GaN на GaN-ой затравочной кристаллической подложке, включающий в себя стадии: ! приготовления упомянутой GaN-ой затравочной кристаллической подложки, содержащей первую легирующую примесь, таким образом, что коэффициент теплового расширения упомянутой GaN-ой затравочной кристаллической подложки становится большим, чем коэффициент теплового расширения упомянутого кристалла GaN, и ! выращивания упомянутого кристалла GaN на упомянутой GaN-ой затравочной кристаллической подложке до толщины по меньшей мере 1 мм. ! 2. Способ выращивания кристалла GaN по п.1, в котором упомянутая первая легирующая примесь содержит по меньшей мере один тип элемента, выбранного из группы, состоящей из In, P, Al, As, Sb, O и Si. ! 3. Способ выращивания кристалла GaN по п.2, в котором упомянутая первая легирующая примесь имеет концентрацию по меньшей мере 5·1015 см-3 и не более 5·1019 см-3. ! 4. Способ выращивания кристалла GaN по п.1, в котором на упомянутой ...

СПОСОБ ВЫРАЩИВАНИЯ КРИСТАЛЛОВ НИТРИДОВ МЕТАЛЛОВ III ГРУППЫ

... 1. Способ выращивания кристаллов нитридов металлов III группы из газовой фазы, включающий размещение подложки в рабочей зоне реактора и подачу к поверхности подложки в направлении, противоположном направлению силы тяжести, газовых потоков, каждый из которых содержит, по крайней мере, один химически активный газ и, по крайней мере, один несущий газ, отличающийся тем, что подложку размещают в верхней части реактора над источником металла III группы, устанавливают расходы химически активных газов, удовлетворяющие условию: ! GV/GIII=5÷1000, ! где GV - мольный расход химически активных газов, включающих элемент V группы - азот, ! GIII - мольный расход химически активных газов, содержащих металл III группы, ! смешивают каждый химически активный газ с, по крайней мере, одним несущим газом до получения газовых потоков, общая плотность газовых смесей в которых удовлетворяет соотношению: ! ρIII<ρV, ! где ρIII - плотность газовой смеси, содержащей химически активный газ, !включающий металл III группы ...

Способ получения монокристаллов германия и кремния с заданным содержанием примесей

Hochgradig breitbandige Signalverarbeitungsvorrichtung aus supraleitendem Material, Anwendung auf Mikrowellenschaltung und Verfahren zur Herstellung einer solchen Vorrichtung

Eine sehr breitbandige Signalverarbeitungsvorrichtung ist in Form einer Mikrostreifenleitung verwirklicht, die ein Dielektrikum (3) enthält, welches von zwei Elektroden (1, 2) eingefaßt wird. Die Dicke (H) des Dielektrikums ist kleiner als die Londonsche Eindringtiefe des Magnetfeldes. Wenigstens eine der Elektroden (1, 2) besteht aus einem supraleitenden Material und weist eine Dicke (d) auf, die gleichfalls kleiner als die Londonsche Eindringtiefe (lambdaL) des Magnetfeldes in dem verwendeten Supraleiter ist.

GASPHASEN-EPITAXIEVERFAHREN ZUM AUFWACHSEN VON EISENDOTIERTEN UND AUF INDIUM BASIERENDEN HALBLEITERN DER GRUPPEN III-VN.

VERFAHREN ZUR HERSTELLUNG VON TRIALKYLVERBINDUNGEN VON METALLEN DER GRUPPE 3A

Verfahren zur Gewinnung von reinstem Halbleitermaterial, insbesondere Silicium

MBE of a p-conductive carbon-doped InGaAs layer on an InP substrate

In the molecular beam epitaxial growth (MBE) of a p-conductive InGaAs layer from solid state sources onto an InP substrate with simultaneous carbon doping, the growing layer is also doped with aluminium. An Independent claim is also included for a carbon-doped p-conductive InGaAs layer which is also doped with aluminium from an aluminium source, preferably a source containing organically bonded aluminium (e.g. a gaseous trimethyl aluminium-containing source) or a solid state aluminium-containing source.

Verfahren zum Aufwachsen einer Dünnschicht aus Diamant oder c-BN

VERFAHREN ZUR BESTIMMUNG VON VERUNREINIGUNGSKONZENTRATIONEN IN HOCHREINEN HALOGENSILANEN

VERFAHREN UND VORRICHTUNG ZUM ABSCHEIDEN VON HALBLEITERSCHICHTEN

METALLORGANISCHE ADDUKTVERBINDUNGEN.

PROCESS FOR PRODUCING A SILICON EPITAXIAL LAYER

VORRICHTUNG UND VERFAHREN ZUR DIAMANTHERSTELLUNG

Process for producing pure semiconductor-material layers on semiconductor wafers by deposition from the gas phase

In the process for producing layers of pure semiconductor material on semiconductor wafers, the wafers are aligned, according to the invention, in a row in a plane-parallel fashion one behind the other in an evacuable recipient. A chemical transfer reaction is then started and this transfers the material removed from each wafer to the opposite side of the adjacent wafer and deposits it there. Each wafer consequently acts simultaneously as source and substrate, with the exception of the first and last wafers in the row. Since the material deposited is, therefore, supplied by the wafers themselves, the material requirement is extremely low.

Organische dünne Schicht durch regulierbare Molekularepitaxie.

Verfahren zur Erzeugung einer Dünnschicht mittels Strahlablagerung.

Verfahren zum Ausbilden einer dotierten Verbindungshalbleitereinkristallschicht

DUENNE BESCHICHTUNG AUF BASIS EINES RUTHENIUMSALZES.

VERFAHREN FUER DIE HERSTELLUNG EINES GESINTERTEN HARTMETALLES MIT EINER DIAMANTSCHICHT.

HERSTELLUNGSVERFAHREN EINER NIEDERGESCHLAGENEN SCHICHT.

HERSTELLUNG VON GALLIUMNITRID-SCHICHTEN MITTELS LATERALEM KRISTALLWACHSTUM

Spannungs- und defektfreie fehlangepasste Epitaxialheterostrukturen und deren Herstellungsverfahren.

VERFAHREN UND ANLAGE ZUR HERSTELLUNG VON DIAMANTEN.

Free-standing gallium nitride semiconductor substrate useful in light emitting device, comprises free standing compound semiconductor crystal based on nitride

The free-standing gallium nitride semiconductor substrate useful in light emitting device, comprises free standing compound semiconductor crystal based on nitride, which has a variation of the lattice constant of +-12 ppm. The variation of the lattice constant comprises a variation of the measured a-axis-length and a variation of the total measured lattice constant in the level of an area with exception of a part outwardly reaching from an extreme circumference in a direction of substrate radius of 2 mm. An independent claim is included for a light- emitting device.

Verfahren zur Steuerung des epitaktischen Aufwachsens auf polaren einkristallinen Substraten

VERFAHREN ZUM EPITAKTISCHEN AUFWACHSEN EINER DUENNEN, GUT LEITENDEN HALBLEITERSCHICHT

Production of relaxed semiconductor layer on semiconductor substrate used in production of high frequency circuits comprises roughening surface of substrate by dry etching, and forming semiconductor layer on surface

Production of a relaxed semiconductor layer on a semiconductor substrate comprises preparing the substrate with a surface, roughening the surface of the substrate by dry etching to form a roughened surface, and forming the semiconductor layer on the roughened surface.

VERFAHREN ZUM WACHSENLASSEN VON DIAMANTEN

VERFAHREN ZUR HERSTELLUNG VON POLYSILIZIUM UNTER VERWENDUNG VON EXOTHERMER REAKTIONSWÄRME

Verfahren zur Herstellung einer einkristalliner Schicht

Vorrichtung zum Abscheiden von hochreinem Silicium aus einem hochreinen, eine Siliciumverbindung enthaltenden Reaktionsgas

Tantalamidvorläufer zum Aufbringen von Tantalnitrid auf einem Substrat

VORRICHTUNG ZUR HERSTELLUNG VON EPITAXIESCHICHTEN HOHER REINHEIT UND VARIABLER SCHICHTDICKE

VERFAHREN ZUR HERSTELLUNG EINER EPITAKTISCHEN SCHICHT UND NACH DIESEM VERFAHREN HERGESTELLTE EPITAKTISCHE SCHICHT

VERFAHREN ZUM AUFBRINGEN EINER HALBLEITENDEN VERBINDUNG VON ELEMENTEN DER GRUPPEN III UND V DES PERIODENSYSTEMS

Siliziumkarbid und Verfahren zu seiner Herstellung

Verfahren zur Herstellung eines InGaAsN Halbleiters mit hoher Qualität

Verfahren zum epitaktischen Abscheiden einer kristallinen Schicht, insbesondere aus Halbleitermaterial

Vacuum treatment chamber - with a low voltage discharge with arcing on treatment chamber walls prevented

A process for generating a low voltage discharge between a thermionic cathode (3) in a cathode chamber (1) and an anode (38,36) in a connected vacuum treatment chamber (11) via a diaphragm arrangement. Arc discharge is essentially prevented on the portions (17) of the treatment chamber (11) around the diaphragm by means of a screen (20) operated so as to be electrically floating and maintained at the dark space distance (d( with respect to the treatment chamber portions (17) around the diaphragm. Also claimed is a process in which the cathode chamber and or treatment chamber diaphragm side is provided with a pipe socket to increase its pressure stage effect and a process for igniting and operating a low voltage discharge. A vacuum treatment installation with a treatment chamber (11) and a cathode chamber (1) and a cathode chamber for generating a low voltage discharge are also claimed.

Verfahren zur Herstellung einer unpolaren einkristtrid-Halbleiter

III-V Halbleiter und Verfahren zur seiner Herstellung

III-V Halbleiter, umfassend mindestens ein Substrat, eine Pufferschicht der allgemeinen Formel InuGavAlwN (wobei 0 ≤ u ≤ 1,0 ≤ v ≤ 1,0 ≤ w ≤ 1, u + v + w = 1) und eine III-V Halbleiterkristallschicht der allgemeinen Formel InxGayAlzN (wobei 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ z ≤ 1, x + y + z = 1) in dieser Reihenfolge, wobei die Pufferschicht eine Dicke von 5 Å oder mehr und 90 Å oder weniger aufweist.

Halbleiterlaservorrichtung , optisches Kommunikationssystem unter Verwendung desselben und Herstellungsverfahren

VERFAHREN ZUM EPITAKTISCHEN AUFWACHSEN VON HALBLEITERMATERIAL AUF EINE EINKRISTALLINE HALBLEITERUNTERLAGE

Verfahren zum thermischen Abscheiden von Silizium oder eines anderen halbleitenden Elementes

SYNTHETISCHER DIAMANT MIT HOHER KRISTALLINER QUALITÄT

Hydride vapor phase epitaxy method for producing aluminum gallium indium nitride mono-crystal, used in optoelectronics, particularly for ight-emitting diodes, involves utilizing mixture of aluminum, gallium and indium metals

Hydride vapor phase epitaxy (HVPE) method involves utilizing mixture of aluminum, gallium and indium metals. The metals, are converted with hydrogen compounds of halogens at 500-950[deg] C, into aluminum, gallium and indium-halides. Aluminum, gallium and indium-halide is converted with the hydrogen compounds at a substrate at 850-1200[deg] C, to aluminum gallium indium nitride, and substrate is seperated. Excess reactants and the formed gaseous waste products are discharged.

Verfahren und Vorrichtung zum Abscheiden kristalliner Schichten und auf kristallinen Substraten

The invention relates to a method and device for depositing several crystalline semiconductor layers on at least one semiconductor crystalline substrate. According to said method, gaseous parent substances are introduced into a process chamber (2) of a reactor (1) by means of a gas inlet organ (7), said substances accumulating, optionally after a chemical gas phase and/or surface reaction, on the surface of a semiconductor substrate that is placed on a substrate holder (5) in the process chamber (5), thus forming the semiconductor layer. Said semiconductor layer and the semiconductor substrate form a crystal consisting of either one or several elements from main group V, elements from main groups III and V, or elements from main groups II and VI. In a first process step for depositing a first semiconductor layer, a first process gas consisting of one or several first parent substances is introduced into the process chamber (2), the decomposition products of said gas forming the crystal ...

Chemical vapor deposition reactor having multiple inlets

A chemical vapour deposition reactor has a wafer carrier which cooperates with a chamber of the reactor to facilitate laminar flow of reaction gas within the chamber and a plurality of injectors configured in flow controllable zones so as to mitigate depletion. Each zone can optionally have a dedicated flow controller. Thus, flow through each zone can be individually controllable.

Cvd diamond in wear applications

Epitaxial growth method of III-nitride semiconductors

IMPROVEMENTS RELATING TO POLYCRYSTALLINE FILMS

... 1,253,294. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 13 Jan., 1969 [15 Jan., 1968], No. 1925/69. Heading H1K. [Also in Division C7] A polycrystalline semi-conductor film such as Si is pyrolytically deposited on an electrically insulating surface of a semi-conductor substrate which is maintained at 550-1100‹ C. and then a conductivity determining impurity is diffused into the film. The substrate may be Si with a surface insulating layer of SiO 2 , Al 2 O 3 or Si 3 N 4 and Si is deposited from SiH 4 which may also be mixed With B 2 H 6 , AsH 3 or PH 3 to form a doped Si layer. The layer thickness is preferably 0À1-3 microns and the Si deposition rate is preferably 0À15-5 microns/min. A mask of SiO 2 is then formed on the layer either by oxidation or pyrolysis and etched windows are formed in the SiO 2 . A dopant of opposite conductivity is then diffused into the windows to form PN junctions and by etching techniques isolated insulated islands of PN junctions are formed ...

A method of and apparatus for growing an epitaxial layer of semiconductive material on a surface of a semiconductive substrate

An epitaxial layer of a mixed III-V semiconductor compound is grown on a substrate of a different semi-conductor material by separately passing first and second gaseous Gp. V halides, each mixed with H2, over a heated Gp. III source, mixing together the resulting gas streams, and passing the mixture over the heated substrate. Preferably the Gp. V halides are PCl3 and AsCl3; the Gp. III source is GaP or GaAs respectively, or elemental Ga; and the substrate is GaAs; the product being Ga arsenide-phosphide. The Gp. III source may be heated to 900 DEG C. and the substrate to 800-830 DEG C., and mixing occurs at an intermediate temperature. The composition of the product is varied during deposition by varying the flow rate of the halides, e.g. such that there is more P in the upper layer.

CHEMICAL VAPOUR DEPOSITION APPARATUS AND METHOD

METHOD FOR PRODUCING BUBBLE DOMAINS IN MAGNETIC FILM-SUBSTRATE STRUCTURES

... 1367123 Garnets ROCKWELL INTERNATIONAL CORP 21 Dec 1971 [28 Dec 1970] 59456/71 Heading C1J Bubble domain - containing, film - substrate structures are made by depositing on a substrate an iron garnet film of a single crystal material having a negative magneto-striction constant along a crystallographic axis oriented approximately normal to the plane of the film, in which the substrate has a lattice constant of the iron garnet film by an amount less than 0À016 Š, and in which the coefficient of thermal expansion of the substrate is the same as or lower than that of the film by an amount not more than 1 x 10<-6>/‹ C. Preferably the film is an yttrium iron garnet deposited on mixed yttrium gadolinium gallium garnet by vapour deposition. Long lists of other transition element garnets are mentioned as films and substrates.

EPITAXIAL CRYSTAL-GROWING

... 1433085 Epitaxial growth on non-stable substrates PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 31 Jan 1974 [13 Feb 1973] 04477/74 Heading C1A Vapour phaseepitaxial growth on toa substrate of a. material which is not stable in air, e.g. gallium aluminium arsenide is achieved by epitaxially growing the non-stable material on a support of a monosrystalline material having a suitable crystal structure, reducing the thickness of the support to a very small value, placing the coated thin support into a non-oxidizing atmosphere, removing the remainder of the support by etching and then growing a monoerystalline layer of a material, by epitaxy from the vapour phase on the face of the non-stable material exposed by the etching. In the embodiment a layer of gallium aluminium arsenide is epitaxially deposited on to a support of gallium arsenide. The thickness of the support is reduced to 5 to 15 microns, e.g. by polishing and the coated support thenintroduced into a non- oxidizing atmosphere. The ...

Method for epitaxial growth of compound semiconductor

A method for epitaxial growth of compound semiconductor containing three component elements, two component elements thereof being the same group elements, in which three kinds of compound gases each containing different one of the three component elements are cyclically introudced, under a predetermined pressure for a predetermined period respectively, onto a substrate enclosed in an evacuated crystal growth vessel so that a single crystal thin film of the compound semiconductor is formed on the substrate.

METHOD FOR MANUFACTURING BISMUTH-CONTAINING OXIDE SINGLE CRYSTAL

SINGLE-CRYSTAL DIAMOND OF VERY HIGH THERMAL CONDUCTIVITY

PRECURSORS FOR METAL FLUORIDE DEPOSITION AND USE THEREOF

A method for forming a layer of a Group II or III fluoride on a semiconductor substrate (e.g. as epitaxial insulating layer) comprising vaporizing a precursor (I), where M is Be, Ca, Sr, Ba or lanthanide, b and d are 0 or 1. A, B, C and D are independently (IIA) or (IIB), X being O, S, NR, PR where R is H, alkyl, perfluoroalkyl; Y is perfluoroalkyl, fluoroalkenyl, fluoroalkylamine or fluoroalkenylamine; Z is H, F, alkyl, perfluoroalkyl or perfluoroalkenyl; and then decomposing the precursor vapor to form M fluoride. A preferred precursor for calcium fluoride is calcium 1,1,1,5,5,5-hexafluor-2,4-pentanedione complex where b and d are 0.

Monocrystalline diamond films

A method is presented to manufacture substrates for growing monocrystalline diamond films by chemical vapor deposition (CVD) on large area at low cost. The substrate materials are either Pt or its alloys, which have been subject to a single or multiple cycle of cleaning, roller press, and high temperature annealing processes to make the thickness of the substrate materials to 0.5 mm or less, or most preferably to 0.2 mm or less, so that either (111) crystal surfaces or inclined crystal surfaces with angular deviations within +/-10 degrees from (111), or both, appear on the entire surfaces or at least part of the surfaces of the substrates. The annealing is carried out at a temperature above 800 DEG C. The present invention will make it possible to markedly improve various characteristics of diamond films, and hence put them into practical use.\| ...

3-5 group compound semiconductor and method for preparation thereof

... (1) A 3-5 group compound semiconductor which has a substrate, a buffer layer represented by a general formula: InuGavAlwN, wherein 0 & u, v and w & 1, and u + v + w = 1, formed on the substrate and a crystalline layer of a 3-5 group compound semiconductor represented by a general formula: InxGayAlzN, wherein 0 & x, y and z & 1, and x + y + z = 1, formed on the buffer layer, characterized in that said buffer layer has a film thickness of 5 to 90 Ñ; and (2) a method for preparing the 3-5 group compound semiconductor, characterized in that it comprises an initial step of growing the buffer layer represented by the general formula: InuGavAlwN so as for the layer to have a film thickness of 5 to 90 Ñ at a temperature lower than that for the growth of the crystalline layer of the 3-5 group compound semiconductor and a subsequent step of growing said crystalline layer of the 3-5 group compound semiconductor represented by the general formula: InxGayAlzN.

FIELD EFFECT TRANSISTOR

... 1372610 Semi-conductor devices INTER. NATIONAL BUSINESS MACHINES CORP 21 Nov 1972 [10 Dec 1971] 53667/72 Heading H1K A FET comprises a substrate 1 of Cr doped semi-insulant GaAs produced from a sliced and polished crystal which is infra-red heated in an open tube reactor in a circulating H 2 atmosphere, to which AsCl 3 is added; the gas flowing over a boat containing Ga saturated with As, the substrate being cut parallel to the 111 crystal plane and coated on the side exhibiting more Ga atoms at the surface. An undoped buffer layer is epitaxially deposited thereon, into which physical defects of the interface plane of substrate 1 extend. Therefore, a further highly conductive layer 8 doped with sulphur from H 2 S is epitaxially deposited to suppress the imperfections and provide a channel layer on which ohmic source drain contacts 3, 5 and Schottky gate control 4 are conventionally deposited.

Method and apparatus for preparing group iii-v materials

... 1,148,659. Group III-V compounds. TEXAS INSTRUMENTS Inc. 31 March, 1966 [31 March, 1965], No. 14346/66. Heading C1A. [Also in Division B1] Group III-V compounds are made by mixing Group V hydride with a Group III halide to form a gaseous mixture in a first chamber at a temperature high enough to maintain the halide in a non-reactive state, and passing the. mixture into a second chamber, at least part of which is at a temperature low enough to cause the halide to disproportionate to the Group III element and a different valent form of the halide, - whereby the free Group III element may react with the free Group V element (formed in the thermal decomposition of the hydride). The chambers are preferably vertically arranged, the first chamber being the upper chamber. Preferably a porous member is used to divide the chambers. Compounds having more than one Group III- and/or more than one Group V component may be-made. Examples describe the production of GaAs, GaP, GaAs 0 . 15 P 0 . 85 , GaAs ...

Single crystal diamond

Thick single crystal diamond layer method for making it and gemstones produced from the layer

A layer of single crystal CVD diamond of high quality having a thickness greater than 2 mm. Also provided is a method of producing such a CVD diamond layer. The method involves the homoepitaxial growth of the diamond layer on a low defect density substrate in an atmosphere containing less than 300ppb nitrogen. Gemstones can be manufactured from the layer.

Single crystal CVD synthetic diamond material

3C-SiC based sensor

In a first aspect there is a sensor 1 comprising: a substrate 2; and a 3C-SiC layer 6 which is monocrystalline and supported by the substrate. A method of fabricating a sensor comprises: providing a sensor substrate; and providing a monocrystalline 3C-SiC layer on the substrate, wherein providing the layer comprises forming the layer by: providing a monocrystalline silicon substrate in a cold-wall chemical vapour deposition reactor; heating the substrate to a temperature between 700 and 1200 degrees C; and introducing a gas mixture into the reactor while the substrate is at the temperature, the gas mixture comprising a silicon source precursor, a carbon source precursor, and a carrier gas so as to deposit an epitaxial layer of 3C-SiC on the monocrystalline silicon. In a second aspect there is a sensor comprising: a 3C-SiC substrate; and a Si layer which is monocrystalline and which is supported by the substrate. The sensor may be a pressure sensor or a gas sensor. In a further aspect there ...

Improvements in or relating to the deposition of semi-conductor materials

In coating germanium on to a germanium or other carrier, by the decomposition of a gaseous germanium compound, germanium in powder or massive form rests on a heatable base, and is surrounded by a spacing ring which supports the carrier, and the space between the germanium and the carrier is in free gas exchange with the atmosphere surrounding the spacing ring and the carrier. A gas which reacts with the germanium at elevated temperature and converts it into a gaseous material is introduced and the gas produced decomposes at the surface of the carrier and deposits thereon a layer of germanium. The carrier may be any semiconductor material, e.g. silicon, silicon carbide, AIII BV or AII BVI compounds, and is preferably monocrystalline, and the powdered germanium may be used in the form of a presintered tablet, or the germanium may be in the form of a monocrystalline disc. The spacing ring which is inert under the conditions of the reaction e.g. quartz sintered corundum, silicon carbide, carbon ...

METHOD FOR FORMING N-TYPE SEMICONDUCTING DIAMOND FILMS BY VAPOR PHASE TECHNIQUES

Improvements in or relating to the manufacture of bodies from metals having a high melting-point

... 200,879. Wade, H., (Naamlooze Vennootschap Philips' Gloeilampenfabrieken). March 24, 1922. Annealing; cementation.-Ductile bodies of refractory metals, such as tungsten, molybdenum, or tantalum, are obtained by heating a single crystal of metal in an atmosphere of a volatile and dissociable compound of the refractory metal at a temperature between about 1200‹ and 2400‹ C. the dissociated refractory metal settling on the crystal so that the latter increases in size whilst remaining a single crystal. The body so obtained may then be subjected to mechanical treatment, such as rolling, hammering, or drawing, to obtain the metal in the form of rods. ribbons, wire, or filaments for electric lamps. The original crystal, which may be obtained by any known process, such as that described in Specification 16620/14, instead of being of the same material as the ductile body may be of another metal or alloy isomorphous with the ductile body, in which case the core may afterwards be removed in anv known ...

IMPROVEMENTS IN OR RELATING TO METHODS FOR DEPOSITING MATERIAL UPON HEATED SEMICONDUCTOR CRYSTALS

... 1,269,431. Making semi-conductor devices. SIEMENS A.G. 17 March, 1970 [18 March, 1969], No. 12656/70. Heading H1K. [Also in Division C1] In the deposition of layers of semi-conducting or insulating material from the gas phase on to heated semi-conductor crystals uniform layer thickness is achieved by passing a reaction gas which decomposes thermally to give the deposited material over the surface of the substrate during a first period of time in one direction and then during a second period of time in the opposite direction, the two periods being substantially equal in length and the operating conditions, other than the direction of gas flow, being substantially the same in both. Multiple flow reversals may be effected. Suitable apparatus for the process includes an elongated reaction vessel 3 with a feed pipe at each end, each pipe being connected through valves both to the gas supply 7 and to exhaust, and with means for heating a plurality of substrate wafers I, e.g. an electrically conducting ...

Improvements in or relating to processes and apparatus for the production of ultra-pure substances

... In the deposition of silicon from a silicon compound, e.g. silicon tetrachloride or trichlorosilane, on to an electrically-heated wire 4 of silicon, the wire 4 is heated by an electric current flowing substantially parallel to the longitudinal axis of the wire and the effect of gravity on the wire is at least partially counter-acted by interaction of the electric current and a magnetic field 5. The electric current and the magnetic field may be adjusted during the process to maintain to a desired extent the supporting force for the wire. Preferably the strength of the magnetic field is increased downwardly by using magnets, the pole faces of which are so shaped that the gap between them decreases in a downward direction (Fig. 2, not shown). The current through the wire may have direct and alternating components, the direct current being used for support of the wire and the alternating current for control of the heating. Alternatively two alternating currents of different ...

METHOD OF GROWING EPITAXIAL LAYERS OF SILICON

... 1490665 Epitaxial growth R C A CORPORATION 15 May 1975 [28 May 1974] 20617/75 Heading BIS A method of growing an epitaxial layer of silicon on a surface of a substrate comprises heating the substrate in a furnace, and introducing a mixture of dichlorosilane and hydrogen gas into the furnace in a concentration to react the dichlorosilane with the hydrogen gas to grow an epitaxial layer of silicon on the substrate at a rate of at least 5 Ám/min. Good quality planar deposits of thicknesses in excess of 25Ám can be grown in this way.

CHEMICAL VAPOUR DEPOSITION OF MAGNETIC OXIDE FILMS

Improvements in or relating to methods for producing ultra-pure silicon

... Modification of the process of the parent Specification for the deposition of silicon on a carrier of silicon, wherein the deposition takes place in a glass or quartz vessel at least part of which is transparent and is maintained at a temperature of 300-800 DEG C. throughout the deposition. The vessel is heated to the desired temperature by heat radiated from the carrier alone or together with heat from a surrounding electric furnace. In the former case the vessel may be provided with means for conserving the radiant heat, e.g. the outer surface of the vessel, except for one or more narrow strips, may be roughed, may be coated with aluminium oxide, or may be provided with a mirror coating of silver or gold. Alternatively the vessel may have radiant heatabsorbing foreign bodies, e.g. of gold or molybdenum distributed therein so as to preserve its transparency, or it may be surrounded by a separate reflector. As shown heating is provided solely by the passage of an electric ...

PROCEDURE FOR THE PRODUCTION BIAXIAL OF ORIENTED THIN SECTIONS

PROCEDURE FOR THE PRODUCTION OF A SUBSTRATE IN PARTICULAR FOR THE OPTICS, ELECTRONICS OR OPTOELECTRONICS AND RESULTING SUBSTRATE

GALLIUM NITRIDE MATERIALEN AND PROCEEDING FOR THE PRODUCTION OF LAYERS THESE MATERIALEN

VERFAHREN ZUR HERSTELLUNG VON SILIZIUM

PROCEDURE AND DEVICE FOR THE TREATMENT OF SEMICONDUCTOR SUBSTRATES WITH HYDROXYL RADICALS

DEVICE AND PROCEDURE FOR THE PRODUCTION ONE [...] V NITRIDFILMS

PROCEDURE FOR THE PRODUCTION OF A SUBSTRATE, IN PARTICULAR FUR OPTICAL, ELECTRONIC OR OPTO-ELECTRONIC APPLICATIONS, AND MEANS OF THIS PROCEDURE RECEIVED SUBSTRATE

PROCEDURE FOR THE PRODUCTION OF A FREE STANDING SUBSTRATE FROM MONOCRYSTALLINE SEMICONDUCTOR MATERIAL

Methods for depositing thin films comprising gallium nitride by atomic layer deposition

Atomic layer deposition (ALD) processes for forming thin films comprising GaN are provided. In some embodiments, ALD processes for forming doped GaN thin films are provided. The thin films may find use, for example, in light-emitting diodes.

Semiconductor Device

Provided is a semiconductor device comprising: a GaN crystal substrate defining a principal, (0001) Ga face and defining a matrix, being a majority, polarity-determining domain of the GaN crystal, and inversion domains, being domains in which the polarity in the GaN crystal's [0001] direction is inverted with respect to the matrix, the GaN substrate having a ratio S t /S, of collective area S t cm 2 of inversion domains to the total area S cm 2 of the GaN substrate principal face, of no more than 0.5, with the density along the (0001) Ga face of inversion domains whose surface area is 1 μm 2 or more being D cm −2 ; and an at least single-lamina semiconductor layer on the GaN substrate principal face, the semiconductor layer defining a semiconductor-device principal face; wherein the product S c ×D of the area S c of the semiconductor-device principal face and the inversion domain density D is less than 2.3.

METHOD OF MANUFACTURING GROUP III NITRIDE CRYSTAL

A method of manufacturing a group III nitride crystal according to a first aspect includes: preparing a seed substrate; generating a group III element oxide gas; supplying the group III element oxide gas; supplying a nitrogen element-containing gas; supplying an oxidizing gas containing nitrogen element containing at least one selected from the group consisting of NO gas, NOgas, NO gas, and NOgas; and growing the group III nitride crystal on the seed substrate. 1. A method of manufacturing a group III nitride crystal comprising:preparing a seed substrate;generating a group III element oxide gas;supplying the group III element oxide gas;supplying a nitrogen element-containing gas;{'sub': 2', '2', '2', '4, 'supplying an oxidizing gas containing nitrogen element containing at least one selected from the group consisting of NO gas, NOgas, NO gas, and NOgas; and'}growing the group III nitride crystal on the seed substrate.2. The method of manufacturing a group III nitride crystal according to claim 1 , further comprising:reacting the oxidizing gas containing nitrogen element with a group III element droplet.3. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied at a partial pressure of 7.00×10atm or more and 1.75×10atm or less.4. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied at a partial pressure of 7.60×10atm or more and 1.30×10atm or less.5. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied before the seed substrate reaches a substrate maximum achieving temperature.6. The method of manufacturing a group III nitride crystal according to claim 1 , wherein the oxidizing gas containing nitrogen element is supplied before the seed substrate reaches the substrate temperature of 1050° C. This ...

MULTI-DEPOSITION PROCESS FOR HIGH QUALITY GALLIUM NITRIDE DEVICE MANUFACTURING

A group III-nitride (III-N)-based electronic device includes an engineered substrate, a metalorganic chemical vapor deposition (MOCVD) III-N-based epitaxial layer coupled to the engineered substrate, and a hybrid vapor phase epitaxy (HVPE) III-N-based epitaxial layer coupled to the MOCVD epitaxial layer. 1. A group III-nitride (III-N)-based electronic device comprising:an engineered substrate;a metalorganic chemical vapor deposition (MOCVD) III-N-based epitaxial layer coupled to the engineered substrate; anda hybrid vapor phase epitaxy (HVPE) III-N-based epitaxial layer coupled to the MOCVD epitaxial layer.2. The III-N-based electronic device of further comprising:a second MOCVD III-N-based epitaxial layer coupled to the HVPE III-N-based epitaxial layer; anda second HVPE III-N-based epitaxial layer coupled to the second MOCVD based epitaxial layer.3. The III-N-based electronic device of wherein a combined thickness of the MOCVD III-N-based epitaxial layer and the HVPE III-N-based epitaxial layer is greater than 10 μm.4. The III-N-based electronic device of further comprising a silicon layer disposed between the engineered substrate and the MOCVD III-N-based epitaxial layer.5. The III-N-based electronic device of wherein the silicon layer comprises a single crystal silicon layer.6. The III-N-based electronic device of wherein:the MOCVD III-N-based epitaxial layer comprises at least AlN, GaN, or AlGaN; andthe HVPE III-N-based epitaxial layer comprises at least AlN, GaN, or AlGaN.7. A method of fabricating a epitaxial structure claim 1 , the method comprising:providing an engineered substrate;growing a first epitaxial layer coupled to the engineered substrate using a first deposition process; andgrowing a second epitaxial layer coupled to the first epitaxial layer using a second deposition process.8. The method of further comprising:growing a third epitaxial layer coupled to the second epitaxial layer using the first deposition process; andgrowing a fourth epitaxial ...

SEMICONDUCTOR SUBSTRATE MANUFACTURING METHOD

A semiconductor substrate manufacturing method includes: epitaxially growing a columnar III nitride semiconductor single crystal on a principal place of a circular substrate; removing a hollow cylindrical region at an outer peripheral edge side of the III nitride semiconductor single crystal to leave a solid columnar region at an inside of the hollow cylindrical region of the III nitride semiconductor single crystal; and slicing the solid columnar region after removing the hollow cylindrical region. The hollow cylindrical region is removed such that the shape of the III nitride semiconductor single crystal is always keeps an axial symmetry that a center axis of the III nitride semiconductor single crystal is defined as a symmetric axis. 1. A method for manufacturing a semiconductor substrate , comprising:epitaxially growing a columnar group III nitride semiconductor single crystal on a principal plane of a circular substrate;removing a hollow cylindrical region at an outer peripheral edge side of the group III nitride semiconductor single crystal to leave a solid columnar region at an inside of the hollow cylindrical region of the group III nitride semiconductor single crystal; andslicing the solid columnar region after removing the hollow cylindrical region, wherein the removing of the hollow cylindrical region is carried out such that a shape of the group III nitride semiconductor single crystal always keeps an axial symmetry that a central axis of the semiconductor crystal is defined as a symmetry axis.2. The method according to claim 1 , wherein the hollow cylindrical region comprises a region that has a concentration of an impurity that is different from that in the solid columnar region.3. The method according to claim 1 , wherein the hollow cylindrical region comprises a region formed by a crystal growth using a plane that has a different orientation from an orientation in an upper surface of the solid columnar region as a growth interface in the epitaxial ...

METHOD FOR PRODUCING GaN CRYSTAL

The present invention provides a novel method for producing a GaN crystal, the method including growing GaN from vapor phase on a semi-polar or non-polar GaN surface using GaCl3 and NH3 as raw materials. Provided herein is an invention of a method for producing a GaN crystal, including the steps of: (i) preparing a GaN seed crystal having a non-polar or semi-polar surface whose normal direction forms an angle of 85° or more and less than 170° with a [0001] direction of the GaN seed crystal; and (ii) growing GaN from vapor phase on a surface including the non-polar or semi-polar surface of the GaN seed crystal using GaCl3 and NH3 as raw materials.

METHOD OF MANUFACTURING GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE, GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE, AND BULK CRYSTAL

There is provided a method of manufacturing a group III nitride semiconductor substrate including: a fixing step S of fixing a base substrate, which includes a group III nitride semiconductor layer having a semipolar plane as a main surface, to a susceptor; a first growth step S of forming a first growth layer by growing a group III nitride semiconductor over the main surface of the group III nitride semiconductor layer in a state in which the base substrate is fixed to the susceptor using an HVPE method; a cooling step S of cooling a laminate including the susceptor, the base substrate, and the first growth layer; and a second growth step S of forming a second growth layer by growing a group III nitride semiconductor over the first growth layer in a state in which the base substrate is fixed to the susceptor using the HVPE method. 1. A method of manufacturing a group III nitride semiconductor substrate , comprising:a fixing step of fixing a base substrate, which comprises a group III nitride semiconductor layer having a semipolar plane as a main surface, to a susceptor;a first growth step of forming a first growth layer by growing a group III nitride semiconductor over the main surface of the group III nitride semiconductor layer in a state in which the base substrate is fixed to the susceptor using a hydride vapor phase epitaxy (HVPE) method;a cooling step of cooling a laminate comprising the susceptor, the base substrate, and the first growth layer after the first growth step; anda second growth step of forming a second growth layer by growing a group III nitride semiconductor over the first growth layer in a state in which the base substrate is fixed to the susceptor using the HVPE method after the cooling step.2. The method of manufacturing a group III nitride semiconductor substrate according to claim 1 , further comprising:a separation step of separating a group III nitride semiconductor substrate having at least one of the first growth layer or the second ...

HIGH THERMAL CONDUCTIVITY BORON ARSENIDE FOR THERMAL MANAGEMENT, ELECTRONICS, OPTOELECTRONICS, AND PHOTONICS APPLICATIONS

A device includes: (1) a boron arsenide substrate; and (2) an integrated circuit disposed in or over the boron arsenide substrate. 1. A device comprising:a boron arsenide substrate; andan integrated circuit disposed in or over the boron arsenide substrate.2. The device of claim 1 , wherein the boron arsenide substrate includes single-crystalline boron arsenide.3. The device of claim 2 , wherein the single-crystalline boron arsenide is substantially defect free.4. The device of claim 1 , wherein the boron arsenide substrate has a thermal conductivity of 400 W/m·K or greater at room temperature.5. The device of claim 1 , wherein the boron arsenide substrate has a thermal conductivity of 1000 W/m·K or greater at room temperature.6. The device of claim 1 , wherein the integrated circuit includes boron arsenide.7. A device comprising:an active or passive component;a heat sink; anda thermal interface material disposed between the active or passive component and the heat sink and including boron arsenide that is single-crystalline.8. The device of claim 7 , wherein the boron arsenide is in the form of particles.9. The device of claim 8 , wherein the particles have sizes in a range of 1 nm to 1000 nm claim 8 , or in a range of 1 μm to about 1000 μm.10. The device of claim 8 , wherein the thermal interface material further includes a polymer claim 8 , and the particles are dispersed in the polymer.11. The device of claim 7 , wherein the boron arsenide is substantially defect free.12. The device of claim 7 , wherein the active or passive component includes boron arsenide.13. A method of forming boron arsenide claim 7 , comprising:providing a growth substrate; andexposing the growth substrate to a first precursor including boron, and a second precursor including arsenic to yield epitaxial growth of boron arsenide over the growth substrate.14. The method of claim 13 , wherein the growth substrate includes a boron compound.15. The method of claim 13 , wherein the growth ...

SYSTEM AND METHOD FOR METROLOGY USING MULTIPLE MEASUREMENT TECHNIQUES

Systems and methods for detecting complementary sets of data during a chemical vapor deposition process are disclosed herein. The systems and methods reduce use of limited window space in a chemical vapor deposition reactor, while obtaining useful data for a variety of phases in the epitaxial growth of a structure therein. 1. A device for detecting characteristics of an epitaxially grown structure in a chemical vapor deposition system , the device comprisinga housing;a primary unit configured to detect a first characteristic of the epitaxially grown structure;a secondary unit configured to detect a second characteristic of the epitaxially grown structure, wherein the second characteristic is complementary to the first characteristic,wherein the primary unit and the secondary unit are both arranged in the housing.2. The device of claim 1 , wherein the housing comprises an engagement feature configured to couple to a rail.3. The device of claim 1 , wherein the primary unit is selected from the group consisting of an emissivity-compensated pyrometer claim 1 , a reflectometer claim 1 , and a low temperature emissivity-compensated pyrometer.4. The device of claim 1 , wherein the secondary unit is selected from the group consisting of a deflectometer claim 1 , a spectroscopic reflectometer claim 1 , a pyrometer claim 1 , and an emissivity-compensated pyrometer.5. A system for detecting characteristics of an epitaxially grown structure in a chemical vapor deposition system claim 1 , the system comprising:a chemical vapor deposition reactor having a window;a rail arranged on the chemical vapor deposition system adjacent the window; and a primary unit configured to detect a first characteristic of the epitaxially grown structure through the window; and', 'a secondary unit configured to detect a second characteristic of the epitaxially grown structure through the window, wherein the second characteristic is complementary to the first characteristic., 'a housing coupled to the ...

BUFFER LAYERS HAVING COMPOSITE STRUCTURES

Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction. 1. A method for manufacturing a material stack for semiconductor-based optoelectronic or electronic devices , comprising:providing a substrate;disposing a basis buffer layer of a first material above the substrate; and a first buffer sublayer of the first material, and', 'a second buffer sublayer of a second material disposed above the first buffer sublayer;, 'disposing a plurality of composite buffer layers above the basis buffer layer sequentially along a growth direction from the substrate to a last composite buffer layer of the plurality of composite buffer layers, each composite buffer layer except the last composite buffer layer includingwherein thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.2. The method of claim 1 , wherein thicknesses of the second buffer sublayers of the composite buffer layers increase along the growth direction.3. The method of claim 1 , wherein the basis buffer layer of the first material has a relaxed lattice constant for the first material claim 1 , and the ...

METHOD FOR GROWING GALLIUM NITRIDE BASED ON GRAPHENE AND MAGNETRON SPUTTERED ALUMINIUM NITRIDE

The present invention discloses a method for growing gallium nitride based on graphene and magnetron sputtered aluminum nitride, and a gallium nitride thin film. The method according to an embodiment comprises: spreading graphene over a substrate; magnetron sputtering an aluminum nitrite onto the graphene-coated substrate to obtain a substrate sputtered with aluminum nitrite; placing the substrate sputtered with aluminum nitride into a MOCVD reaction chamber and heat treating the substrate to obtain a heat treated substrate; growing an aluminum nitride transition layer on the heat treated substrate and a first and a second gallium nitride layer having different V-III ratios, respectively. The gallium nitrate thin film according to an embodiment comprises the following structures in order from bottom to top: a substrate (), a graphene layer (), an aluminum nitride nucleation layer () fabricated by using a magnetron sputtering method, an aluminum nitride transition layer () grown by MOCVD, and a first and a second gallium nitrate layer () having different V-III ratios. 120-. (canceled)21. A method for growing gallium nitride , comprising:spreading graphene over a substrate;magnetron sputtering an aluminum nitride onto the graphene-coated substrate, to obtain a substrate sputtered with aluminum nitride;placing the substrate sputtered with aluminum nitride in a metal organic chemical vapor deposition (MOCVD) reaction chamber and heat treating the substrate to obtain the heat-treated substrate; andgrowing a first gallium nitride layer and a second gallium nitride layer on the heat-treated substrate, respectively; wherein VIII ratio of the first gallium nitride layer is different from VIII ratio of the second gallium nitride layer.22. The method of claim 21 , wherein the substrate is any one of a silicon substrate claim 21 , a sapphire substrate claim 21 , and a copper substrate.23. The method according to claim 21 , wherein the substrate is a silicon substrate or a ...

GROUP III NITRIDE BASED HIGH ELECTRON MOBILITY TRANSISTORS

The invention provides a product and a manufacturing process for a high power semiconductor device. The semiconductor device comprises a GaN/AlGaN epilayer structure on an SOI substrate with a thick, uninterrupted GaN layer for use in high-power applications. 1. A semiconductor device prepared by a process comprising:providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate comprises a bulk Si(111) handle substrate;depositing a high pressure group(III)-nitride layer at a pressure in the range of about 200 Torr to about 400 Torr;depositing a low pressure group(III)-nitride layer deposited at a pressure in the range of about 150 Torr to about 190 Torr directly adjacent to the high pressure group(III) nitride layer, the high pressure group(III)-nitride layer and the low pressure group(III)-nitride layer forming a compositionally homogeneous group(III) nitride layer;locating a metal-group(III)-nitride layer between the substrate and the compositionally homogeneous group(III)-nitride layer;locating a metal nitride layer located between the substrate and the metal-group(III)-nitride layer, comprising a low-temperature metal-nitride layer deposited at a temperature in the range of about 900° C. to about 1000° C. and having a thickness in the range of 30 nm to 50 nm, and a high temperature metal-nitride layer directly adjacent to the low-temperature metal-nitride layer, deposited at a temperature in the range of about 1050° C. to about 1075° C. and having a thickness greater than 300 nm;wherein the compositionally homogeneous group (III)-nitride layer has a thickness dimension greater than a thickness dimension of a combination of the metal-nitride layer and the metal-group(III) nitride layer; andwherein the high pressure group(III)-nitride layer of the compositionally homogeneous group (III)-nitride layer is directly adjacent the metal-group(III)-nitride layer.2. The semiconductor device as claimed in claim 1 , wherein the substrate is a silicon-on- ...

DEVICE FOR FORMING DIAMOND FILM ETC. AND METHOD THEREFOR

According to an embodiment of the present invention, there is provided a device for forming at least a diamond film on a surface of a substrate, the device comprising: a container configured to hold a raw material liquid and to place the substrate in the raw material liquid; an electrode part comprising a positive electrode and a negative electrode and configured to generate a plasma in the raw material liquid; a raw material gas supply part and a carrier gas supply part, each of the raw material gas supply part and the carrier gas supply part being connected to the electrode part; and a power source configured to apply a voltage to the electrode part, wherein the power source is a direct current power source, and the electrode part further comprises an adjunctive member, and the adjunctive member is attached to an electrode at a plasma generation region of the electrode part. 1. A device for forming at least a diamond film on a surface of a substrate , the device comprising:a container configured to hold a raw material liquid and to place the substrate in the raw material liquid;an electrode part comprising a positive electrode and a negative electrode and configured to generate a plasma in the raw material liquid;a raw material gas supply part and a carrier gas supply part, each of the raw material gas supply part and the carrier gas supply part being connected to the electrode part; anda power source configured to apply a voltage to the electrode part,wherein the power source is a direct current power source, and the electrode part further comprises an adjunctive member, and the adjunctive member is attached to an electrode at a plasma generation region of the electrode part.2. The device according to claim 1 , wherein the adjunctive member is a melting prevention member for the electrode at the plasma generation region.3. The device according to claim 1 , wherein the adjunctive member is an impurity supply source member at the plasma generation region.4. The ...

METHOD FOR PRINTING WIDE BANDGAP SEMICONDUCTOR MATERIALS

A method for printing a semiconductor material includes depositing a molten metal onto a substrate in an enclosed chamber to form a trace having a maximum height of 15 micrometers, a maximum width of 25 micrometers to 10 millimeters, and/or a thin film having a maximum height of 15 micrometers. The method further includes reacting the molten metal with a gas phase species in the enclosed chamber to form the semiconductor material. 1. A method for printing a semiconductor material , comprising:depositing a molten metal onto a substrate in an enclosed chamber to form a trace having at least one of a maximum height of 15 micrometers or a maximum width of 25 micrometers to 10 millimeters or a thin film having a maximum height of 15 micrometers; andreacting the molten metal with a gas phase species in the enclosed chamber to form the semiconductor material.2. The method of claim 1 , further comprising translating at least one of an injection orifice in the enclosed chamber or the substrate in an x-y plane during the depositing to form the trace of the molten metal on the substrate.3. The method of claim 1 , wherein the molten metal comprises at least one of a molten claim 1 , Group 13 metal or silicon claim 1 , and wherein the molten claim 1 , Group 13 metal comprises at least one of gallium claim 1 , aluminum claim 1 , or indium.4. The method of claim 1 , wherein the gas phase species comprises at least one of a gas phase nitrogen species or a gas phase arsenic species claim 1 , and wherein the gas phase species further comprises at least one of ammonia (NH) claim 1 , hydrazine (NH) claim 1 , diimide (NH) claim 1 , or hydrazoic acid (HN).5. The method of claim 1 , wherein the enclosed chamber further comprises an inert gas claim 1 , and wherein a volume ratio of the inert gas to the gas phase species is 1.25 to 50.6. The method of claim 1 , further comprising adding the gas phase species to the enclosed chamber after the depositing.7. The method of claim 1 , wherein a ...

VAPOR PHASE GROWTH APPARATUS, STORAGE CONTAINER, AND VAPOR PHASE GROWTH METHOD

A vapor phase growth apparatus according to one embodiment includes a reaction chamber, a storage container storing organic metal, a thermostatic bath storing a liquid with a temperature higher than a room temperature and holding the storage container immersed in the liquid, a carrier gas supply path connected to the storage container and supplying a carrier gas to the storage container, an organic-metal-containing gas transportation path connected to the storage container and the reaction chamber, the organic-metal-containing gas transportation path transporting an organic-metal-containing gas to the reaction chamber, the organic-metal-containing gas including the organic metal generated by bubbling or sublimation with the carrier gas, and a diluent gas transportation path connected to the organic-metal-containing gas transportation path at a position below a liquid level of the liquid in the thermostatic bath and transporting a diluent gas for diluting the organic-metal-containing gas. 1. A vapor phase growth apparatus comprising:a reaction chamber;a storage container storing organic metal;a thermostatic bath storing a liquid with a temperature higher than a room temperature and holding the storage container immersed in the liquid;a carrier gas supply path connected to the storage container and supplying a carrier gas to the storage container;an organic-metal-containing gas transportation path connected to the storage container and the reaction chamber, the organic-metal-containing gas transportation path transporting an organic-metal-containing gas to the reaction chamber, the organic-metal-containing gas including the organic metal generated by bubbling or sublimation with the carrier gas; anda diluent gas transportation path connected to the organic-metal-containing gas transportation path at a position below a liquid level of the liquid in the thermostatic bath and transporting a diluent gas for diluting the organic-metal-containing gas.2. The vapor phase ...

DEPOSITION SYSTEMS HAVING ACCESS GATES AT DESIRABLE LOCATIONS, AND RELATED METHODS

Deposition systems include a reaction chamber, and a substrate support structure disposed at least partially within the reaction chamber. The systems further include at least one gas injection device and at least one vacuum device, which together are used to flow process gases through the reaction chamber. The systems also include at least one access gate through which a workpiece substrate may be loaded into the reaction chamber and unloaded out from the reaction chamber. The at least one access gate is located remote from the gas injection device. Methods of depositing semiconductor material may be performed using such deposition systems. Methods of fabricating such deposition systems may include coupling an access gate to a reaction chamber at a location remote from a gas injection device. 1. A method of depositing semiconductor material on a workpiece substrate using a deposition system , comprising:loading a workpiece substrate into a reaction chamber and onto a substrate support structure through at least one access gate;flowing one or more process gases into the reaction chamber through at least one gas injection device located remote from the at least one access gate, the one or more process gases including at least one precursor gas;evacuating one or more process gases out from the reaction chamber through at least one vacuum device located on an opposing side of the substrate support structure from the at least one gas injection device;exposing a surface of the workpiece substrate to the one or more process gases as they flow from the at least one gas injection device to the at least one vacuum device and depositing semiconductor material on the surface of the workpiece substrate; andunloading the workpiece substrate out from the reaction chamber through the at least one access gate.2. The method of claim 1 , further comprising selecting the at least one precursor gas to comprise a group III element precursor gas and a group V element precursor gas.3. The ...

METHOD FOR PRODUCING GaN CRYSTAL

A method for producing a GaN crystal that includes: (i) a seed crystal preparation step of preparing a GaN seed crystal having one or more facets selected from a {10-10} facet and a {10-1-1} facet; and (ii) a growth step of growing GaN from vapor phase on a surface comprising the one or more facets of the GaN seed crystal using GaCland NHas raw materials. 120-. (canceled)21. A method for producing a GaN crystal , the method comprising:(i) a seed crystal preparation step of preparing a GaN seed crystal having one or more facets selected from a {10-10} facet and a {10-1-1} facet; and{'sub': 3', '3, '(ii) a growth step of growing GaN from vapor phase on a surface comprising the one or more facets of the GaN seed crystal using GaCland NHas raw materials.'}22. The method for producing a GaN crystal according to claim 21 , wherein in the GaN seed crystal claim 21 , a ratio of a size in a direction of a c-axis to a size in an arbitrary direction perpendicular to the c-axis is not less than 0.1 and not more than 10.23. The method for producing a GaN crystal according to claim 21 , wherein each of the one or more facets is an as-grown surface.24. The method for producing a GaN crystal according to claim 21 , wherein the GaN seed crystal further has a (000-1) facet.25. The method for producing a GaN crystal according to claim 24 , wherein in the growth step claim 24 , GaN is also grown on the (000-1) facet.26. The method for producing a GaN crystal according to claim 21 , wherein in the growth step claim 21 , GaN is grown on each of the one or more facets at a growth rate of 1 μm/h or more.27. The method for producing a GaN crystal according to claim 26 , wherein the growth rate is 50 μm/h or more.28. The method for producing a GaN crystal according to claim 26 , wherein the growth rate is less than 150 μm/h.29. The method for producing a GaN crystal according to claim 21 , wherein in the growth step claim 21 , GaClis supplied to the GaN seed crystal at a partial pressure of ...

GROUP III NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF

A manufacturing method allows growth of a group III nitride semiconductor layer on a Si substrate with an AlN buffer layer interposed between same, so as to suppress group III material from diffusing into the Si substrate. The group III nitride semiconductor substrate manufacturing method includes: a step of forming an AlN coating on the inside of a furnace; steps of installing an Si substrate in the furnace covered with the AlN coating and forming an AlN buffer layer on the Si substrate; and a step of forming a group III nitride semiconductor layer on the AN buffer layer. 1. A group III nitride semiconductor substrate manufacturing method comprising:forming an AlN coating inside a furnace;installing an Si substrate in the furnace whose inside is covered with the AlN coating and forming an AlN buffer layer on the Si substrate; andforming a group III nitride semiconductor layer on the AlN buffer layer.2. The group III nitride semiconductor substrate manufacturing method according to claim 1 , whereinthe formation temperature of the AlN coating is 1000° C. to 1400° C.3. The group III nitride semiconductor substrate manufacturing method according to claim 1 , wherein formation time of the AlN coating is 1 min to 30 min.4. The group III nitride semiconductor substrate manufacturing method according to claim 1 , wherein the step of forming the AlN coating introduces an Al raw material and an N raw material alternately and repeatedly into the furnace.5. The group III nitride semiconductor substrate manufacturing method according to claim 4 , wherein a per unit time for instruction of each of the Al raw material and the N raw material is 0.5 sec to 10 sec.6. The group III nitride semiconductor substrate manufacturing method according to claim 4 , wherein the number of repetitions is 5 to 200.7. The group III nitride semiconductor substrate manufacturing method according to further comprising cleaning the inside of the furnace under a hydrogen-containing atmosphere before ...

NUCLEATION OF ALUMINUM NITRIDE ON A SILICON SUBSTRATE USING AN AMMONIA PREFLOW

A silicon wafer used in manufacturing crystalline GaN for light emitting diodes (LEDs) includes a silicon substrate, a buffer layer of aluminum nitride (AlN) and an upper layer of GaN. The silicon wafer has a diameter of at least 200 millimeters and an Si(111)1×1 surface. The AlN buffer layer overlies the Si(111) surface. The GaN upper layer is disposed above the buffer layer. Across the entire wafer substantially no aluminum atoms of the AlN are present in a bottom most plane of atoms of the AlN, and across the entire wafer substantially only nitrogen atoms of the AlN are present in the bottom most plane of atoms of the AlN. A method of making the AlN buffer layer includes preflowing a first amount of ammonia equaling less than 0.01% by volume of hydrogen flowing through a chamber before flowing trimethylaluminum and then a subsequent amount of ammonia through the chamber. 120-. (canceled)21. A method , performed in sequential order of manufacturing a semiconductor devise , the method comprising:first step, providing a silicon substrate in a chamber;second step, cleaning a surface of the silicon substrate with a flow of hydrogen in the chamber;third step, flowing a first amount of ammonia in the chamber while the hydrogen is still flowing into the chamber, wherein the first amount of ammonia forms nitrogen-silicon bonds at the surface of the silicon substrate;fourth step, flowing a first amount of trimethylaluminum (Ah(CH3)6) into the chamber while the hydrogen is still flowing into the chamber; andfifth step, flowing a second amount of ammonia into the chamber, wherein the second amount of ammonia is greater than the first amount of ammonia by volume, and an initial AlN nuclear layer grows on the silicon substrate.22. The method of further comprising:sixth step, flowing a second amount of trimethylaluminum (Ah(CH3)6) into the chamber while the hydrogen is still flowing into the chamber, wherein the second amount of trimethylaluminum (Ah(CH3)6) is greater than the ...

METHODS FOR FORMING NANOWIRE PHOTONIC DEVICES ON A FLEXIBLE POLYCRYSTALLINE SUBSTRATE

An example method of forming a photonic device is described herein. The method can include providing a flexible polycrystalline substrate, and growing a nanowire heterostructure on the flexible polycrystalline substrate. Optionally, the method can further include fabricating a light emitting diode (LED), a photodiode, a laser, a solar cell, or a photocatalytic water splitter with the nanowire heterostructure. 1. A method of forming a photonic device , comprising:providing a flexible polycrystalline substrate; andgrowing a nanowire heterostructure on the flexible polycrystalline substrate.2. The method of claim 1 , wherein the nanowire heterostructure comprises a plurality of layers having different compositions.3. The method of claim 1 , wherein a diameter of the nanowire heterostructure is less than a grain size of the flexible polycrystalline substrate.4. The method of claim 1 , wherein a diameter of the nanowire heterostructure is greater than or equal to a grain size of the flexible polycrystalline substrate.5. The method of claim 1 , wherein the nanowire heterostructure has an epitaxial relationship with the flexible polycrystalline substrate.6. The method of claim 5 , wherein the nanowire heterostructure is tilted with respect to a surface of the flexible polycrystalline substrate.7. The method of claim 1 , wherein the nanowire heterostructure is latticed mismatched with respect to the flexible polycrystalline substrate without dislocation formation.8. The method of claim 1 , wherein the nanowire heterostructure comprises a single crystalline material.9. The method of claim 1 , wherein the nanowire heterostructure comprises a III-Nitride material.10. (canceled)11. The method of claim 1 , wherein the nanowire heterostructure is grown using a metal organic chemical vapor phase deposition (MOCVD) process.12. The method of claim 1 , wherein the nanowire heterostructure is grown using a molecular beam epitaxy (MBE) process.13. The method of claim 12 , wherein ...

METHOD FOR PRINTING WIDE BANDGAP SEMICONDUCTOR MATERIALS

A method for printing a semiconductor material includes depositing a molten metal onto a substrate in an enclosed chamber to form a trace having a maximum height of 15 micrometers and/or a maximum width of 25 micrometers to 10 millimeters and/or a thin film having a maximum height of 15 micrometers. The method further includes reacting the molten metal with a gas phase species in the enclosed chamber to form the semiconductor material. The depositing the molten metal includes depositing a metal composition including the molten metal and an etchant or depositing the etchant separate from the molten metal in the enclosed chamber. 1. A method for printing a semiconductor material , the method comprising:depositing a molten metal onto a substrate in an enclosed chamber to form a trace having at least one of a maximum height of 15 micrometers or a maximum width of 25 micrometers to 10 millimeters or a thin film having a maximum height of 15 micrometers; andreacting the molten metal with a gas phase species in the enclosed chamber to form the semiconductor material,wherein the depositing the molten metal comprises depositing a metal composition comprising the molten metal and an etchant or wherein the method further comprises depositing the etchant separate from the molten metal in the enclosed chamber.2. The method of claim 1 , wherein depositing comprises depositing the metal composition.3. The method of claim 1 , wherein the etchant is in an aqueous form and comprises 1 to 10 wt % of the etchant based on a total weight of the etchant and water.4. The method of claim 1 , wherein the etchant comprises NHOH or an aqueous NHOH solution.5. The method of claim 1 , wherein the method comprises depositing the etchant separate from the molten metal via a secondary injection orifice.6. An apparatus comprising:an enclosed chamber;an injection orifice that traverses a top flange of the enclosed chamber through a gastight seal, wherein the injection orifice is in fluid ...

VAPOR PHASE GROWTH METHOD

Provided is a vapor phase growth method according to an embodiment including loading a first substrate into a reaction chamber, generating a first mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas, and forming a first indium aluminum nitride film on the first substrate by supplying the first mixed gas into the reaction chamber, the first substrate being rotated at a first rotation speed of 300 rpm or more. 1. A vapor phase growth method comprising:loading a first substrate into a reaction chamber;generating a first mixed gas by mixing at least a gallium containing gas and a nitrogen-compound containing gas;forming a first gallium-containing nitride film after the loading the first substrate by supplying the first mixed gas from a shower plate provided above the reaction chamber, a first surface of the first substrate and the shower plate being separated by 3 cm or more, the first substrate being rotated at a first rotation speed of 300 rpm or more;generating a second mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas; andforming a first indium aluminum nitride film after the forming the first gallium-containing nitride film by supplying the second mixed gas from the shower plate, the first substrate being rotated at a second rotation speed of 300 rpm or more, and the forming the first indium aluminum nitride film being continuously conducted without unloading the first substrate from the reaction chamber after the forming the first gallium-containing nitride film.2. The vapor phase growth method according to claim 1 , wherein the reaction chamber is a reaction chamber for single wafer processing claim 1 , and a rotation of the first substrate is self-rotation.3. (canceled)4. The vapor phase growth method according to claim 1 , wherein the second rotation speed is higher than the first rotation speed.5. The vapor phase growth method according ...

VAPOR PHASE GROWTH METHOD

Provided is a vapor phase growth method according to an embodiment including loading a first substrate into a reaction chamber, generating a first mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas, and forming a first indium aluminum nitride film on the first substrate by supplying the first mixed gas into the reaction chamber, the first substrate being rotated at a first rotation speed of 300 rpm or more. 1. A vapor phase growth method comprising:loading a first substrate into a reaction chamber;generating a first mixed gas by mixing an indium containing gas, an aluminum containing gas, and a nitrogen compound containing gas; andforming a first indium aluminum nitride film on the first substrate by supplying the first mixed gas into the reaction chamber, the first substrate being rotated at a first rotation speed of 300 rpm or more.2. The vapor phase growth method according to claim 1 , wherein the reaction chamber is a reaction chamber for single wafer processing claim 1 , and a rotation of the first substrate is self-rotation.3. The vapor phase growth method according to claim 1 , further comprising:generating a second mixed gas by mixing at least a gallium containing gas and a nitrogen-compound containing gas; andforming a first gallium-containing nitride film on the first substrate by supplying the second mixed gas into the reaction chamber, the first substrate being rotated at a second rotation speed of 300 rpm or more;wherein the forming the first indium aluminum nitride film is continuously conducted without unloading the first substrate from the reaction chamber after the forming the first gallium-containing nitride film.4. The vapor phase growth method according to claim 3 , wherein the first rotation speed is higher than the second rotation speed.5. The vapor phase growth method according to claim 3 , further comprising:forming an aluminum nitride film or an aluminum gallium nitride film ...

VAPOR PHASE GROWTH APPARATUS AND VAPOR PHASE GROWTH METHOD

A vapor phase growth apparatus includes: a reaction chamber; a support provided in the reaction chamber, the support on which a substrate can be placed; a first gas supply passage supplying first gas including ammonia; a second gas supply passage supplying second gas including metal-organic gas; a purge gas supply passage supplying purge gas including ammonia and at least one selected from nitrogen, hydrogen, and inert gas; and a shower head including first region and second region provided around the first region, process gas ejection holes provided in the first region, connected to the first gas supply passage and second gas supply passage and through which the first gas and second gas are supplied into the reaction chamber, a purge gas ejection hole provided in the second region, connected to the purge gas supply passage and through which purge gas is supplied into the reaction chamber. 1. A vapor phase growth apparatus comprising:a reaction chamber;a support provided in the reaction chamber, the support on which a substrate can be placed;a first gas supply passage supplying first gas including ammonia;a second gas supply passage supplying second gas including metal-organic gas;a purge gas supply passage supplying purge gas including ammonia and at least one selected from nitrogen, hydrogen, and inert gas; anda shower head including first region and second region provided around the first region, process gas ejection holes provided in the first region, connected to the first gas supply passage and second gas supply passage and through which the first gas and second gas are supplied into the reaction chamber, a purge gas ejection hole provided in the second region, connected to the purge gas supply passage and through which purge gas is supplied into the reaction chamber.2. The vapor phase growth apparatus according to claim 1 , wherein the process gas ejection holes include first gas ejection hole and second gas ejection hole claim 1 , the first gas ejection hole ...

Method of growing nitride single crystal and method of manufacturing nitride semiconductor device

A method of growing a Group-III nitride crystal includes forming a buffer layer on a silicon substrate and growing a Group-III nitride crystal on the buffer layer. The method of growing of a Group-III nitride crystal is executed through metal-organic chemical vapor deposition (MOCVD) during which a Group-III metal source and a nitrogen source gas are provided. The nitrogen source gas includes hydrogen (H 2 ) and at least one of ammonia (NH 3 ) and nitrogen (N 2 ). At least a partial stage of the operation of growing the Group-III nitride crystal can be executed under conditions in which a volume fraction of hydrogen in the nitrogen source gas ranges from 20% to 40% and a temperature of the silicon substrate ranges from 950° C. to 1040° C.

METHOD FOR PRODUCING GROUP III ELEMENT NITRIDE CRYSTAL, GROUP III ELEMENT NITRIDE CRYSTAL, SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND GROUP III ELEMENT NITRIDE CRYSTAL PRODUCTION DEVICE

To provide a method for producing a Group III element nitride crystal by growing it on a plane on the −c-plane side as a crystal growth plane. The present invention is a method for producing a Group III element nitride crystal, including a vapor phase growth step of growing a Group III element nitride crystal on a crystal growth plane of a Group III element nitride seed crystal by vapor deposition. The vapor phase growth step is a step of causing a Group III metal, an oxidant, and a nitrogen-containing gas to react with one another to grow the Group III element nitride crystal or includes: a reduced product gas generation step of causing a Group III element oxide and a reducing gas to react with each other to generate a gas of a reduced product of the Group III element oxide; and a crystal generation step of causing the gas of the reduced product and a nitrogen-containing gas to react with each other to generate the Group III element nitride crystal . The crystal growth plane is a plane on the −c-plane side. A crystal growth temperature is 1200° C. or more. In the vapor phase growth step, the Group III element nitride crystal is grown in an approximately −c direction. 1. A method for producing a Group III element nitride crystal , the method comprising:a vapor phase growth step of growing a Group III element nitride crystal on a crystal growth plane of a Group III element nitride seed crystal by vapor deposition, whereinthe vapor phase growth step is a step of causing a Group III metal, an oxidant, and a nitrogen-containing gas to react with one another to grow the Group III element nitride crystal, or a reduced product gas generation step of causing a Group III element oxide and a reducing gas to react with each other to generate a gas of a reduced product of the Group III element oxide; and', 'a crystal generation step of causing the gas of the reduced product and a nitrogen-containing gas to react with each other to generate the Group III element nitride crystal ...

GROUP III NITRIDE SEMICONDUCTOR, AND METHOD FOR PRODUCING SAME

On an RAMOsubstrate containing a single crystal represented by the general formula RAMO(wherein R represents one or a plurality of trivalent elements selected from a group of elements including: Sc, In, Y, and a lanthanoid element, A represents one or a plurality of trivalent elements selected from a group of elements including: Fe(III), Ga, and Al, and M represents one or a plurality of divalent elements selected from a group of elements including: Mg, Mn, Fe(II), Co, Cu, Zn, and Cd), a buffer layer containing a nitride of In and a Group III element except for In is formed, and a Group III nitride crystal is formed on the buffer layer. 1. A Group III nitride semiconductor comprising:{'sub': 4', '4, 'a RAMOsubstrate containing a single crystal represented by the general formula RAMO(wherein R represents one or a plurality of trivalent elements selected from a group of elements including: Sc, In, Y, and a lanthanoid element, A represents one or a plurality of trivalent elements selected from a group of elements including: Fe(III), Ga, and Al, and M represents one or a plurality of divalent elements selected from a group of elements including: Mg, Mn, Fe(II), Co, Cu, Zn, and Cd);'}{'sub': '4', 'a buffer layer disposed on the RAMOsubstrate, the buffer layer containing a nitride of In and a Group III element except for In; and'}a Group III nitride crystal disposed on the buffer layer.2. The Group III nitride semiconductor according to claim 1 , whereinthe buffer layer contains In in an amount of 0.5% by atom or more and 50% by atom or less.3. The Group III nitride semiconductor according to claim 1 , whereinin the general formula, R is Sc, A is Al, and M is Mg.4. The Group III nitride semiconductor according to claim 1 , whereinthe buffer layer further contains Al.5. The Group III nitride semiconductor according to claim 1 , whereinthe Group III nitride crystal is GaN.6. The Group III nitride semiconductor according to claim 1 , whereinthe buffer layer has a thickness ...

METHODS AND APPARATUS FOR GALLIUM NITRIDE DEPOSITION

Embodiment disclosed herein include a liner assembly, comprising an injector plate liner, a gas injector liner coupled to the injector plate liner, an upper process gas liner coupled to the gas injector liner, a lower process gas liner coupled to the upper process gas liner, and an injector plate positioned between the injector plate liner and the upper process gas liner, wherein a cooling fluid channel is formed in the injector plate adjacent to the gas injector liner. 1. A liner assembly , comprising:an injector plate liner;a gas injector liner coupled to the injector plate liner;an upper process gas liner coupled to the gas injector liner;a lower process gas liner coupled to the upper process gas liner; andan injector plate positioned between the injector plate liner and the upper process gas liner, wherein a cooling fluid channel is formed in the injector plate adjacent to the gas injector liner.2. The liner assembly of claim 1 , further comprising a baseplate ring positioned between the injector plate and the lower process gas liner.3. The liner assembly of claim 2 , wherein the cooling fluid channel is a first cooling fluid channel and a second cooling fluid channel is formed in the baseplate ring.4. The liner assembly of claim 1 , wherein a plurality of purge gas flow paths are formed in the liner assembly.5. The liner assembly of claim 1 , further comprising a liner cover positioned over the gas injector liner.6. The liner assembly of claim 1 , further comprising an inject baffle positioned between the upper process gas liner and the lower process gas liner.7. The liner assembly of claim 6 , wherein the inject baffle is in fluid communication with a plurality of gas injection ports.8. The liner assembly of claim 7 , wherein each of the plurality of gas injection ports are lined with a metallic insert.9. The liner assembly of claim 1 , wherein the injector plate liner couples to an optically transparent divider.10. A process chamber claim 1 , comprising:an ...

Methods for depositing thin films comprising indium nitride by atomic layer deposition

Atomic layer deposition (ALD) processes for forming thin films comprising InN are provided. The thin films may find use, for example, in light-emitting diodes.

Gaseous formation of thick III-V semiconductor layers on non-III-V substrate, especially silicon, comprises deposition of thin intermediate layer between two III-V layers

Between two III-V layers a thin intermediate layer is deposited at a reduced temperature of growth. An independent claim is included for the corresponding method.

Method for manufacturing superlattice semiconductor structure using chemical vapor deposition process

우수한 계면 특성과 균일성을 구현할 수 있는 초격자 반도체 구조의 제조 방법을 제공한다. 본 발명에 따른 초격자 반도체 구조는, 공정 챔버 내의 서셉터 상에 기판을 탑재하는 단계와; 상기 공정 챔버 내의 상기 서셉터 상의 서로 다른 영역에 제1 소스와 제2 소스가스를 동시에 공급하여, 서로 분리된 제1 소스가스 영역과 제2 소스가스 영역을 형성하는 단계와; 상기 서셉터의 회전에 의해 상기 기판이 공전하는 동안에, 상기 기판이 상기 제1 소스가스 영역과 상기 제2 소스가스 영역을 통과하는 단계를 포함한다. Provided is a method of manufacturing a superlattice semiconductor structure capable of realizing excellent interfacial properties and uniformity. The superlattice semiconductor structure according to the present invention includes the steps of mounting a substrate on a susceptor in a process chamber; Simultaneously supplying a first source and a second source gas to different regions on the susceptor in the process chamber to form a first source gas region and a second source gas region separated from each other; While the substrate is idle by rotation of the susceptor, passing the substrate through the first source gas region and the second source gas region. 초격자, 유기금속 화학기상증착, MOCVD, 화합물 반도체 Superlattice, Organometallic Chemical Vapor Deposition, MOCVD, Compound Semiconductor

유기갈륨 화합물, 이의 제조 방법 및 이를 이용한 질화갈륨 박막의 제조 방법

본 발명은 금속 갈륨에 히드라진 계열의 리간드가 결합된 하기 화학식 1로 표현되는 유기갈륨 화합물에 관한 것으로, 본 발명에 따르는 유기갈륨 화합물을 이용하여 간단한 방법으로 경제적으로 육방형 질화갈륨 박막을 제조할 수 있다: R 2 (N 3 )Ga(R'HNNR'H) 상기 식에서, R, R' 및 R'은 각각 수소 또는 탄소 원자 1 내지 5 개를 포함하는 알킬 기이다.

Nitride based semiconductor device and method for manufacturing the same

보다 단순한 공정으로 실리콘 기판 위에 GaN층을 용이하게 형성시킬 수 있고 크랙 발생을 충분히 억제할 수 있는 질화물계 반도체 장치의 제조 방법 및 이에 의한 질화물계 반도체 장치를 개시한다. 본 발명에 따른 질화물계 반도체 장치의 제조 방법은, 기판 상에 고온 AlN 단결정층을 성장시키는 단계와; 상기 AlN 단결정층 상에 300 Torr 이상인 제1 압력에서 지배적인 성장 방향이 측방향이 되도록 제1 Ⅴ/Ⅲ비로 제1 GaN층을 성장시키는 단계와; 상기 제1 GaN층 상에 상기 제1 압력보다 낮은 제2 압력에서 상기 제1 Ⅴ/Ⅲ비보다 낮은 제2 Ⅴ/Ⅲ비로 제2 GaN층을 성장시키는 단계를 포함한다. A method of manufacturing a nitride-based semiconductor device capable of easily forming a GaN layer on a silicon substrate in a simpler process and sufficiently suppressing the occurrence of cracks, and a nitride-based semiconductor device thereby. A method of manufacturing a nitride based semiconductor device according to the present invention includes the steps of growing a high temperature AlN single crystal layer on a substrate; Growing a first GaN layer on the AlN single crystal layer at a first V / III ratio such that the dominant growth direction is laterally at a first pressure of 300 Torr or more; Growing a second GaN layer on the first GaN layer at a second V / III ratio lower than the first V / III ratio at a second pressure lower than the first pressure. 질화물계 반도체 장치, Si 기판, GaN Nitride-based semiconductor devices, Si substrates, GaN

Fabricating method for gallium nitride wafer

본 발명은 질화갈륨층 성장시 발생하는 휨을 줄이고 크랙이 없는 질화갈륨 기판을 얻을 수 있도록 질화갈륨층과 베이스 기판 사이에 복수의 보이드(void)를 갖는 질화물 삽입층을 형성하는 것이다. 이를 위해 본 발명의 질화갈륨층 제조방법은 베이스 기판을 준비하는 단계와, 베이스 기판 상에 복수의 In 집중 영역을 갖는 질화물 삽입층을 제1성장온도로 성장시키는 단계와, 질화물 삽입층 상에 제1성장온도보다 높은 제2성장온도로 질화갈륨층을 성장시키고, 제2성장에 의해 In 집중 영역에서 금속화가 일어나게 하여 다수의 보이드(void)를 형성하는 단계를 포함하여 구성된다. The present invention is to form a nitride insertion layer having a plurality of voids between the gallium nitride layer and the base substrate to reduce the warpage generated during the growth of the gallium nitride layer and to obtain a crack-free gallium nitride substrate. To this end, the gallium nitride layer manufacturing method of the present invention comprises the steps of preparing a base substrate, growing a nitride insertion layer having a plurality of In concentration regions on the base substrate at a first growth temperature, and And growing a gallium nitride layer at a second growth temperature higher than the first growth temperature and causing metallization in the In concentration region by the second growth to form a plurality of voids. 질화갈륨, 반도체소자, 웨이퍼 Gallium Nitride, Semiconductor Device, Wafer

Method for fabricating a GaN film

본 발명은 호모에피택시 청색 레이저 다이오드나 전자 소자 등에 사용되는 고품질의 GaN 막을 고속으로 성장시킬 수 있는 GaN 막 제조 방법을 기재한다. 본 발명에 따른 GaN 막 제조 방법은, 사파이어 기판을 1차 질소화(1st nitridation)한 후 그 위에 GaN 막을 성장시키는 종래의 방법과는 다르게, 성장전 사파이어 기판을 반응기 내에서 1차 질소화(1st nitridation)한 후 NH 3 +HCl 혼합 가스에 의한 표면처리를 실시한 다음 추가 질소화(nitridation)를 실시하여 GaN막을 성장시킴으로써, 표면 거칠기가 작아져 거울 표면과 같은 표면을 갖는 GaN막을 얻는다. The present invention describes a GaN film production method capable of growing a high quality GaN film used for a homoepitaxial blue laser diode or an electronic device at high speed. The GaN film production method according to the present invention is different from the conventional method in which a first nitridation of a sapphire substrate and then a GaN film is grown thereon. After nitridation, the surface is treated with NH 3 + HCl mixed gas, followed by further nitrification to grow the GaN film, whereby the surface roughness is reduced to obtain a GaN film having the same surface as the mirror surface.

Preparation of single crystalline gallium nitride thick film

본 발명은 수소화물 기상성장법(HVPE)을 이용한 질화갈륨(GaN) 단결정 후막(thick film), 특히 c면({0001}면) GaN 단결정 후막의 제조방법에 관한 것으로, 염화수소 및 암모니아 기체를 공급하면서 기판상에 GaN 막을 성장시켜 크랙이 유도된 기판과 GaN 막의 적층체를 얻은 후 상기 적층체 위에 GaN 후막을 성장시키는 본 발명에 따르면, 기존 GaN 후막 두께보다 2배 이상 두껍게 성장되어도 휨과 크랙이 거의 없는 GaN 후막을 경제적이고 재현성 있게 제조할 수 있으며, 이러한 방법으로 제조된 고품질의 GaN 단결정 후막은 반도체 소자용 기판으로서 매우 유용하게 사용될 수 있다. The present invention relates to a method for producing a gallium nitride (GaN) single crystal thick film, particularly a c plane ({0001} plane) GaN single crystal thick film using hydride vapor phase growth (HVPE), and supplies hydrogen chloride and ammonia gas. According to the present invention, a GaN film is grown on a substrate to obtain a crack-induced laminate of a substrate and a GaN film, and then a GaN thick film is grown on the laminate, even if it is grown at least twice as thick as a conventional GaN thick film. Almost no GaN thick film can be produced economically and reproducibly, and the high quality GaN single crystal thick film produced by this method can be very usefully used as a substrate for semiconductor devices.

Method for extending GaN layer on sapphire

本发明公开了一种在蓝宝石上外延GaN层的方法，属于半导体技术领域。包括步骤1：对蓝宝石衬底进行预处理腐蚀，步骤2：在蓝宝石衬底上用化学气相沉积法(CVD)生长MoS 2 缓冲层，采用MoO 3 作为钼源，硫粉作为硫源；步骤3：利用NH 3 为氮源，TMGa为镓源，进行金属有机物化学气相沉积(MOCVD)，在MoS 2 缓冲层上生长二维GaN薄膜；步骤4：利用AFM和PL表征GaN外延层。本发明采取强酸强碱并提高腐蚀温度的方法对蓝宝石衬底进行加工，以实现GaN薄膜的横向外延生长机制，同时选用与GaN晶格匹配的MoS 2 薄膜作为缓冲层，使得生长出低位错密度、无裂纹、原子级光滑表面具有外延层GaN。

Method of producing self-supporting substrates comprising ⅲ-nitrides by means of heteroepitaxy on a sacrificial layer

본 발명은 Ⅲ족 질화물을 포함하는 자립 기판의 생산 방법에 관한 것이다. 좀더 구체적으로 본 발명은 출발 기판을 이용하여 에피택시의 방법으로 얻어지는 Ⅲ족 질화물 특히, 질화갈륨(GaN)을 포함하는 자립 기판을 제조하는 방법에 관한 것이다. 본 발명은 Ⅲ족 질화물 에피택시 단계 동안에 자발적으로 증발하도록 의도되는 희생층으로 단결정의 규소계 중간층의 증착 단계를 포함하는 것을 특징으로 한다. 본 발명의 방법은 예를 들어 2 " 초과의 지름을 갖는 평평한 Ⅲ족 질화물 자립 층을 제조하는데 이용할 수 있다. The present invention relates to a method for producing a freestanding substrate comprising a group III nitride. More specifically, the present invention relates to a method for producing a self-supporting substrate comprising a group III nitride, in particular gallium nitride (GaN), obtained by the method of epitaxy using a starting substrate. The present invention is characterized by the step of depositing a single crystal silicon-based intermediate layer into a sacrificial layer intended to spontaneously evaporate during a group III nitride epitaxy step. The method of the present invention can be used, for example, to produce a flat Group III nitride freestanding layer having a diameter greater than 2 ".

Vapor growth apparatus and vapor growth method

실시예의 기상 성장 장치는, 반응실과, 제1 유기 금속을 저류하는 제1 저류 용기와, 주캐리어 가스가 공급되고, 반응실로 제1 유기 금속을 포함하는 소스 가스를 공급하는 소스 가스 공급로와, 수조 내의 온도가 수조 밖의 온도보다 높게 설정되고, 제1 저류 용기를 저장하는 항온조와, 제1 저류 용기로 제1 캐리어 가스를 공급하는 제1 캐리어 가스 공급로와, 소스 가스 공급로에 항온조 밖에서 접속되고, 제1 저류 용기에서의 버블링 또는 승화에 의해 생성되는 제1 유기 금속을 포함하는 제1 유기 금속 함유 가스를 수송하는 제1 유기 금속 함유 가스 수송로와, 제1 유기 금속 함유 가스 수송로에 항온조 내에서 접속되고, 희석 가스를 수송하는 희석 가스 수송로를 구비한다. The vapor phase growth apparatus of the embodiment includes a reaction chamber, a first storage vessel for storing the first organic metal, a source gas supply path for supplying a source gas containing a first organic metal to the reaction chamber, A first carrier gas supply path for supplying a first carrier gas to the first storage container; and a second carrier gas supply path for supplying a source gas supply path from outside the thermostat to the first reservoir container, wherein the temperature in the reservoir is set to be higher than the temperature outside the reservoir, Containing gas transport line for transporting a first organometallic-containing gas comprising a first organometallic generated by bubbling or sublimation in a first storage vessel and a second organometallic-containing gas transport line for transporting a first organometallic- And a dilution gas transport line connected to the dilution gas transport line and transporting the dilution gas.

III-N substrate manufacturing method

Manufacturing method of nitride semiconductor device

Affords a manufacturing method enabling nitride-based semiconductor devices containing epitaxial films excelling in flatness and crystallinity to be easily produced, and makes available nitride-based semiconductor devices manufactured by the method. Method of manufacturing nitride semiconductor devices that are formed onto a semiconductor substrate being a compound containing a Group 3B element for forming compounds with nitrogen, and nitrogen, including steps of heating the semiconductor substrate (1) to a film-deposition temperature, supplying to the substrate a film-deposition gas containing a source gas for the Group 3B element and a nitrogen source gas, and epitaxially growing onto the semiconductor substrate a thin film (2) of a compound containing the Group 3B element and nitrogen, and being furnished with a step, in advance of the epitaxial growth step, of heating the semiconductor substrate to a pretreating temperature less than the film-deposition temperature, to clean the surface of the semiconductor substrate.

Single crystalline gallium nitride plate having improved thermal conductivity

본 발명은 열전도도가 우수한 질화갈륨 단결정 기판에 관한 것으로, 0.7×10 18 내지 3×10 18 /cm 3 의 n-도핑 농도 및 상온(300K)에서 1.5 W/cmK 이상의 열전도도를 갖는, 본 발명의 질화갈륨 단결정 기판은 우수하면서도 균일한 열전도도를 가져 발광 소자 제조시 유용하게 사용될 수 있다. The present invention relates to a gallium nitride single crystal substrate having excellent thermal conductivity, and has an n-doping concentration of 0.7 × 10 18 to 3 × 10 18 / cm 3 and a thermal conductivity of 1.5 W / cmK or more at room temperature (300K). The gallium nitride single crystal substrate has excellent and uniform thermal conductivity and can be usefully used in manufacturing a light emitting device.

GaN substrate for blue light emitting diode

Gallium nitride baseplate, epitaxial substrate, and method of forming gallium nitride

A method of forming an iron-doped gallium nitride for a semi-insulating GaN substrate is provided. A substrate 1 , such as a sapphire substrate having the (0001) plane, is placed on a susceptor of a metalorganic hydrogen chloride vapor phase apparatus 11 . Next, gaseous iron compound G Fe from a source 13 for an iron compound, such as ferrocene, and hydrogen chloride gas G1 HCl from a hydrogen chloride source 15 are caused to react with each other in a mixing container 16 to generate gas G FeComp of an iron-containing reaction product, such as iron chloride (FeCl 2 ). In association with the generation, the iron-containing reaction product G FeComp , first substance gas G N containing elemental nitrogen from a nitrogen source 17 , and second substance gas G Ga containing elemental gallium are supplied to a reaction tube 21 to form iron-doped gallium nitride 23 on the substrate 1.

Gallium nitride substrate and gallium nitride film deposition method

Affords high-carrier-concentration, low-cracking-incidence gallium nitride substrates and methods of forming gallium nitride films. A gallium nitride film 52 in which the carrier concentration is 1 × 10 17 cm -3 or more is created. Initially, a gallium nitride layer 51 including an n -type dopant is formed onto a substrate 50. Then, the gallium nitride layer 51 formed on the substrate 50 is heated to form a gallium nitride film 52.

Group III nitride crystal substrate for light emitting device, light emitting device and method for producing the same

Single crystal semiconductor substrate articles and semiconductor devices comprising same

A textured substrate is disclosed which is amenable to deposition thereon of epitaxial single crystal films of materials such as diamond, cubic boron nitride, boron phosphide, beta-silicon carbide, and gallium nitride. The textured substrate comprises a base having a generally planar main top surface from which upwardly extends a regular array of posts, the base being formed of single crystal material which is crystallographically compatible with epitaxial single crystal materials to be deposited thereon. The single crystal epitaxial layers are formed on top surfaces of the posts which preferably have a quadrilateral cross-section, e.g., a square cross-section whose sides are from about 0.5 to about 20 micrometers in length, to accommodate the formation of substantially defect-free, single crystal epitaxial layers thereon. The single crystal epitaxial layer may be selectively doped to provide for p-type and p + doped regions thereof, to accommodate fabrication of semiconductor devices such as field effect transistors.

Method of making single crystal semiconductor substrate articles and semiconductor device

A textured substrate is disclosed which is amenable to deposition thereon of epitaxial single crystal films of materials such as diamond, cubic boron nitride, boron phosphide, beta-silicon carbide, and gallium nitride. The textured substrate comprises a base having a generally planar main top surface from which upwardly extends a regular array of posts, the base being formed of single crystal material which is crystallographically compatible with epitaxial single crystal materials to be deposited thereon. The single crystal epitaxial layers are formed on top surfaces of the posts which preferably have a quardrilateral cross-section, e.g., a square cross-section whose sides are from about 0.5 to about 20 micrometers in length, to accommodate the formation of substantially defect-free, single crystal epitaxial layers thereon. The single crystal epitaxial layer may be selectively doped to provide for p-type and p + doped regions thereof, to accommodate fabrication of semiconductor devices such as field effect transistors.

Method for forming GaN semiconductor single crystal substrate and GaN diode with the substrate

Method for forming a single crystal GaN semiconductor substrate and a GaN diode with the substrate is disclosed which forms in a short time period, has a low crystal defect concentration and allows forming a size large enough to fabricate an optical device, the method including either the steps of fast growth of a GaN group material on an oxide substrate to a thickness without cracking and subjecting to mechanical polish to remove a portion of the oxide substrate, and growing GaN again on the grown GaN layer and complete removal of the remaining oxide substrate to obtain a GaN film, or the steps of separating the oxide substrate from the GaN layer utilizing cooling to obtain a GaN film, grown GaN on the GaN film to a predetermined thickness to form a GaN bulk single crystal and mirror polishing it to form the GaN single crystal substrate, whereby a defectless GaN single crystal substrate of a size required for fabrication of an optical device can be obtained within a short time period because fast homoeptaxial growth of a GaN film is allowed.

Method for growing nitride system compound semiconductor

(57)【要約】 【課題】 窒化物系化合物半導体の成長において、バッ ファ層を用いた成長では、バッファ層付近で欠陥が発生 して、窒化物系化合物半導体を用いた半導体装置の性 能、信頼性などに問題を生じる。 【解決手段】 窒化物系化合物半導体により構成される 基板２に、ＡｌＧａＮについては９００℃以上の成長温 度で、ＩｎＡｌＧａＮについては７００℃以上の成長温 度で窒化物系化合物半導体８を成長させる。

Method and apparatus for producing group-III nitrides

The subject invention pertains to a method and device for producing large area single crystalline III-V nitride compound semiconductor substrates with a composition Al x In y Ga l-x-y N (where O≦x≦1, 0≦y≦1, and 0≦x+y≦1). In a specific embodiment, GaN substrates, with low dislocation densities (˜10 7 cm 2 ) can be produced. These crystalline III-V substrates can be used to fabricate lasers and transistors. Large area free standing single crystals of III-V compounds, for example GaN, can be produced in accordance with the subject invention. By utilizing the rapid growth rates afforded by hydride vapor phase epitaxy (HVPE) and growing on lattice matching orthorhombic structure oxide substrates, good quality III-V crystals can be grown. Examples of oxide substrates include LiGaO 2 , LiAlO 2 , MgAlScO 4 , Al 2 MgO 4 , and LiNdO 2 . The subject invention relates to a method and apparatus, for the deposition of III-V compounds, which can alternate between MOVPE and HVPE, combining the advantages of both. In particular, the subject hybrid reactor can go back and forth between MOVPE and HVPE in situ so that the substrate does not have to be transported between reactor apparatus and, therefore, cooled between the performance of different growth techniques.

Method and apparatus for single crystal gallium nitride (GaN) bulk synthesis

A method and apparatus for homoepitaxial growth of freestanding, single bulk crystal Gallium Nitride (GaN) are provided, wherein a step of nucleating GaN in a reactor results in a GaN nucleation layer having a thickness of a few monolayers. The nucleation layer is stabilized, and a single bulk crystal GaN is grown from gas phase reactants on the GaN nucleation layer. The reactor is formed from ultra low oxygen stainless steel.

Magnesium-doped iii-v nitrides & methods

Magnesium-doped high quality III-V nitride layers and methods for making the same. A p-type gallium nitride, indium nitride or aluminum nitride layer (12') may be produced on a sapphire substrate (5) by a hydride vapor-phase epitaxy (HVPE) process using a metal supply mixture which includes magnesium and a group III metal (Ga, In, Al) (11). The gallium nitride, indium nitride or aluminum nitride layer may be removed from the sapphire substrate to provide a Mg-dope III-V nitride substrate having low dislocation densities and being suitable for use in fabrication of, e.g. light-emitting devices.

Method for fabricating a GaN single crystal substrate

본 발명은 질화갈륨 단결정 기판의 제조방법에 관한 것이다. The present invention relates to a method for producing a gallium nitride single crystal substrate. 본 발명은 사파이어 기판의 전면에 질화갈륨(GaN)막을 형성하는 단계; 상기 사파이어 기판을 900 내지 1000℃ 범위로 가열하는 단계; 및 상기 가열된 사파이어 기판의 후면으로 레이저를 조사하여 상기 사파이어 기판으로부터 상기 질화갈륨막을 분리하는 단계를 포함하여 이루어진다. The present invention comprises the steps of forming a gallium nitride (GaN) film on the entire surface of the sapphire substrate; Heating the sapphire substrate in the range of 900 to 1000 ° C .; And separating the gallium nitride film from the sapphire substrate by irradiating a laser to a rear surface of the heated sapphire substrate. 또한 사파이어 기판의 전면에 질화갈륨(GaN)막을 형성하는 단계의 전후 단계에 각각 사파이어 기판의 후면에 실리콘 산화막(SiO 2 )을 형성하는 단계 및 상기 사파이어 기판 후면의 상기 실리콘 산화막을 제거하는 단계를 더 추가하여 이루어진다. 따라서, 크렉이 발생되지 않은 고품질의 질화갈륨 기판을 얻을 수 있다. Further, before and after forming a gallium nitride (GaN) film on the front surface of the sapphire substrate, forming a silicon oxide film (SiO 2 ) on the rear surface of the sapphire substrate and removing the silicon oxide film on the back surface of the sapphire substrate, respectively. In addition. Therefore, a high quality gallium nitride substrate without cracks can be obtained.

Nitride crystal substrate

Gallium nitride homogeneous substrate and preparation method thereof

本发明公开了一种氮化镓同质衬底及其制备方法，制备方法包括以下步骤：先将氮化镓多晶基板涂镓氨化，然后非晶化处理，再将具有六方结构的二维晶体薄膜转移至多晶衬底基板上；然后对二维晶体薄膜表面处理，产生悬挂键；再在二维晶体薄膜上生长AlN成核层；随后在AlN成核层上外延生长氮化镓厚膜；最后将多晶衬底基板去除即得氮化镓同质衬底。本发明在氮化镓基板上利用可转移的单晶石墨烯为氮化物生长提供所需的六方模板，比蓝宝石等异质衬底上转移二维薄膜的热膨胀应力低，使得HVPE氮化镓厚膜生长空间得到提高，氮化镓自支撑衬底获得成本大为降低。

Nitride semiconductor free-standing substrate

Single crystalline gallium nitride thick film and preparation thereof

본 발명은 휨 정도가 기존에 비해 현저히 개선된 질화갈륨(GaN) 단결정 후막(thick film) 및 이의 제조방법에 관한 것으로, 결정 거리당 <0001> 방향에 대한 c축 방향 틸트-앵글(tilt-angle) 값이 0.0022 (°/mm) 이하인 본 발명의 질화갈륨 단결정 후막은 기존 GaN 후막 두께보다 2배 이상 두껍게 성장되어도 휨이 거의 없어 반도체 소자용 기판으로서 매우 유용하게 사용될 수 있다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gallium nitride (GaN) single crystal thick film and a method of manufacturing the same, which have significantly improved warpage compared to the conventional art, and have a c-axis tilt-angle with respect to a <0001> direction per crystal distance. The gallium nitride single crystal thick film of the present invention having a value of 0.0022 (° / mm) or less can hardly be used as a substrate for a semiconductor device because there is almost no warp even if it is grown more than twice as thick as a conventional GaN thick film.

Method for depositing iii-v semiconductor layers on a non-iii-v substrate

The invention relates to a method for depositing thick III-V semiconductor layers on a non-III-V substrate, particularly a silicon substrate, by introducing gaseous starting materials into the process chamber of a reactor. The aim of the invention is to carry out the crystalline deposition of thick III-V semiconductor layers on a silicon substrate without the occurrence of unfavorable lattice distortions. To this end, the invention provides that a thin intermediate layer is deposited at a reduced growth temperature between two III-V layers.

Method for depositing iii-v semiconductor layers on a non-iii-v substrate

Method for depositing iii-v semiconductor layers on a non-iii-v substrate

The invention relates to a method for depositing thick III-V semiconductor layers on a non-III-V substrate, particularly a silicon substrate, by introducing gaseous starting materials into the process chamber of a reactor. The aim of the invention is to carry out the crystalline deposition of thick III-V semiconductor layers on a silicon substrate without the occurrence of unfavorable lattice distortions. To this end, the invention provides that a thin intermediate layer is deposited at a reduced growth temperature between two III-V layers.

Method for depositing III-V semiconductor layers on a non-III-V substrate

Method for depositing III-V semiconductor layers on a non-III-V substrate

The invention relates to a method for depositing thick III-V semiconductor layers on a non-III-V substrate, particularly a silicon substrate, by introducing gaseous starting materials into the process chamber of a reactor. The aim of the invention is to carry out the crystalline deposition of thick III-V semiconductor layers on a silicon substrate without the occurrence of unfavorable lattice distortions. To this end, the invention provides that a thin intermediate layer is deposited at a reduced growth temperature between two III-V layers.

GaN layers

Rissfreie dicke GaN-Schichten konnten mittels Hydrid-Gasphasen-Epitaxie (HVPE) sowohl auf exakt als auch auf leicht fehlorientierten GaN-Al¶2¶O¶3¶ Templat-Strukturen abgeschieden werden. Ein dramatischer Unterschied in der Oberflächenqualität konnte auf die Fehlorientierung der Substrate zurückgeführt werden. Spiegelglatte Schichten konnten auf leicht fehlorientierten Wafern erzielt werden, während auf exakt orientierten Substraten die Ausbildung von pyramidenförmigen Strukturen und insgesamt raueren Oberflächen beobachtet wurden. HVPE-Schichten mit einer so ausgezeichneten Oberflächenmorphologie können voraussichtlich ohne die sonst notwendigen Polier-Zwischenschritte als Substrate für anschließende Epitaxie-Prozesse verwendet werden. Crack-free thick GaN layers could be deposited by means of hydride gas-phase epitaxy (HVPE) on both precisely and slightly misoriented GaN-Al¶2¶O¶3¶ template structures. A dramatic difference in surface quality could be attributed to the misorientation of the substrates. Mirror-smooth layers could be achieved on slightly misoriented wafers while on precisely oriented substrates the formation of pyramidal structures and overall rougher surfaces was observed. HVPE layers with such excellent surface morphology can be expected to be used as substrates for subsequent epitaxial growth processes without the otherwise necessary intermediate polishing steps.

PROCESS FOR PRODUCING AUTOMATED SUBSTRATES OF ELEMENT III NITRIDES BY HETERO-EPITAXIA ON A SACRIFICIAL LAYER

Method of producing self-supporting substrates comprising iii-nitrides by means of heteroepitaxy on a sacrificial layer

The invention relates to a method for the production of self-supporting substrates comprising element III nitrides. More specifically, the invention relates to a method of producing a self-supporting substrate comprising a III-nitride, in particular, gallium nitride (GaN), which is obtained by means of epitaxy using a starting substrate. The invention is characterised in that it consists in depositing a single-crystal silicon-based intermediary layer by way of a sacrificial layer which is intended to be spontaneously vaporised during the III-nitride epitaxy step. The inventive method can be used, for example, to produce a flat, self-supporting III-nitride layer having a diameter greater than 2''.

Gallium trichloride injection scheme

The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and equipment for the sustained, high-volume production of Group III-V compound semiconductor material suitable for fabrication of optic and electronic components, for use as substrates for epitaxial deposition, for wafers and so forth. In preferred embodiments, these methods are optimized for producing Group III-N (nitrogen) compound semiconductor wafers and specifically for producing GaN wafers. Specifically, the method includes reacting an amount of a gaseous Group III precursor as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber under conditions sufficient to provide sustained high volume manufacture of the semiconductor material on one or more substrates, with the gaseous Group III precursor continuously provided at a mass flow of 50 g Group III element/hour for at least 48 hours. A system for conducting the method is also provided.

Gallium trichloride injection scheme

A system for epitaxial deposition of a Group III-V semiconductor material that includes gallium. The system includes sources of the reactants, one of which is a gaseous Group III precursor having one or more gaseous gallium precursors and another of which is a gaseous Group V component, a reaction chamber wherein the reactants combine to deposit Group III-V semiconductor material, and one or more heating structures for heating the gaseous Group III precursors prior to reacting to a temperature to decompose substantially all dimers, trimers or other molecular variations of such precursors into their monomer forms.

Gallium trichloride injection scheme

The invention relates to a method and system for epitaxial deposition of a Group III-V semiconductor material that includes gallium. The method includes reacting an amount of a gaseous Group III precursor having one or more gaseous gallium precursors as one reactant with an amount of a gaseous Group V component as another reactant in a reaction chamber; and supplying sufficient energy to the gaseous gallium precursor(s) prior to their reacting so that substantially all such precursors are in their monomer forms. The system includes sources of the reactants, a reaction chamber wherein the reactants combine to deposit Group III-V semiconductor material, and one or more heating structures for heating the gaseous Group III precursors prior to reacting to a temperature to decompose substantially all dimers, trimers or other molecular variations of such precursors into their component monomers.

Methods for fabricating group III nitride structures with a cluster tool

The present invention generally provides apparatus and methods for forming LED structures. One embodiment of the present invention provides a method for fabricating a compound nitride structure comprising forming a first layer comprising a first group-III element and nitrogen on substrates in a first processing chamber by a hydride vapor phase epitaxial (HVPE) process or a metal organic chemical vapor deposition (MOCVD) process, forming a second layer comprising a second group-III element and nitrogen over the first layer in a second processing chamber by a MOCVD process, and forming a third layer comprising a third group-III element and nitrogen over the second layer by a MOCVD process.

Method and apparatus for the epitaxial deposition of monocrystalline group iii-v semiconductor material using gallium trichloride

Nucleation layer growth and lift-up of process for GaN wafer

A method for growing GaN forms a group III alloy material in a processing chamber. A GaN nucleation layer is formed on the group III alloy in the processing chamber to provide a GaN substrate. A GaN structure is formed on the GaN substrate using a plurality of gas phase reactants in the processing chamber.

Method for manufacturing gallium nitride crystal film

一种氮化镓晶体膜的制造方法，包括在基板上供给由惰性气体构成的载气、GaCl 3 气体、卤素气体以及NH 3 气体而在所述基板上生长氮化镓晶体膜的生长工序，在所述生长工序中，在将所述基板上的所述卤素气体的分压与所述GaCl 3 气体的分压之比作为分压比[P 卤素 /P GaCl3 ]的情况下，分压比[P 卤素 /P GaCl3 ]为0.20以上。

Semiconductor device and manufacture method thereof

提供一种半导体器件制造方法，从而以高成品率制造具有优异特性的半导体器件。该半导体器件制造方法包括：制备GaN衬底(10)的步骤，该GaN衬底具有反向域(10t)聚集面积(Stcm 2 )与GaN衬底(10)的主面(10m)的总面积(Scm 2 )的比率St/S，该比率不大于0.5，在沿着作为GaN衬底(10)主面(10m)的(0001)Ga面的反向域(10t)的密度为Dcm -2 ，其中在[0001]方向上的极性相关于矩阵(10s)反向的情况下的所述反向域的表面面积为1μm 2 或更大；以及在GaN衬底(10)的主面10m上生长至少单层半导体层(20)以形成半导体器件(40)的步骤，其中半导体器件(40)的主面40m的面积S c 和反向域(10t)的密度D的乘积S c ×D小于2.3。

Fabrication method of multi-freestanding gan wafer

A method for fabricating a multi-freestanding GaN wafer is provided to greatly simplify a fabricating process by performing all the processes in a single reactor by an in-situ method, and to greatly reduce fabricating costs by performing a surface treatment and a growth process of GaN while using HVPE(hydride vapor phase epitaxy) process gas. A substrate is installed in a reactor. A GaN layer is formed on the substrate by a crystal growth. A surface treatment using etchant is performed on the GaN layer so that a porous GaN layer with a predetermined thickness is formed on the GaN layer by an etch process. The processes for forming the GaN layer and a porous GaN layer are repeated in plural times to form a stacked layer of the GaN layer and the porous GaN layer on the substrate periodically. The stacked layers on the substrate are cooled to independently separate the GaN layers. In the surface treatment of the GaN layer, HCl gas and NH3 gas are used. The porous GaN layer is formed at a temperature of 900~1200 deg.C.

Homoepitaxial gallium-nitride-based electronic devices and method for producing same

There is provided an electronic device. The electronic device includes at least one epitaxial semiconductor layer disposed on a single crystal substrate comprised of gallium nitride having a dislocation density less than about 10 5 per cm 2 . A method of forming an electronic device is also provided. The method includes providing a single crystal substrate comprised of gallium nitride having a dislocation density less than about 10 5 per cm 2 , and homoepitaxially forming at least one semiconductor layer on the substrate.

A method for fabricating semiconductor epitaxial layer using metal islands

PURPOSE: A method for fabricating a semiconductor epitaxial layer using a metal island is provided to fabricate a high-quality GaN LED(light emitting device) or GaN laser diode by remarkably reducing a crystal defect and by improving lifetime and brightness of a device. CONSTITUTION: A substrate is prepared in a reaction furnace. The substrate is set at a temperature of 200-1300 deg.C. A gallium metal source is supplied to the substrate. The supplied gallium metal source is transformed into a gallium metal island on the substrate. After the supply of the gallium metal source is stopped, a nitrogen source is supplied to the gallium metal island. The gallium metal island is reacted with the nitrogen source to form a gallium nitride island. A GaN epitaxial layer is grown by using the gallium nitride island as a seed.

A method of growing mono-crystal gallium nitride film on Si (100) substrate

本发明公开了一种在Si(100)衬底上生长单晶氮化镓薄膜的方法，包括：在Si(100)衬底上形成非晶SiO 2 层；将单晶石墨烯转移至Si(100)/SiO 2 衬底上；对单晶石墨烯表面进行预处理，产生悬挂键；生长AlN成核层；外延生长GaN薄膜。由于Si(100)表面重构产生两种悬挂键，导致氮化物生长时晶粒面内取向不一致而不能形成单晶，本发明以非晶SiO 2 层屏蔽衬底表面的两种悬挂键信息，并由石墨烯提供氮化物外延生长所需的六方模板，外延得到了连续均匀的高质量GaN单晶薄膜，为GaN基器件与Si基器件的整合集成奠定了良好的基础。

Vapor growth method

Manufacturing method of gallium nitride crystal film

Method and apparatus for producing group-III nitrides

The subject invention pertains to a method and device for producing large area single crystalline III-V nitride compound semiconductor substrates with a composition Al x In y Ga 1-x-y N (where 0≦x≦1, 0≦y≦1, and 0≦x+y≦1). In a specific embodiment, GaN substrates, with low dislocation densities (˜10 7 cm 2 ) can be produced. These crystalline III-V substrates can be used to fabricate lasers and transistors. Large area free standing single crystals of III-V compounds, for example GaN, can be produced in accordance with the subject invention. By utilizing the rapid growth rates afforded by hydride vapor phase epitaxy (HVPE) and growing on lattice matching orthorhombic structure oxide substrates, good quality III-V crystals can be grown. Examples of oxide substrates include LiGaO 2 , LiAlO 2 , MgAlScO 4 , Al 2 MgO 4 , and LiNdO 2 . The subject invention relates to a method and apparatus, for the deposition of III-V compounds, which can alternate between MOVPE and HVPE, combining the advantages of both. In particular, the subject hybrid reactor can go back and forth between MOVPE and HVPE in situ so that the substrate does not have to be transported between reactor apparatus and, therefore, cooled between the performance of different growth techniques.

PROCESS FOR PRODUCING A GALLIUM NITRIDE SUBSTRATE

La présente invention concerne un procédé de fabrication d'un substrat de nitrure de gallium (GaN) fournissant un film épais de GaN sans provoquer ni incurvation ni fissure pouvant survenir dans un processus de croissance. Dans ce but, une couche de nitrure destinée à être enrobée (20) ayant une pluralité de vides (50) dans celle-ci est enrobée entre une couche de GaN (30) et un substrat de base (10). Le procédé comprend la préparation d'un substrat de base (10), la croissance, sur ce dernier, de la couche (20) ayant une pluralité de parties riches en indium (40) à une première température, et la croissance d'une couche de GaN (30) sur la couche (20) à une seconde température inférieure à la première température, pour métalliser la partie (40) pour former une pluralité de vides (50) dans la couche (20). The present invention relates to a method of manufacturing a gallium nitride (GaN) substrate providing a thick film of GaN without causing any curvature or cracking which may occur in a growth process. For this purpose, a nitride layer to be coated (20) having a plurality of voids (50) therein is coated between a layer of GaN (30) and a base substrate (10). The method includes preparing a base substrate (10), growing thereon the layer (20) having a plurality of indium-rich portions (40) at a first temperature, and growing a GaN layer (30) on the layer (20) at a second temperature below the first temperature, for metallizing the portion (40) to form a plurality of voids (50) in the layer (20).

PROCESS FOR PRODUCING A GALLIUM NITRIDE SUBSTRATE

La présente invention concerne un procédé de fabrication d'un substrat de nitrure de gallium (GaN) fournissant un film épais de GaN sans provoquer ni incurvation ni fissure pouvant survenir dans un processus de croissance. Dans ce but, une couche de nitrure destinée à être enrobée (20) ayant une pluralité de vides (50) dans celle-ci est enrobée entre une couche de GaN (30) et un substrat de base (10). Le procédé comprend la préparation d'un substrat de base (10), la croissance, sur ce dernier, de la couche (20) ayant une pluralité de parties riches en indium (40) à une première température, et la croissance d'une couche de GaN (30) sur la couche (20) à une seconde température inférieure à la première température, pour métalliser la partie (40) pour former une pluralité de vides (50) dans la couche (20). The present invention relates to a method of manufacturing a gallium nitride (GaN) substrate providing a thick film of GaN without causing any bending or cracking that may occur in a growth process. For this purpose, a layer of nitride to be coated (20) having a plurality of voids (50) therein is coated between a GaN layer (30) and a base substrate (10). The method comprises preparing a base substrate (10), growing thereon the layer (20) having a plurality of indium-rich portions (40) at a first temperature, and growing a GaN layer (30) on the layer (20) at a second temperature lower than the first temperature, for metallizing the portion (40) to form a plurality of voids (50) in the layer (20).

Semiconductor substrate with a nitrided interfacial layer

시작 기판 상에 에피택셜 성장에 의해 Ge, Zr, Y, Si, Se, Sc, Mg, In, W, La, Ti, Ta and Hf 중에서 선택된 원소(M)를 포함하는 적어도 하나의 분리 층을 퇴적하는 단계를 포함하는, 13족 원소의 질화물의 단결정질 반도체 재료를 제조하기 위한 방법이 개시되며, 상기 방법은, 화학식 MvAlxOyNz의 계면 층이 시작 기판과 분리 층 사이에 퇴적되고, - 원자 인덱스(x 및 z)는 0 초과 1 이하이고; - 원자 인덱스(v 및 y)는 0 내지 1이며; - 합(y+z)은 0.9 초과 1.5 이하이고; - 합(v+y)은 0.3 이상 및 1 이하인 것을 특징으로 한다.

Iii nitride crystal substrate, and light-emitting device and method of its manufacture

본 발명은 발광 디바이스에 적합하게 이용되는 III족 질화물 결정 기판 및 그 기판을 포함하는 발광 디바이스 및 그 발광 디바이스의 제조방법을 제공하는 것을 목적으로 한다. 본 III족 질화물 결정 기판은, 면적이 10 ㎝ 2 이상의 주요면을 가지며, 주요면의 외주로부터의 거리가 5 ㎜ 이하의 외주 영역을 제외하는 주영역에서, 총 전위 밀도가 1×10 4 ㎝ -2 이상 3×10 6 ㎝ -2 이하이고, 총 전위 밀도에 대한 나선 전위 밀도의 비가 0.5 이상이다.

III group nitride semiconductor substrate, substrate for group III nitride semiconductor device, and fabrication methods thereof

A III group nitride semiconductor substrate according to the present invention is fabricated by forming a metal film or metal nitride film 2 ′ with mesh structure in which micro voids are provided on a starting substrate 1 , and growing a III group nitride semiconductor crystal layer 3 via the metal film or metal nitride film 2′.

Method for producing a gallium nitride epitaxial layer

The invention concerns a method for producing a gallium nitride (GaN) epitaxial layer characterised in that it consists in depositing on a substrate a dielectric layer acting as a mask and depositing on the masked gallium nitride, by epitaxial deposit, so as to induce the deposit of gallium nitride patterns and the anisotropic lateral growth of said patterns, the lateral growth being pursued until the different patterns coalesce. The deposit of the gallium nitride patterns can be carried out ex-situ by dielectric etching or in-situ by treating the substrate for coating it with a dielectric film whereof the thickness is of the order of one angstrom. The invention also concerns the gallium nitride layers obtained by said method.

Vapor-phase growth of epitaxial crystals

To grow crystals epitaxially, carriergas is bubbled through a trialkyl gallium (3) and the vapors are carried to a reactor (7) in amount of the trialkyl gallium being 10⁻³to 10⁻⁵mol/min; arsenic trihydride (4) having a volatile impurity content of not more then 1.5 mol ppb on a germanium tetrahydrate conversion is introduced into the reactor through a flow controller (6) at an amount of 5 to 200 times that of the gallium material and the gaseous mixture is heat decomposed by a heater (9) in the vicinity of a substrate (11) to cause growth of a GaAs epitaxial crystal. Crystals of other semiconductive compounds of Groups III, IV, and V can be grown similarly by replacement of the arsonic, eg. by aluminium or indium in place of gallium or phosphine or stibine in place of the arsine. Suitable alk­yls are methyl, ethyl or butyl. The effect of impurities and residual electron conc­entration is described. The crystals prepared have a buffer of a high resistance GaAs or Al x Ga 1-x As epitaxial crystal, where 0<x<1, with a low carrier concentration of > 2 x 10¹⁴­/cm arising from the arsine, and may have also such an N-type crystal layer; they are useful in field effect trans­istors.

Method for producing III-N layers, and III-N layers or III-N substrates, and devices based thereon

本发明公开了一种生长厚III-N层的外延生长方法，其中，III指元素周期表中第III族中的至少一种元素，厚III-N层被沉积在异质衬底上。外延生长方法优选用HVPE来实现。衬底也可以是包含异质衬底和至少一个薄III-N中间层的模板。通过使衬底具有有意选取的取向差和/或在外延生长处理过程的最后减小N/III比率和/或反应器压力，可以改善表面质量。本发明也公开了具有这种改善III-N层的衬底和半导体器件。

Method for printing wide bandgap semiconductor materials

A method for printing a semiconductor material includes depositing a molten metal onto a substrate in an enclosed chamber to form a trace having a maximum height of 15 micrometers, a maximum width of 25 micrometers to 10 millimeters, and/or a thin film having a maximum height of 15 micrometers. The method further includes reacting the molten metal with a gas phase species in the enclosed chamber to form the semiconductor material.

Method of producing self supporting substrates comprising III-nitrides by means of heteroepitaxy on a sacrificial layer

The invention relates to a method for the production of self-supporting substrates comprising element III nitrides. More specifically, the invention relates to a method of producing a self-supporting substrate comprising a III-nitride, in particular, gallium nitride (GaN), which is obtained by means of epitaxy using a starting substrate. The invention is characterised in that it consists in depositing a single-crystal silicon-based intermediary layer by way of a sacrificial layer which is intended to be spontaneously vaporised during the III-nitride epitaxy step. The inventive method can be used, for example, to produce a flat, self-supporting III-nitride layer having a diameter greater than 2″.

Method for producing gallium nitride material

Growth of planar reduced dislocation density m-plane gallium nitride by hydride vapor phase epitaxy

고도로 평면이고, 완전히 투명하며, 반사성의 m-면 질화 갈륨(GaN) 필름들을 성장시키는 방법을 제공한다. 상기 방법은 측방향 과성장 기술을 통해 구조적 결함 밀도를 현저하게 감소시킨다. 고품위이고, 균일하며, 두꺼운 m-면 GaN 필름들은 비극성 소자 성장용 기판으로 사용된다. It provides a method of growing highly planar, completely transparent, reflective m-plane gallium nitride (GaN) films. The method significantly reduces structural defect density through lateral overgrowth techniques. High quality, uniform, thick m-plane GaN films are used as substrates for nonpolar device growth.

Method of growing nitride semiconductor layer, nitride semiconductor device, and method of fabricating the same

Method of manufacturing nitride system III-V compound layer and method of manufacturing substrate

Provided is a method of manufacturing a nitride system III-V compound layer which improves the quality and facilitates the manufacturing process and a method of manufacturing a substrate employing the method of manufacturing a nitride system III-V compound layer. A first growth layer is grown on a growth base at a growth rate, in a vertical direction to the growth surface, higher than 10 μm/h. Subsequently, a second growth layer is grown at a growth rate, in a vertical direction to the growth surface, lower than 10 μm/h. The first growth layer grown at the higher growth rate has a rough surface. However, the second growth layer is grown at the lower growth rate than that used for growing the first growth layer, so that depressions of the surface of the first growth layer are filled and thus the surface of the second growth layer is flattened. Further, growth takes place laterally so as to fill the depressions of the surface of the first growth layer. Thus, dislocation extending from the first growth layer bends laterally and density of dislocation propagating to the surface of the second growth layer is greatly lowered.

Method and apparatus for producing group III nitride compound semiconductor

The method of the invention for producing a Group III nitride compound semiconductor, employing an etchable substrate which is produced from a material other than the Group III nitride compound semiconductor, includes stacking one or more layers of the Group III nitride compound semiconductor on one face of the substrate and etching the other face of the substrate while stacking one or more semiconductor layers or after completion of stacking one or more semiconductor layers, to thereby reduce the thickness of most of the substrate. The apparatus of present invention for producing a semiconductor through vapor phase growth, contains a substrate for vapor-phase-growing the semiconductor; a source-supplying system for supplying a source for vapor phase growth of the semiconductor; and an etchant-supplying system, wherein the source-supplying system and the etchant-supplying system are isolated through placement of the substrate.

Boron phosphide based semiconductor device

A boron phosphide-based semiconductor device enhanced in properties includes a substrate (11) composed of a {111}-Si single crystal having a surface of {111} crystal plane and a boron phosphide-based semiconductor layer formed on the surface of the substrate and composed of a polycrystal layer (12) that is an aggregate of a plurality of triangular pyramidal single crystal entities (13) of the boron phosphide-based semiconductor crystal, wherein each single crystal entity has a twining interface that forms an angle of 60° relative to a <110> crystal direction of the substrate.

Detached and inverted epitaxial regrowth & methods

An n-doped, high quality gallium nitride substrate suitable for further device or epitaxial processing, and method for making the same. The nitride substrate is produced by epitaxial deposition of first metal nitride layer on a non-native substrate followed by a second deposition of metal nitride. During the second deposition of metal nitride, a liquid metal layer is formed at the interface of the non-native substrate and the metal nitride layer form. The formed metal nitride layer may be detached from the non-native substrate to provide an metal nitride substrate with a high quality inverse surface. A epitaxial metal nitride layer may be deposited on the inverse surface of metal nitride substrate. The metal nitride substrate and the epitaxial metal nitride layer thereon may be deposited using the same hydride vapor-phase epitaxy system.

Gallium nitride homogeneous substrate and preparation method thereof

本发明公开了一种氮化镓同质衬底及其制备方法，制备方法包括以下步骤：先将氮化镓多晶基板涂镓氨化，然后非晶化处理，再将具有六方结构的二维晶体薄膜转移至多晶衬底基板上；然后对二维晶体薄膜表面处理，产生悬挂键；再在二维晶体薄膜上生长AlN成核层；随后在AlN成核层上外延生长氮化镓厚膜；最后将多晶衬底基板去除即得氮化镓同质衬底。本发明在氮化镓基板上利用可转移的单晶石墨烯为氮化物生长提供所需的六方模板，比蓝宝石等异质衬底上转移二维薄膜的热膨胀应力低，使得HVPE氮化镓厚膜生长空间得到提高，氮化镓自支撑衬底获得成本大为降低。

Group iii-v nitride semiconductor multilayer structure and its production process

A multilayer structure having a GaN semiconductor crystal growth layer of high quality in which a crystal growth layer of a group III-V nitride semiconductor such as GaN is formed over a substrate with a buffer layer of AlxGa1-xN (0<x<1) interposed between the crystal growth layer and the substrate. A method for producing such a structure is also disclosed in which a buffer layer of AlxGa1-xN (0<x<1) is formed on a substrate at a growth temperature of 600 to 900°C and a crystal growth layer of a III-V nitride semiconductor is formed on the buffer layer.