Umgekehrt leitender bipolarer Transistor mit isoliertem Gate

Umgekehrt leitender bipolarer Transistor (1, 2) und isoliertem Gate mit:einer Halbleiterschicht (10);einer Emitterelektrode (24), die eine der Hauptflächen (10B) der Halbleiterschicht (10) bedeckt; undeinem isolierten Grabengate (30), das sich von der einen der Hauptoberflächen (10B) der Halbleiterschicht (10) in die Halbleiterschicht (10) erstreckt, wobei die Halbleiterschicht (10) aufweist:einen Driftbereich (14) eines ersten Leitfähigkeitstyps, wobei der Driftbereich (14) in Kontakt mit dem isolierten Grabengate (30) ist;einen Körperbereich (15) eines zweiten Leitfähigkeitstyps, wobei der Körperbereich (15) oberhalb des Driftbereichs (14) angeordnet ist, und in Kontakt mit dem isolierten Grabengate (30) ist; undeinen Barrierenbereich (18) des ersten Leitfähigkeitstyps, wobei der Barrierenbereich (18) in dem Körperbereich (15) angeordnet ist, und elektrisch mit der Emitterelektrode (24) über ein Säulenbauteil (19) verbunden ist, das sich von der einen der Hauptoberflächen (10B) der Halbleiterschicht ...

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE

A semiconductor device includes: a semiconductor substrate, an upper electrode, a lower electrode and a gate electrode. In the semiconductor substrate, a body region, a pillar region, and a barrier region are formed. The pillar region has an n-type impurity, is formed on a lateral side of the body region, and extends along a depth from a top surface of the semiconductor substrate to a lower end of the body region. The barrier region has an n-type impurity and is formed on a lower side of the body region and the pillar region. The barrier region is formed on the lower side of the pillar region. An n-type impurity concentration distribution in a depth direction in the pillar region and the barrier region has a maximum value in the pillar region. The n-type impurity concentration distribution has a folding point on a side deeper than the maximum value. 1. A semiconductor device comprising:a semiconductor substrate;an upper electrode formed on a top surface of the semiconductor substrate;a lower electrode formed on a bottom surface of the semiconductor substrate; anda gate electrode, whereinan emitter region, a body region, a pillar region, a barrier region, a drift region, a collector region and a cathode region are formed in the semiconductor substrate,the emitter region has an n-type impurity and is connected to the upper electrode,the body region has a p-type impurity, is formed on a lateral side and on a lower side of the emitter region, and is connected to the upper electrode,the pillar region has an n-type impurity, is formed on a lateral side of the body region, extends along a depth from the top surface of the semiconductor substrate to a lower end of the body region, is connected to the upper electrode, and is separated from the emitter region by the body region,the barrier region has an n-type impurity, is formed on a lower side of the body region and the pillar region, and is separated from the emitter region by the body region,the drift region has an n-type ...

Printing apparatus

A printing apparatus includes an image reading unit that reads a document mounted on a document table, a printing unit that performs printing on a print medium fed from a feed opening, and a document cover which is supported openably/closably with respect to the document table and which supports the print medium inserted into the feed opening.

Semiconductor device

A technology capable of suppressing a fluctuation in voltage in a diode region is provided. A resistance value between the emitter electrode and the lower body region is lower than a resistance value between the anode electrode and the lower anode region when the semiconductor device operates as a diode. A quantity of holes between the emitter electrode and the second barrier region is smaller than a quantity of holes between the anode electrode and the first barrier region.

SWITCHING ELEMENT AND METHOD OF MANUFACTURING THE SAME

A switching element may include a semiconductor substrate, a trench, a gate insulating film, and a gate electrode. A drift region may be in contact with the gate insulating film below the body region. A bottom region may be in contact with the gate insulating film at a bottom surface of the trench. A connection region may be in contact with the gate insulating film at a side surface of the trench and connect the body region and the bottom region. The side surface of the trench may include a first side surface and a second side surface positioned below the first side surface. An inclination angle of the second side surface may be larger than an inclination angle of the first side surface. An interface between the body region and the drift region may be in contact with the gate insulating film at the first side surface. 1. A switching element comprising:a semiconductor substrate;a trench provided in an upper surface of the semiconductor substrate;a gate insulating film covering an inner surface of the trench; anda gate electrode disposed in the trench and insulated from the semiconductor substrate by the gate insulating film,whereinthe semiconductor substrate comprises:a first conductivity-type source region disposed at the upper surface of the semiconductor substrate and being in contact with the gate insulating film;a second conductivity-type body region being in contact with the gate insulating film below the source region;a first conductivity-type drift region being in contact with the gate insulating film below the body region and separated from the source region by the body region;a second conductivity-type bottom region being in contact with the gate insulating film at a bottom surface of the trench; anda second conductivity-type connection region being in contact with the gate insulating film at a side surface of the trench and connecting the body region and the bottom region,whereinthe side surface of the trench is inclined such that a width of the trench ...

PURIFICATION PROCESS FOR HYDROPHILIC ORGANIC SOLVENT

Methods for the removal of ionic contaminants from a hydrophilic organic solvent by a mixed bed of ion exchange resins are described. A mixed bed of ion exchange resins with gel-type strong-acid cationic ion exchange resin with a specific moisture holding capacity and gel-type anionic ion exchange resin is used in some embodiments of such methods.

Method for producing gamma-aminobutyric acid (GABA) powder and product using same

Provided are a novel method for producing a GABA powder, and a product comprising a GABA powder produced by the production method. The present invention provides a method for producing a powder containing gamma-aminobutyric acid (GABA), the method comprising: (1) a fermentation step in which a starting material is inoculated with lactic acid bacteria having the ability to produce GABA and cultured to obtain a fermentation broth containing GABA; (2) a heat sterilization step in which the fermentation broth is heated to sterilize the lactic acid bacteria; (3) a step for adding an excipient to the fermentation broth; (4) a heating and mixing step in which the fermentation broth to which the excipient has been added is heated and mixed to obtain a mixed liquid; (5) a standing step for standing the mixed solution; and (6) a spray drying step in which the mixed solution is spray-dried to obtain a powder containing the GABA.

LIGHT-EMITTING DEVICE

A light-emitting device comprises: a substrate; a light-emitting element disposed on the substrate; a light transmitting member disposed on the light-emitting element; and a covering body that is disposed on the substrate, covers a side surface of the light transmitting member and has an upper surface exposed to the outside. In this device, the covering body has a particle group composed of a plurality of particles dispersed in the covering body, and the particle group includes a plurality of titanium oxide particles or zinc oxide particles dispersed in the vicinity of the upper surface of the covering body and having a portion having a narrower band gap than that in other portions in each particle.

METHOD FOR MANUFACTURING COMPOUND SEMICONDUCTOR DEVICE AND COMPOUND SEMICONDUCTOR DEVICE

A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate that includes a foundation layer; forming a deep trench in the foundation layer; and filling the deep trench with a deep layer having a second conductive type and a limiting layer having the first conductive type. In the filling the deep trench, growth of the deep layer from a bottom of the deep trench toward an opening inlet of the deep trench and growth of the limiting layer from a side face of the deep trench are achieved by: dominant epitaxial growth of a second conductive type layer over a first conductive type layer on the bottom of the deep trench; and dominant epitaxial growth of the first conductive type layer over the second conductive type layer on the side face of the deep trench, based on plane orientation dependency of the compound semiconductor during epitaxial growth. 1. A method for manufacturing a compound semiconductor device , the method comprising:providing a semiconductor substrate that includes a foundation layer having a first conductive type and formed of a compound semiconductor;forming a deep trench in the foundation layer; and introducing dopant gas that contains first conductive type dopant, dopant gas that contains second conductive type dopant, and material gas of the compound semiconductor into an epitaxial growth device;', 'forming the deep layer from a bottom of the deep trench toward an opening inlet of the deep trench; and', 'causing epitaxial growth of the limiting layer on a side face of the deep trench, the limiting layer limiting a depletion layer that extends from a side face of the deep layer to the foundation layer, wherein, 'filling the deep trench with a deep layer having a second conductive type and a limiting layer having the first conductive type by dominant epitaxial growth of a second conductive type layer over a first conductive type layer on the bottom of the deep trench; and', 'dominant epitaxial growth of the ...

Display device

The present invention addresses the problem of providing a display device that excels in waterproofness against moisture from a display side. A display device is provided with: a display for displaying an image on a display surface; a cover plate located on the display surface side of the display, the cover plate having a light-transmitting section for making the display surface visible; an elastic member provided so as to cover the side circumferential section of the cover plate; and an accommodation body having an open section that is open toward the cover plate side and a protruding section encircling the open section and protruding to the outer circumferential side of the open section. The display is bonded to the cover plate with a photocurable adhesive. The cover plate is secured via the elastic member to the protruding section by a caulked metal frame body.

MICROSCOPE SYSTEM AND METHOD FOR MICROSCOPE SYSTEM

A desired observation timing is ensured, and simultaneity of observation among different observation positions is ensured. Provided is a microscope system including an electrically powered stage, a scanner, objective lenses, a revolver, an image-acquisition portion, an autofocus portion, a first storage portion that stores one of the focal positions of the low-magnification objective lens as a reference position, a focal-position setting portion that sets a focal position at which an image is acquired with reference to the reference position for the low-magnification objective lens, an acquisition-position setting portion that sets acquisition positions for partial images, and a map-image generating portion that generates a map image based on the partial images acquired at the set focal position, wherein the autofocus portion detects a focal position of the high-magnification objective lens at an observation position set on the map image with reference to the reference position for the low-magnification objective lens. 1. A microscope system comprising:an electrically powered stage on which a specimen is placed and with which a position of the specimen can be adjusted;a scanner that scans laser light with which the specimen placed on the electrically powered stage is irradiated;a low-magnification objective lens that focuses the laser light scanned by the scanner onto the specimen and a high-magnification objective lens having a higher magnification than the low-magnification objective lens;a revolver that supports the low-magnification objective lens and high-magnification objective lens so as to make it possible to selectively place these objective lenses in an optical path of the laser light;an image-acquisition portion that acquires an image of the specimen by detecting return light that returns from the specimen due to the irradiation with the laser light;an autofocus portion that adjusts a distance in an optical-axis direction between the revolver and the ...

RECORDING APPARATUS

A recording apparatus includes a carriage configured to move in a width direction intersecting a medium transport direction, a recording head mounted on the carriage, a liquid storage section configured to store a liquid to be supplied to the recording head, the liquid storage section including an injection port configured to receive the liquid from a refill container and a liquid-level visual-check section through which a liquid level of the liquid is visually checked, and a display section configured to accept various setting operations, in which the liquid-level visual-check section and the display section are disposed on an apparatus front surface side, and the display section is disposed above the liquid-level visual-check section.

Semiconductor device comprising an diode region and an IGBT region

A technology for inhibiting gate interference in an RC-IGBT employing a diode structure having Schottky connections is provided. A semiconductor device includes a semiconductor substrate including a diode region and an IGBT region. In this semiconductor device, the diode region includes: a p-type anode region connected to an anode electrode by an Ohmic contact; a plurality of n-type pillar regions connected to the anode electrode by Schottky contacts; an n-type barrier region; an n-type diode drift region; and an n-type cathode region. An on-resistance of a first pillar region with respect to the anode electrode is higher than an on-resistance of a second pillar region with respect to the anode electrode. The second pillar region is located at a position close to the IGBT region.

Umgekehrt leitender bipolarer Transistor mit isoliertem Gate

Eine Halbleiterschicht eines umgekehrt leitenden bipolaren Transistors mit isoliertem Gate wird mit einem Driftbereich eines ersten Leitfähigkeitstyps, einem Körperbereich eines zweiten Leitfähigkeitstyps, der über den Driftbereich angeordnet ist, und einem Barrierenbereich des ersten Leitfähigkeitstyps, der in dem Körperbereich angeordnet ist und elektrisch mit der Emitterelektrode über ein Säulenbauteil verbunden ist, das sich von der einen der Hauptoberflächen der Halbleiterschicht erstreckt, bereitgestellt. Der Barrierenbereich ist nicht in Kontakt mit einer Seitenoberfläche des isolierten Grabengates.

LASER CAN MICROSCOPE AND MICROSCOPIC MONITORING PROCEDURE

REVERSE CONDUCTING IGBT

A reverse conducting IGBT that includes an insulated gate; a semiconductor layer having a first conductivity type drift region, a second conductivity type body region, a first conductivity type emitter region, and a second conductivity type intermediate region; and an emitter electrode provided on a surface of the semiconductor layer. The first conductivity type drift region of the semiconductor layer contacts the insulated gate. The second conductivity type body region of the semiconductor layer is provided on the drift region and contacts the insulated gate. The first conductivity type emitter region of the semiconductor layer is provided on the body region and contacts the insulated gate. The second conductivity type intermediate region of the semiconductor layer is provided on the emitter region and is interposed between the emitter region and the emitter electrode.

Photoelectric conversion apparatus, imaging system, and moving body

A photoelectric conversion apparatus includes first and second signal lines, first and second circuits, and a switch. Signals based on electric charges generated in first and second photoelectric conversion portions are to be read out to the first and second signal lines, respectively. The first circuit includes a first input unit to which the first signal line is connected. The first circuit is configured to perform processing of a signal input to the first input unit, with a first gain. The second circuit includes a second input unit to which the second signal line is connected. The second circuit is configured to perform processing of a signal input to the second input unit. The switch is configured to perform switching between a connected state and a disconnected state between the first signal line and the second signal line.

Sample observation apparatus and method for generating observation image of sample

A sample observation apparatus includes a memory and a main controller. The main controller stores a first number of photoelectrons required in a raw image for generating a super-resolution image. The main controller calculates the number of image data sets to be added together for generating the raw image based on the first number of photoelectrons stored in the memory and a predetermined image acquisition condition, acquires multiple sets of image data of the same region of a sample by repeatedly detecting light from the same region based on the calculated number of image data sets, and generates the raw image by adding together the acquired multiple sets of image data of the same region.

Observation system

A fixed region at an outer periphery or an inner periphery of a sample that has a three-dimensional structure is selectively analyzed with accuracy. Provided is an observation system including a CPU that recognizes the 3D shape of an observation target, such as a spheroid, from a 3D image of cells, that sets a 3D mask of which the radial distance from a circumscribed surface of the recognized 3D shape is fixed over the entire region of the circumscribed surface and of which the shape is similar to the circumscribed surface, and that identifies a cell contained inside the set 3D mask.

SEMICONDUCTOR DEVICE

A technology capable of suppressing a fluctuation in voltage in a diode region is provided. A resistance value between the emitter electrode and the lower body region is lower than a resistance value between the anode electrode and the lower anode region when the semiconductor device operates as a diode. A quantity of holes between the emitter electrode and the second barrier region is smaller than a quantity of holes between the anode electrode and the first barrier region. 1. A semiconductor device comprising a diode region and an IGBT region in a same semiconductor substrate ,whereinthe diode region comprises: a cathode electrode; a cathode region configured a first conductive type semiconductor; a first drift region configured of a first conductive type semiconductor having a low impurity concentration; a lower anode region configured of a second conductive type semiconductor; an upper anode region configured of a second conductive type semiconductor; an anode electrode configured of metal; a first barrier region configured of a first conductive type semiconductor having a higher impurity concentration than the impurity concentration of the first drift region, and arranged between the lower anode region and the upper anode region; and a first pillar region configured of a first conductive type semiconductor having a higher impurity concentration than the impurity concentration of the first barrier region, and arranged so as to connect the first barrier region and the anode electrode,the first pillar region and the anode electrode make a Schottky junction,the IGBT region comprises: a collector electrode; a collector region configured of a second conductive type semiconductor; a second drift region configured of a first conductive type semiconductor having a low impurity concentration, and being in continuation with the first drift region; a lower body region configured of a second conductive type semiconductor; an upper body region configured of a second ...

SEMICONDUCTOR DEVICE

A semiconductor device may include a semiconductor substrate, an insulator film covering a part of an upper surface of the substrate, and a gate electrode opposing the upper surface via the insulator film. In the semiconductor substrate, a drift layer extending through a body layer to the upper surface opposes the gate electrode via the insulator film. The insulator film extends from the upper surface of the semiconductor substrate to an upper surface of the gate electrode by passing between the gate electrode and an upper electrode, and defines an opening at the upper surface of the gate electrode. In a first region being a set of straight lines where each line extends through an opposing surface of the drift layer that opposes the gate electrode perpendicularly to the opposing surface, the insulator film does not exist on the upper surface of the gate electrode.

SWITCHING ELEMENT AND METHOD OF MANUFACTURING THE SAME

A switching element may include a SiC substrate including an off-angle; a trench provided in an upper surface of the SiC substrate and extending along an off-direction of the SiC substrate in a plan view of the upper surface; a gate insulating film; and a gate electrode. The SiC substrate may include a source region of n-type; a contact region of p-type; a body region of p-type being in contact with the gate insulating film below the source region; a drift region of n-type being in contact with the gate insulating film below the body region; and low lifetime regions located in a range between the drift region and at least one of the source region and the contact region. The low lifetime regions may be arranged along the off-direction with intervals, and at least a part of the body region may be provided in the intervals. 1. A switching element , comprising:a SiC substrate including an off-angle;a trench provided in an upper surface of the SiC substrate and extending along an off-direction of the SiC substrate in a plan view of the upper surface;a gate insulating film covering an inner surface of the trench; anda gate electrode provided in the trench and insulated from the SiC substrate by the gate insulating film,wherein a source region of n-type disposed at the upper surface and being in contact with the gate insulating film;', 'a contact region of p-type disposed at the upper surface at a position adjacent to the source region;', 'a body region of p-type being in contact with the gate insulating film below the source region, connected to the contact region directly or via another p-type region, and having a p-type impurity density lower than a p-type impurity density of the contact region;', 'a drift region of n-type being in contact with the gate insulating film below the body region; and', 'a plurality of low lifetime regions located in a range between the drift region and at least one of the source region and the contact region, and having a point defect ...

ELECTRONIC ELEMENT, IRREVERSIBLE CIRCUIT ELEMENT AND FIXING METHOD

PROBLEM TO BE SOLVED: To provide an electronic element, an irreversible circuit element and a fixing method which facilitate fitting work. SOLUTION: The electronic element includes a conductive pattern-lying upper layer substrate, and a hooking lower layer substrate. The conductive pattern-lying upper layer substrate has a conductive pattern on a surface of the conductive pattern-lying upper layer substrate, with the surface being one surface of the conductive pattern-lying upper layer substrate. The hooking lower layer substrate is in contact with the conductive pattern-lying upper layer substrate on a first surface and has hooking portions which are provided substantially in parallel with the surface of the conductive pattern-lying upper layer substrate with both ends of a bottom base portion bent, with the bottom base portion being a portion that touches the conductive pattern-lying lower layer substrate. The height of a hooking portion bottom surface which is opposite to the first surface ...

Diode, Halbleitervorrichtung und Mosfet

Es ist eine Technologie offenbart, die dazu fähig ist, einen Verlust zum Zeitpunkt eines Schaltens in einer Diode zu reduzieren. Eine in der vorliegenden Spezifikation offenbarte Diode umfasst eine Kathodenelektrode, einen Kathodenbereich, der aus einem Halbleiter einer ersten Leitfähigkeitsart besteht, einen Driftbereich, der aus einem Halbleiter der ersten Leitfähigkeitsart mit niedriger Konzentration besteht, einen Anodenbereich, der aus einem Halbleiter einer zweiten Leitfähigkeitsart besteht, eine Anodenelektrode, die aus Metall besteht, einen Sperrbereich, der zwischen dem Driftbereich und dem Anodenbereich ausgebildet ist und aus einem Halbleiter der ersten Leitfähigkeitsart mit einer höheren Konzentration als jene des Driftbereichs besteht, und einen Säulenbereich, der derart ausgebildet ist, um den Sperrbereich mit der Anodenelektrode zu verbinden, und aus einem Halbleiter der ersten Leitfähigkeitsart mit einer höheren Konzentration als jene des Grenzbereichs besteht. Der Säulenbereich ...

SEMICONDUCTOR APPARATUS

A semiconductor apparatus has a semiconductor substrate, a first trench provided in a front surface of the semiconductor substrate, an anode electrode provided inside the first trench, and a cathode electrode provided on a back surface of the semiconductor substrate. The semiconductor substrate has a first p-type region, a second p-type region, and a main n-type region which is in contact with the first p-type region and the second p-type region, and is in Schottky contact with the anode electrode in the side surface of the first trench. The semiconductor substrate satisfies the relationship that an area of the first trench, when the front surface is viewed in a plan view, is smaller than an area of a Schottky interface where the main n-type region is in contact with the anode electrode in the side surface of the first trench.

Insulated gate type switching device and method for manufacturing the same

A method of manufacturing an insulated gate type switching device includes forming a gate trench that has a first portion with a first width in a first direction and a second portion with a second width in the first direction, the second width being wider than the first width. In an oblique implantation, second conductivity type impurities are irradiated at an irradiation angle inclined around an axis orthogonal to the first direction. The first width, the second width, and the irradiation angle are set such that the second conductivity type impurities are suppressed, at a first side surface of the first portion, from being implanted into a part below a lower end of a second semiconductor region, and at a second side surface of the second portion, the impurities are implanted into the part below the lower end of the second semiconductor region.

VERFAHREN ZUM HERSTELLEN EINER VERBUNDHALBLEITERVORRICHTUNG UNDVERBUNDHALBLEITERVORRICHTUNG

Eine tiefe Schicht (5) vom p-Typ und eine Begrenzungsschicht (7) werden gleichzeitig durch Einleiten eines Dotierungsgases, das ein Dotiermittel vom p-Typ enthält, und eines Dotierungsgases, das ein Dotiermittel vom n-Typ enthält, ausgebildet. Genauer gesagt wird unter Verwendung einer Ebenenorientierungsabhängigkeit jeweils einer SiC-Schicht vom p-Typ und einer SiC-Schicht vom n-Typ während eines epitaxialen Wachsens die tiefe Schicht (5) vom p-Typ auf einem Boden des tiefen Grabens (15) ausgebildet, und die Begrenzungsschicht wird auf einer s-Seitenfläche des tiefen Grabens (15) ausgebildet. Auf diese Weise wird ein vertikaler MOSFET, der die Begrenzungsschicht (7) auf einer Seitenfläche der tiefen Schicht (5) vom p-Typ enthält, genau ausgebildet.

Electricity storage device

An electricity storage device includes an electrode assembly, a case, a first terminal, and a second terminal. The electrode assembly includes one or more first electrodes and one or more second electrodes, which are stacked alternately with one or more separators in between. The case accommodates the electrode assembly. The first terminal and the second terminal are located on a wall portion of the case. First tabs and second tabs are provided on ends of the first and second electrodes, respectively. A circuit breaker is arranged between the second terminal and the electrode assembly. A part of the first terminal and the first tabs are arranged along the width direction of the electrode assembly, and the circuit breaker and the second tabs are arranged along the width direction of the electrode assembly.

LIGHT-EMITTING DEVICE

A light-emitting device includes a substrate, an electrode, a light-emitting element, a variable light absorbing layer, and a sealing body. The electrode is formed on the substrate. The light-emitting element is disposed on the substrate and electrically connected to the electrode. The variable light absorbing layer is formed so as to cover the electrode on the substrate. The variable light absorbing layer contains a plurality of metal oxide particles that change a light absorption property by irradiation with an ultraviolet light. The sealing body is formed on the substrate so as to seal the light-emitting element. The sealing body has translucency to a light emitted from the light-emitting element. 1. A light-emitting device comprising:a substrate;an electrode formed on the substrate;a light-emitting element disposed on the substrate and electrically connected to the electrode;a variable light absorbing layer formed so as to cover the electrode on the substrate, the variable light absorbing layer containing a plurality of metal oxide particles that change a light absorption property by irradiation with an ultraviolet light; anda sealing body formed on the substrate so as to seal the light-emitting element, the sealing body having translucency to a light emitted from the light-emitting element.2. The light-emitting device according to claim 1 , whereinthe variable light absorbing layer is formed up to an end portion of an upper surface of the substrate, and the variable light absorbing layer has a side surface exposed to an external atmosphere.3. The light-emitting device according to claim 1 , further comprisinga frame body formed so as to surround the light-emitting element on the substrate, whereinthe variable light absorbing layer is formed in a region inside the frame body on the substrate, andthe sealing body is formed so as to bury the light-emitting element, the variable light absorbing layer, and the frame body on the substrate.4. The light-emitting device ...

PHOTOELECTRIC CONVERSION APPARATUS, IMAGING SYSTEM, AND MOVING BODY

A photoelectric conversion apparatus includes first and second signal lines, first and second circuits, and a switch. Signals based on electric charges generated in first and second photoelectric conversion portions are to be read out to the first and second signal lines, respectively. The first circuit includes a first input unit to which the first signal line is connected. The first circuit is configured to perform processing of a signal input to the first input unit, with a first gain. The second circuit includes a second input unit to which the second signal line is connected. The second circuit is configured to perform processing of a signal input to the second input unit. The switch is configured to perform switching between a connected state and a disconnected state between the first signal line and the second signal line. 1. A photoelectric conversion apparatus comprising:a plurality of photoelectric conversion portions;a plurality of microlenses disposed on the plurality of photoelectric conversion portions;a first signal line to which a first signal based on electric charges generated in a first photoelectric conversion portion among the plurality of photoelectric conversion portions is to be read out;a second signal line to which a second signal based on electric charges generated in a second photoelectric conversion portion among the plurality of photoelectric conversion portions is to be read out;a first circuit including a first input unit to which the first signal line is connected, the first circuit being configured to perform processing of amplification and/or analog-to-digital (AD) conversion of a signal input to the first input unit, with a first gain;a second circuit including a second input unit to which the second signal line is connected, the second circuit being configured to perform processing of amplification and/or AD conversion of a signal input to the second input unit, with a second gain different from the first gain; anda switch ...

OBSERVATION SYSTEM

A fixed region at an outer periphery or an inner periphery of a sample that has a three-dimensional structure is selectively analyzed with accuracy. Provided is an observation system including a CPU that recognizes the 3D shape of an observation target, such as a spheroid, from a 3D image of cells, that sets a 3D mask of which the radial distance from a circumscribed surface of the recognized 3D shape is fixed over the entire region of the circumscribed surface and of which the shape is similar to the circumscribed surface, and that identifies a cell contained inside the set 3D mask. 1. An observation system comprising at least one processor that is provided with hardware , recognize the 3D shape of an observation target from a 3D image of a fluorescent specimen;', 'set a similar region of which the distance in a radial direction from a circumscribed surface of the recognized 3D shape is fixed over the entire region of the circumscribed surface and of which the shape is similar to the circumscribed surface; and', 'identify a cell that is contained inside the set similar region or a cell component that constitutes the cell., 'wherein the at least one processor performs control so as to2. An observation system according to claim 1 , further comprising a storage unit that stores at least one computer program to be executed by the at least one processor.3. An observation system according to claim 1 , further comprising a thickness specifying unit that is configured to allow a user to specify a thickness in the radial direction of the similar region to be set claim 1 ,wherein the at least one processor performs control so as to set the similar region according to the thickness specified by the user by means of the thickness specifying unit.4. An observation system according to claim 1 , further comprising a distance specifying unit that is configured to allow a user to specify a distance in the radial direction from the circumscribed surface claim 1 , which forms the ...

HIGH FREQUENCY PROBE

PROBLEM TO BE SOLVED: To provide a high frequency probe capable of detecting a high frequency signal without damaging a component on a high frequency circuit board. SOLUTION: This probe has on a dielectric substrate 101, a microstrip line 103; and a quarter wavelength resonator 104 provided at an interval with the microstrip line 103 on one end of the microstrip line 103 in the noncontact state, having a quarter wavelength of a high frequency to be measured. The quarter wavelength resonator 104 is arranged in the noncontact state, close to a microstrip line 203 of a high frequency circuit 200 to be evaluated, and a high frequency signal of the high frequency circuit is resonated and detected. COPYRIGHT: (C)2009,JPO&INPIT ...

PURIFICATION PROCESS FOR HYDROLYSABLE ORGANIC SOLVENT

Methods for the removal of ionic contaminants from hydrolysable organic solvent by ion exchange resins are described. A mixed bed of ion exchange resin with cationic ion exchange resin and weak-base anionic ion exchange resin is used in such methods.

Image pickup apparatus that detects flash band and control method therefor

An image pickup apparatus which is capable of detecting a flash band with high accuracy even when no flash light is falling on a part of an image. The image pickup apparatus detects a band-shaped luminance step appearing in a plurality of frame images, which are obtained through image pickup by an image pickup unit, in a video comprised of the plurality of frame images. A detection area, which is for use in detecting the luminance step, is set in a part of the frame image according to a subject included in the frame image. Luminance data is obtained on a line-by-line basis in the detection area, and based on a difference in luminance data between corresponding lines in the frame images, the luminance step is detected.

Electric storage device

The electric storage device includes an electrode assembly having a positive electrode and a negative electrode, a case for housing the electrode assembly, a pressure relief valve, and positive and negative electrode conductive members that are electrically connected to the respective corresponding electrodes. The case has a wall in which the pressure relief valve is disposed. At least one of the positive and negative electrode conductive members includes an interposing portion located between the inner surface of the wall and an end face of the electrode assembly facing the inner surface, and a shielding portion located closer to the end face of the electrode assembly than the interposing portion. The shielding portion covers the pressure release valve from a side of the wall where the electrode assembly is located.

Laser scanning microscope

A laser scanning microscope includes a culture vessel that accommodates a specimen and is capable of maintaining an interior temperature and humidity thereof, and an optical system space adjacent and optically connected to the culture vessel. The optical system space includes a scanner that two-dimensionally scans ultrashort pulsed laser light across the specimen; an objective lens that focuses the scanned ultrashort pulsed laser light on the specimen and collects light coming from the specimen; a dichroic mirror, disposed between the scanner and the objective lens, that splits off the light coming from the specimen from the laser light; a photodetector that detects the split-off light coming from the specimen; and an outer cover, provided so as to surround the optical system space, that blocks light coming from outside the optical system space.

Halbleitereinrichtung

Halbleitereinrichtung (10) mit:einem Halbleitersubstrat (12) mit einem Diodenbereich (92) und einem IGBT Bereich (90);einer Anodenelektrode (14), die auf einer vorderen Oberfläche (12a) des Halbleitersubstrats (12) innerhalb des Diodenbereichs (92) gebildet ist;einer Kathodenelektrode (16), die auf einer hinteren Oberfläche des Halbleitersubstrats (12) innerhalb des Diodenbereichs (92) gebildet ist;einer Emitterelektrode (14), die auf der vorderen Oberfläche (12a) innerhalb des IGBTs Bereichs (90) gebildet ist;einer Kollektorelektrode (16), die auf der hinteren Oberfläche innerhalb des IGBT Bereichs (90) gebildet ist;einer Gateisolationsschicht (40); undeiner Gateelektrode (42), wobeider Diodenbereich (92) aufweist:einen Anodenbereich (34) des p-Typs, der mit der Anodenelektrode (14) über einen ohmschen Kontakt verbunden ist;eine Vielzahl von Säulenbereichen (24) des n-Typs, die lateral zu dem Anodenbereich (34) lokalisiert sind, in Kontakt mit dem Anodenbereich (34) sind, und mit der Anodenelektrode ...

Method for producing resin joined body and apparatus for producing resin joined body

Provided are a method and an apparatus for producing an adhesive-less resin joined body having high joining force to a thermoformed member. The present invention relates to a method for producing a resin joined body in which a first resin member and a second resin member are joined, the method comprising: a thermoforming step for thermoforming a joined surface of the first resin member with the second resin member and/or a joined surface of the second resin member with the first resin member in a state full of inert gas or in a vacuum environment; a surface treatment step for activating the joined surface of the first resin member and/or the second resin member; and a joining step for bonding the first resin member and the second resin member to each other at each joined surface after the thermoforming step and the surface treatment step.

DISPLAY DEVICE

The present invention addresses the problem of providing a display device that excels in waterproofness against moisture from a display side. A display device is provided with: a display for displaying an image on a display surface; a cover plate located on the display surface side of the display, the cover plate having a light-transmitting section for making the display surface visible; an elastic member provided so as to cover the side circumferential section of the cover plate; and an accommodation body having an open section that is open toward the cover plate side and a protruding section encircling the open section and protruding to the outer circumferential side of the open section. The display is bonded to the cover plate with a photocurable adhesive. The cover plate is secured via the elastic member to the protruding section by a caulked metal frame body. 1. A display device comprising:a display for displaying an image on a display surface;a cover plate located on the display surface side of the display, the cover plate having a light-transmitting portion for making the display surface visible;an elastic member provided so as to cover the side circumferential portion of the cover plate; andan accommodation body which is located further toward the display side than the cover plate and accommodates the display, the accommodation body having an opening that opens toward the cover plate side and a protruding portion surrounding the opening and protruding to the outer circumferential side of the opening,wherein the display is bonded to the cover plate by a photocurable adhesive, andwherein the cover plate is fixed via the elastic member to the protruding portion by a caulked metal frame body.2. The display apparatus according to claim 1 , further comprisinga case body which is located further toward the display side than the cover plate and is accommodated in the accommodation body, whereina circuit substrate connected electrically with the display is fixed to ...

Combined container and ink tanks for a printer

HIGH FREQUENCY DISTRIBUTION SYNTHESIZER

PROBLEM TO BE SOLVED: To provide a high frequency distribution synthesizer which is compact and has a simple structure even when an operating frequency is high and the number of branches is large. SOLUTION: In one embodiment, the high frequency distribution synthesizer has a basic port, a plurality of branch ports branched in correspondence to the basic port, and a substrate with a circuit of branching wirings from the basic port to the branch ports formed thereon, wherein the branch ports and the basic port are provided on the same surface on the substrate. COPYRIGHT: (C)2010,JPO&INPIT ...

Halbleitereinrichtung

Es wird eine Technologie zum Verhindern einer Gateinterferenz in einem RC-IGBT, der eine Diodenstruktur mit Schottky-Verbindungen aufweist, bereitgestellt. Eine Halbleitereinrichtung enthält ein Halbleitersubstrat mit einem Diodenbereich und einem IGBT Bereich. In dieser Halbleitereinrichtung enthält der Diodenbereich: einen Anodenbereich des p-Typs, der mit einer Anodenelektrode über einen ohmschen Kontakt verbunden ist; eine Vielzahl von Säulenbereichen des n-Typs, die mit der Anodenelektrode über Schottky-Kontakte verbunden sind; einen Barrierenbereich des n-Typs; einen Diodendriftbereich des n-Typs; und einen Kathodenbereich des n-Typs. Ein Einschaltwiderstand eines ersten Säulenbereichs mit Bezug auf die Anodenelektrode ist höher als ein Einschaltwiderstand eines zweiten Säulenbereichs mit Bezug auf die Anodenelektrode. Der zweite Säulenbereich ist an einer Position nahe dem IGBT Bereich lokalisiert.

PPAR-gamma activator

Umgekehrt leitender bipolarer Transistor mit isoliertem Gate

Eine Halbleiterschicht eines umgekehrt leitenden bipolaren Transistors mit isoliertem Gate ist mit einem Barrierenbereich des ersten Leitfähigkeitstyps versehen, wobei der Barrierenbereich in dem Körperbereich angeordnet ist und elektrisch mit der Emitterelektrode über ein Säulenbauteil verbunden ist, das sich von der einen der Hauptoberflächen der Halbleiterschicht erstreckt. Der Barrierenbereich enthält einen ersten Barrierenteilbereich, wobei ein Abstand zwischen dem ersten Barrierenteilbereich und dem Driftbereich ein erster Abstand ist, und einen zweiten Barrierenteilbereich, wobei ein Abstand zwischen dem zweiten Barrierenteilbereich und dem Driftbereich ein zweiter Abstand ist, der größer als der erste Abstand ist. Der zweite Barrierenteilbereich ist in Kontakt mit einer Seitenoberfläche eines isolierten Grabengates.

Electricity storage device

A power storage device (10) is provided with a power storage unit (20) that is provided with a positive electrode (21), a negative electrode (22), a separator (23), and a storage chamber (S) that is provided between the positive electrode (21) and the negative electrode (22) and that stores a liquid electrolyte in a liquid-tight manner. The power storage device is provided with a cell stack (30) in which a plurality of power storage cells (20) are stacked in series, and the side surface of the cell stack (30) with respect to the stacking direction is covered by a resin sealing part (24). A terminal positive electrode current collector (21a ') and a terminal negative electrode current collector (22a'), which are located on the outermost layer of the cell stack (30), are configured from a high-thermal-conductivity material having a thermal conductivity of 100 W/m * K or more. A positive electrode cooling unit (40) for cooling the terminal positive electrode current collector (21a ') and a ...

Diode, semiconductor device, and MOSFET

Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.

CONFOCAL SCANNING TYPE MICROSCOPE

PROBLEM TO BE SOLVED: To provide a confocal scanning type microscope capable of intuitively setting three-dimensional scanning areas for a plurality of observation objects scattered in the space of a sample and performing detailed scanning to the respective scanning areas, and to provide a three-dimensional scanning area designating method. SOLUTION: The confocal scanning type microscope is equipped with an objective to condense emitted light from a light source on the sample, a function to scan along a sample surface with converged light, and a photodetector to detect the intensity of light transmitted through a pinhole arranged at a position conjugate to the light focusing position of the objective by relatively moving the light focusing position of the objective and the position of the sample in the optical axis direction of the converged light. In the microscope, a three-dimensional image is constituted of a plurality of two-dimensional images acquired while moving a moving mechanism ...

Laser scanning microscope and microscopic observing method

To provide a laser scanning microscope including a laser beam source for stimulation that emits a laser beam for stimulation for applying photostimulation to a sample, a scanner that performs scanning with the laser beam for stimulation, a control device that controls the scanner, and an objective lens that condenses the laser beam for stimulation used for scanning by the scanner to the sample. The scanner has at least one acoustooptic device arranged on an optical path of the laser beam for stimulation. The control device determines a plurality of frequencies on the basis of the position and the range of a photostimulation region, and simultaneously applies the high-frequency signals of the determined plurality of frequencies to a vibrator attached to the acoustooptic device.

CONDUCTIVE COMPOSITION AND CONDUCTIVE FILM

Provided is a conductive film having a high conductivity in which electric resistance is less likely to increase, and a conductive composition for forming the same. The conductive composition includes an elastomer component, a fibrous carbon material having a fiber diameter of less than 30 nm, and a flake-like carbon material having a graphite structure, having an intensity ratio (G/D ratio) of a peak (G band) appearing in the vicinity of 1580 cmto a peak (D band) appearing in the vicinity of 1330 cmof Raman spectrum of not less than 1.8, and having a maximum length of not less than 150 nm and a thickness of not more than 100 nm. The conductive film is formed from the conductive composition. 1. A conductive composition characterized by comprising:an elastomer component;a fibrous carbon material having a fiber diameter of less than 30 nm; and{'sup': −1', '−1, 'a flake-like carbon material having a graphite structure, having an intensity ratio (G/D ratio) of a peak (G band) appearing in the vicinity of 1580 cmto a peak (D band) appearing in the vicinity of 1330 cmof Raman spectrum of not less than 1.8, and having a maximum length of not less than 150 nm and a thickness of not more than 100 nm.'}2. The conductive composition according to claim 1 , wherein the flake-like carbon material is produced from a carbon material having a graphite structure claim 1 , a G/D ratio of Raman spectrum of not less than 1.8 claim 1 , and a ratio of the minimum length to the maximum length (minimum length/maximum length) of not more than ⅕.3. The conductive composition according to claim 2 , wherein the carbon material is one or more kinds selected from carbon nanotubes having a fiber diameter of 30 nm or more claim 2 , cup-stacked carbon nanotubes claim 2 , graphite claim 2 , and expanded graphite.4. The conductive composition according to claim 1 , wherein the fibrous carbon material is carbon nanotubes.5. The conductive composition according to claim 1 , wherein the content of the ...

Vehicle Bumper

A vehicle bumper is provided that can increase the rigidity while ensuring a superior drainage capability in the vicinity of the location where the bumper is attached to a side face member. A vehicle bumper includes a middle portion extending in vehicle width direction, two lateral portions extending from the two ends of the middle portion towards side face members (front fender panels), an upper flange protruding inward, with respect to a vehicle body, from an upper edge of the lateral portions, an attachment flange that is continuous with the upper flange near an end of the lateral portions and protruding further inside the vehicle body than the upper flange, a long groove formed by a depression in an upper face of the upper flange, at least one rib that partitions the long groove in vehicle width direction into depressions, and water drainage holes formed in the depressions.

Semiconductor device and method for manufacturing same

A semiconductor device includes an inversion type semiconductor element, which has: a substrate; a drift layer; a saturation current suppression layer; a current dispersion layer; a base region; a source region; a connection layer; a plurality of trench gate structures; an interlayer insulation film; a source electrode; and a drain electrode. A channel region is provided in a portion of the base region in contact with each trench gate structure by applying a gate voltage to the gate electrode and applying a normal operation voltage as a drain voltage to the drain electrode; and a current flows between the source electrode and the drain electrode through the source region and the JFET portion.

POINTER DISPLAY DEVICE

PROBLEM TO BE SOLVED: To provide a pointer display device capable of realizing cost reduction. SOLUTION: The pointer display device includes a pointer display means 3 having a driving source 10, a pointer 34, and a display board 35, and indicating an index part 354 with the pointer 34; a liquid crystal display means 4 which includes an information display part 47 covering a first pointer area PA1 of the pointer 34 and a first display board area DA1 of the display board 35 such that a viewer cannot see through them, and which is placed on the pointer display means 3 such that a second pointer area PA2 of the pointer 34 and a second display board area DA2 can be visually recognized; and a light source 32 illuminating the pointer 34 and the display board 35. The first pointer area PA1 and the first display board area DA1 are formed of an optically transparent material to constitute a light transmission area, and the information display part is illuminated by the light of the light source 32 ...

IGBT mit eingebauter Diode

Wenn ein IGBT eine Barrierenschicht 10 hat, die einen oberen Körperbereich 8a von einem unteren Körperbereich 8b trennt, ist eine Leitfähigkeitsmodulation erhöht und ein Einschaltwiderstand sinkt. Wenn der IGBT auch einen Schottky-Kontaktbereich 6 hat, der sich so erstreckt, dass er die Barrierenschicht 10 erreicht, kann eine Diodenstruktur erhalten werden. In diesem Fall wird jedoch ein Strompfad erzeugt, der sich sowohl durch die Barrierenschicht 10 als auch den Schottky-Kontaktbereich 6 erstreckt, um einen Emitterbereich 4 zu erreichen, was zu einem Anwachsen eines Sättigungsstroms und einem Abnehmen in einem Kurzschlusswiderstand führt. Der Schottky-Kontaktbereich 6 ist von dem Emitterbereich 4 durch den oberen Körperbereich 8a getrennt. Durch Auswählen einer Verunreinigungskonzentration in dem oberen Körperbereich 8a kann ein Anwachsen in einem Sättigungsstrom verhindert werden. Alternativ kann eine Blockierstruktur, die es verhindert, dass eine Verarmungsschicht, die sich von dem ...

COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate including a foundation layer having a first conductivity type; forming a deep trench in the foundation layer; and forming a deep layer having a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench. A period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period. In the forming the deep layer, the deep layer is further formed in a bottom corner portion of the deep trench by starting the introducing of the dopant gas during the temperature increasing period and starting the introducing of the material gas after the temperature increasing period. 1. A method for manufacturing a compound semiconductor device , the method comprising:providing a semiconductor substrate that includes a foundation layer having a first conductivity type and formed of a compound semiconductor;forming a deep trench in the foundation layer; andforming a deep layer that has a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas including a second conductivity type dopant into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench, whereina period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period, and starting the introducing of the dopant gas including the second conductivity type dopant during the temperature increasing period; and', 'starting the introducing of the material gas after the temperature increasing period., 'in the forming the deep layer, the deep layer is further formed in a bottom corner ...

Method of manufacturing resin bonded body

Provided is a method for easily manufacturing a resin bonded body with a high bonding force. The present invention relates to a method for manufacturing a resin bonded body in which a first resin member and a second resin member are bonded to each other, the method comprising: a liquid activation step for activating liquid to generate an active species in the liquid to obtain active liquid; a liquid contacting step for bringing the active liquid obtained in the liquid activation step into contact with a surface of the first resin member, the surface being bonded to the second resin member,, and/or a surface of the second resin member, the surface being bonded with the first resin member,; and a bonding step for, after the liquid contacting step, bonding the first and second resin members between the bonding surfaces.

Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device includes: forming a trench on a surface of a semiconductor substrate; forming an oxide film on side surfaces and a bottom surface of the trench; removing at least a part of the oxide film by dry etching from the bottom surface of the trench; and ion-implanting conductive impurities into the semiconductor substrate through the bottom surface of the trench after the dry etching. The dry etching is reactive ion etching in which etching gas including fluorocarbon based gas having a carbon atom ring structure, oxygen gas, and argon gas is used.

VERFAHREN ZUM HERSTELLEN EINER HALBLEITERVORRICHTUNG

Ein Verfahren zum Herstellen einer Halbleitervorrichtung (10) enthält: Ausbilden eines Grabens (13) auf einer Fläche eines Halbleitersubstrats (12); Ausbilden eines Oxidfilms (54) auf Seitenflächen (13a) und einer Bodenfläche (13b) des Grabens (13); Entfernen mindestens eines Teils des Oxidfilms (54) durch Trockenätzen von der Bodenfläche (13b) des Grabens (13); und Durchführen einer Ionenimplantation von leitenden Verunreinigungen in das Halbleitersubstrat (12) durch die Bodenfläche (13b) des Grabens (13) nach dem Trockenätzen. Das Trockenätzen ist ein reaktives lonenätzen, bei dem Ätzgas (112), das Fluorkohlenstoff-basiertes Gas, das eine Kohlenstoffatom-Ringstruktur aufweist, Sauerstoffgas und Argongas enthält, verwendet wird.

Semiconductor device

A semiconductor device includes a semiconductor layer and a trench gate portion that extends toward a deep portion from a front surface of the semiconductor layer. The semiconductor layer includes an island region surrounded by the trench gate portion. A first side surface of the trench gate portion and a second side surface of the trench gate portion are in contact with the island region. A first conductivity type contact region that includes a first contact region that is in contact with the first side surface and a second contact region that is in contact with the second side surface is provided in the island region. Moreover, a second conductivity type contact region that is in contact with the trench gate portion at a position between the first contact region and the second contact region is provided in the island region.

COAXIAL CABLE CONNECTION/PHASE ADJUSTING DEVICE

PROBLEM TO BE SOLVED: To provide a simply structured and inexpensive coaxial cable connection/phase adjusting device capable of precisely phase adjustment of a high frequency higher than a conventional one, and capable of maintaining the precise phase adjustment for a long period of time. SOLUTION: In the coaxial cable connection/phase adjusting device, the female screw of the rotatable external conductor 12c of a second connector element 12 is threadedly engaged with the male screw of the external conductor 10c of a first connector element 10, a rod-shaped center conductor of the second connector element is inserted in the center hole of the hollow center conductor of the first connector element, the first and second connector elements are mutually and electrically connected thereby, a desired combination of a plurality of spacers 14a, 14b, 14c, 14d having mutually different prescribed thicknesses are held between the outwardly projecting part 10d of the base end part of the male screw ...

Elektrizitätsspeichervorrichtung

Eine Elektrizitätsspeichervorrichtung weist eine Elektrodenbaugruppe, ein Gehäuse, ein erstes Terminal und ein zweites Terminal auf. Die Elektrodenbaugruppe weist eine oder mehrere erste Elektroden und eine oder mehrere zweite Elektroden auf, die abwechselnd mit einem oder mehreren Separatoren dazwischen gestapelt sind. Das Gehäuse beherbergt die Elektrodenbaugruppe. Das erste Terminal und das zweite Terminal befinden sich an einem Wandabschnitt des Gehäuses. Erste Streifen und zweite Streifen sind an Enden der ersten bzw. zweiten Elektrode vorgesehen. Ein Stromkreisunterbrecher ist zwischen dem zweiten Terminal und der Elektrodenbaugruppe angeordnet. Ein Teil des ersten Terminals und die ersten Streifen sind entlang der Breitenrichtung der Elektrodenbaugruppe angeordnet und der Stromkreisunterbrecher und die zweiten Streifen sind entlang der Breitenrichtung der Elektrodenbaugruppe angeordnet.

Halbleitervorrichtung und Verfahren zur Herstellung der Halbleitervorrichtung

Halbleitervorrichtung (10), miteinem Halbleitersubstrat (12), das einen IGBT-Bereich (20) und einen Diodenbereich (40) umfasst,einer Emitterelektrode (14), die auf einer vorderen Oberfläche des Halbleitersubstrates (12) in dem IGBT-Bereich (20) bereitgestellt ist,einer Anodenelektrode (14), die auf der vorderen Oberfläche des Halbleitersubstrates (12) in dem Diodenbereich (40) bereitgestellt ist, undeiner rückseitigen Elektrode (16), die auf einer rückseitigen Oberfläche des Halbleitersubstrates (12) bereitgestellt ist, wobeider IGBT-Bereich (20) umfasst:einen Emitterbereich (22) vom n-Typ, der mit der Emitterelektrode (14) in Kontakt steht;einen Körperbereich (24) vom p-Typ, der mit der Emitterelektrode (14) in Kontakt steht;einen IGBT-Driftbereich (26) vom n-Typ, der von dem Emitterbereich (22) durch den Körperbereich (24) getrennt ist;einen Kollektorbereich (30) vom p-Typ, der von dem Körperbereich (24) durch den IGBT-Driftbereich (26) getrennt ist, und mit der rückseitigen Elektrode ...

Temperature sensing semiconductor device

A semiconductor device includes a semiconductor substrate of silicon carbide, and a temperature sensor portion. The semiconductor substrate includes a portion in which an n-type drift region and a p-type body region are laminated. The temperature sensor portion is disposed in the semiconductor substrate and is separated from the drift region by the body region. The temperature sensor portion includes an n-type cathode region being in contact with the body region, and a p-type anode region separated from the body region by the cathode region.

ACTIVE PHASED ARRAY ANTENNA APPARATUS

PROBLEM TO BE SOLVED: To provide an active phased array antenna apparatus that is compact and weight-reduced and has excellent outward consistency with various other devices and materials mounted at the same time when the antenna apparatus is mounted on an aircraft. SOLUTION: Notches 471a, 471b, and 471c are formed to a linear active phased array antenna unit 41 on the basis of respective cross-sectional shapes of a power signal wiring board 5, a high frequency signal wiring board 6, and a control signal wiring board 7. When a power signal connector 441, a high frequency signal connector 451, and a control signal connector 461 provided to the linear active phased array antenna unit 41 are connected to the power signal wiring board 5, the high frequency signal wiring board 6, and the control signal wiring board 7, respectively, the three wiring boards 5, 6, 7 are housed in the notches 471a, 471b, and 471c, respectively, so as to avoid projection of the components in a back side direction ...

Schaltelement und Verfahren zum Herstellen desselben

Ein Schaltelement kann ein Halbleitersubstrat, einen Graben, einen Gate-Isolationsfilm, und eine Gate-Elektrode umfassen. Eine Drift-Region kann unter der Body-Region in Kontakt mit dem Gate-Isolationsfilm sein. Eine Boden-Region kann an einer Bodenfläche des Grabens in Kontakt mit dem Gate-Isolationsfilm sein. Eine Verbindungs-Region kann an einer Seitenfläche des Grabens in Kontakt mit dem Gate-Isolationsfilm sein und verbindet die Body-Region mit der Boden-Region. Die Seitenfläche des Grabens kann eine erste Seitenfläche und eine zweite Seitenfläche umfassen, die unter der ersten Seitenfläche positioniert ist. Ein Neigungswinkel der zweiten Seitenfläche kann größer als ein Neigungswinkel der ersten Seitenfläche sein. Eine Grenzschicht zwischen der Body-Region und der Drift-Region kann an der ersten Seitenfläche in Kontakt mit dem Gate-Isolationsfilm sein.

Semiconductor apparatus

A semiconductor apparatus has a semiconductor substrate, a first trench provided in a front surface of the semiconductor substrate, an anode electrode provided inside the first trench, and a cathode electrode provided on a back surface of the semiconductor substrate. The semiconductor substrate has a first p-type region, a second p-type region, and a main n-type region which is in contact with the first p-type region and the second p-type region, and is in Schottky contact with the anode electrode in the side surface of the first trench. The semiconductor substrate satisfies the relationship that an area of the first trench, when the front surface is viewed in a plan view, is smaller than an area of a Schottky interface where the main n-type region is in contact with the anode electrode in the side surface of the first trench.

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME

A semiconductor device includes an inversion type semiconductor element, which has: a substrate; a drift layer; a saturation current suppression layer; a current dispersion layer; a base region; a source region; a connection layer; a plurality of trench gate structures; an interlayer insulation film; a source electrode; and a drain electrode. A channel region is provided in a portion of the base region in contact with each trench gate structure by applying a gate voltage to the gate electrode and applying a normal operation voltage as a drain voltage to the drain electrode; and a current flows between the source electrode and the drain electrode through the source region and the JFET portion. 1. A semiconductor device comprising an inversion type semiconductor element , the semiconductor element including:a substrate having a first conductivity type or a second conductivity type and made of semiconductor;a drift layer arranged on the substrate and made of semiconductor having the first conductivity type with an impurity concentration lower than the substrate;a saturation current suppression layer disposed on the drift layer and including: a plurality of electric field block layers made of semiconductor having the second conductivity type and arranged in a stripe pattern along one direction a longitudinal direction; and a JFET portion made of semiconductor having the first conductivity type and including a plurality of portions which are arranged in a stripe pattern and alternately arranged with the electric field block layer;a current dispersion layer made of semiconductor having the first conductivity type with a first conductivity type impurity concentration higher than the drift layer and arranged on the saturation current suppression layer;a base region made of semiconductor having the second conductivity type and disposed on the current dispersion layer;a source region made of semiconductor having the first conductivity type with the first conductivity type ...

MICROSCOPE SYSTEM

PROBLEM TO BE SOLVED: To generate a map image formed by combining many partial images in a short period of time. SOLUTION: The microscope system 1 includes: a microscope 2 provided with a motorized stage 5 on which one or more containers containing a specimen are mounted and which can adjust the position of the container, a scanner 7 scanning with laser light radiated onto the specimen in the container, an objective lens 8 focusing the scanning laser light on the sample, an image acquisition section 9 acquiring a specimen image by detecting fluorescence produced in the specimen irradiated with the laser beam, and a dark box 10 containing these components; a storage section storing the mounting position of the container on the motorized stage 5; an image acquisition position setting section setting acquisition positions of the partial images of the inside of the container acquired by the image acquisition section 9 on the basis of the stored mounting position of the container; a controller ...

HIGH-FREQUENCY SUBSTRATE LINE

PROBLEM TO BE SOLVED: To provide a high frequency transmission line capable of easily adjusting insertion loss of the transmission line to a desired level. SOLUTION: On a position substantially right above a signal line layer, a part of a ground layer is selectively removed at a spacing of λ/4 to form a depression portion. A radio wave absorber is stuck on the depression portion. COPYRIGHT: (C)2009,JPO&INPIT ...

STROMSPEICHERVORRICHTUNG

Diese Stromspeichervorrichtung hat ein Gehäuse, das eine Elektrodenbaugruppe und eine elektrolytische Lösung beherbergt, und ein Druckablassventil, das in einer Wand des Gehäuses vorhanden ist. Die Elektrodenbaugruppe weist Elektroden auf, die unterschiedliche Polaritäten haben und voneinander isoliert sind. Ein Abschirmbauteil ist zwischen der Innenfläche der Wand und der Endfläche der Elektrodenbaugruppe angeordnet. Ein Punkt, der sich in einer Mitte des Gehäuses in einer Vorderansicht des Gehäuses befindet, die in der Stapelrichtung der Elektroden genommen ist, und sich in einer Mitte einer Abmessung der Elektrodenbaugruppe in der Stapelrichtung befindet, wird als ein Mittelpunkt bezeichnet, und ein Bereich, der von einer Ebene umgeben wird, die den Mittelpunkt und eine Kontur des Druckablassventils in einem kürzesten Abstand verbindet, wird als ein dreidimensionaler Bereich bezeichnet. Das Abschirmbauteil weist einen Abschirmabschnitt auf, der einen Querschnitt des dreidimensionalen ...

VERTICAL-TYPE SEMICONDUCTOR DEVICE

A buffer layer includes an n-type first buffer region and an n-type second buffer region. The first buffer region is provided at a first depth from a first main surface of a semiconductor layer and has an impurity concentration higher than an impurity concentration of a drift layer. The second buffer region is provided at a second depth from the first main surface of the semiconductor layer and has an impurity concentration higher than the impurity concentration in the drift layer, the second depth being shallower than the first depth. The first buffer region delimits an opening in a plane of the semiconductor layer at the first depth. The second buffer region delimits an opening in a plane of the semiconductor layer at the second depth. 15-. (canceled)6. A vertical-type semiconductor device , comprising:a semiconductor layer;a first main electrode that coats a first main surface of the semiconductor layer; anda second main electrode that coats a second main surface of the semiconductor layer,wherein a buffer layer;', 'a first semiconductor layer of a first conductivity-type that is in contact with the buffer layer and disposed closer to the second main surface relative to the buffer layer; and', 'a second semiconductor layer of a second conductivity-type that is in contact with the first semiconductor layer and disposed closer to the second main surface relative to the first semiconductor layer,, 'the semiconductor layer comprises a first buffer region of the first conductivity-type that is provided at a first depth from the first main surface and has an impurity concentration higher than an impurity concentration of the first semiconductor layer, and', 'a second buffer region of the first conductivity-type that is provided at a second depth from the first main surface and has an impurity concentration higher than the impurity concentration of the first semiconductor layer, the second depth being shallower than the first depth,, 'the buffer layer comprisesthe first ...

Halbleitereinrichtung und Verfahren zum Herstellen der Halbleitereinrichtung

Eine Halbleitereinrichtung (10) enthält: ein Halbleitersubstrat (12), eine obere Elektrode (14), eine untere Elektrode (16) und eine Gateelektrode (42). In dem Halbleitersubstrat sind ein Körperbereich (22), ein Säulenbereich (24) und ein Barrierenbereich (26) gebildet. Der Säulenbereich hat eine Verunreinigung des n-Typs, ist auf einer lateralen Seite des Körperbereichs gebildet und erstreckt sich entlang einer Tiefe von einer oberen Oberfläche des Halbleitersubstrats zu einem unteren Ende des Körperbereichs. Der Barrierenbereich hat eine Verunreinigung des n-Typs und ist auf einer unteren Seite des Körperbereichs und des Säulenbereichs gebildet. Der Barrierenbereich ist auf der unteren Seite des Säulenbereichs gebildet. Eine Verunreinigungskonzentrationsverteilung des n-Typs in einer Tiefenrichtung in dem Säulenbereich und dem Barrierenbereich hat einen Maximalwert in dem Säulenbereich. Die Verunreinigungskonzentrationsverteilung des n-Typs hat einen Knickpunkt auf einer Seite, die tiefer ...

Purification process for hydrolysable organic solvent

Methods for the removal of ionic contaminants from hydrolysable organic solvent by ion exchange resins are described. A mixed bed of ion exchange resin with cationic ion exchange resin and weak-base anionic ion exchange resin is used in such methods.

Steel pipe for automobile piping

A steel pipe for use in a piping of an automobile is provided, which can exhibit enhanced corrosion resistance and resistance to chipping required for a steel pipe for use in a vehicle, such as a fuel piping or brake piping, without need of employing a thicker protective resin coating layer as well as provide excellent formability for processing an end portion of the pipe. In a steel pipe which is coated with a multilayered coating including a plated coating, the multilayered coating comprises a hot dipped coating 12, a chemical conversion coating 14 provided as an outer layer of the hot dipped coating, and an outermost thin PA resin coating 18.

POWER STORAGE APPARATUS

This power storage apparatus has a case accommodating an electrode assembly and an electrolytic solution, and a release valve present in the wall of the case. The electrode assembly includes electrodes which have different polarities and are insulated from each other. A shielding member is arranged between the inner surface of the wall and the end surface of the electrode assembly. A point located in a center of the case in a front view of the case taken in the stacking direction of the electrodes and located in a center of a dimension of the electrode assembly in the stacking direction is referred to as a center point, and a region surrounded by a plane connecting the center point and a contour of the pressure release valve at a shortest distance is referred to as a three-dimensional region. The shielding member includes a shielding portion that entirely covers a cross section of the three-dimensional region along the end face of the electrode assembly. 1. A power storage apparatus comprising:an electrode assembly having a layered structure and including electrodes that are insulated from each other and have different polarities;an electrolytic solution;a case that accommodates the electrode assembly and the electrolytic solution;a pressure release valve that exists in a wall of the case and is configured to be ripped open when pressure in the case reaches a release pressure in order to release the pressure out of the case; anda shielding member located between an inner surface of the wall and an end face of the electrode assembly facing the inner surface, whereinan axis extending in a stacking direction of the electrodes is referred to as an X-axis,an axis orthogonal to the X-axis and parallel to the wall is referred to as a Y-axis,a point located in a center of the case in a front view of the case taken in a direction of the X-axis and located in a center of a dimension of the electrode assembly in the direction of the X-axis is referred to as a center point,a ...

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CHICKEN EMBRYONIC STEM CELL AND METHOD FOR EVALUATION THEREOF

A chicken embryonic stem cell is established, which stably has pluripotency and an ability of being differentiated into a germ cell. For evaluating on whether or not the chicken embryonic stem cell can be applied to genetic modification technique, detection is made on a protein which serves as an indicator of the ability of being differentiated into a germ cell. This provides (i) a chicken embryonic stem cell applicable to genetic modification technique and (ii) a method for evaluation of the chicken embryonic stem cell.

OBSERVATION APPARATUS AND OBSERVATION METHOD

PROBLEM TO BE SOLVED: To provide an observation apparatus capable of easily comparing and observing plural pieces of image information acquired at a specific time by a plurality of image information acquisition methods having different acquisition timings of the image. SOLUTION: An observation apparatus 1 is provided with a timer 8 to count an observation time, a PMT 16 and a CCD 4 having different acquisition timings to acquire pieces of image information of a sample A, a storage part 9 to store the acquired pieces of image information and pieces of observation information counted by the timer 8 in association with each other when the PMT 16 and the CCD 4 acquired the pieces of image information, a controller 5 to set a display criterion to correlate the pieces of image information stored in the storage part 9 each other by the observation times corresponding to these pieces of image information and based on the set display criterion correlate the pieces of image information each other ...

HALBLEITERVORRICHTUNG UND VERFAHREN ZUM HERSTELLEN DERSELBEN

Die Längsrichtung der Graben-Gatestruktur ist dieselbe wie die Längsrichtung des Streifenabschnitts des JFET-Abschnittes (3) und die Längsrichtung der Elektrofeld-Blockierschicht (4), und die Längsrichtung der Verbindungsschicht (9) vom zweiten Leitungstyp kreuzt diese Längsrichtungen. Bei einer derartigen Konfiguration kann das Intervall zwischen den Graben-Gatestrukturen unabhängig von der Verbindungsschicht (9) festgelegt werden, und die Verbindungsschicht (9) kann schmaler als in dem Fall gemacht werden, in dem die Verbindungsschicht zwischen den Graben-Gatestrukturen angeordnet ist.

Observation system

Provided is an observation system including: a monitor; a CPU that identifies, in a 3D image including the plurality of cells, the respective cells by assigning labels that differ from one another to the respective cells, that associates three mutually-intersecting cross-sectional images that constitute the 3D image, and that simultaneously displays the cross-sectional images on the monitor; and an input unit with which an operator specifies an arbitrary cell in any of the cross-sectional images displayed on the monitor. The CPU extracts, from the 3D image, the cross-sectional shapes, in the respective cross-sectional images, of the cell specified by using the input unit, on the basis of the labels, associates the extracted cross-sectional shapes of the cell with one another, and displays the extracted cross-sectional shapes in the respective cross-sectional images displayed on the monitor, in a distinguishable manner from the other cells.

IMAGE SENSOR, IMAGE CAPTURING APPARATUS AND IMAGE PROCESSING APPARATUS

An image sensor comprises: a pixel region including a plurality of microlenses arranged in a matrix, and a plurality of photoelectric conversion portions provided for each of the microlenses; a plurality of amplifiers that apply a plurality of different gains to signals output from the pixel region; and a scanning circuit that scans the pixel region so that a partial signal and an added signal are read out, the partial signal being a signal from some of the plurality of photoelectric conversion portions, and the added signal being a signal obtained by adding the signals from the plurality of photoelectric conversion portions. 1. An image sensor comprising:a pixel region including a plurality of microlenses arranged in a matrix, and a plurality of photoelectric conversion portions provided for each of the microlenses;a plurality of amplifiers that apply a plurality of different gains to signals output from the pixel region; anda scanning circuit that scans the pixel region so that a partial signal and an added signal are read out, the partial signal being a signal from some of the plurality of photoelectric conversion portions, and the added signal being a signal obtained by adding the signals from the plurality of photoelectric conversion portions.2. An image capturing apparatus comprising:an image sensor, the image sensor including a pixel region having a plurality of microlenses arranged in a matrix and a plurality of photoelectric conversion portions provided for each of the microlenses, a plurality of amplifiers that can amplify signals output from the pixel region using a plurality of different gains including at least a first gain, and a scanning circuit that scans the pixel region so that a partial signal and an added signal are read out, the partial signal being a signal from some of the plurality of photoelectric conversion portions, and the added signal being a signal obtained by adding the signals from the plurality of photoelectric conversion portions;a ...

Fahrzeug-Stossfänger

Es wird ein Fahrzeug-Stoßfänger bereitgestellt, der in der Umgebung der Stelle, an welcher der Stoßfänger an einem Seitenflächenelement angebracht ist, eine höhere Steifigkeit erzielen kann, während ein hervorragendes Entwässerungsvermögen gewährleistet wird, und Folgendes aufweist: einen mittleren Abschnitt 110, der in Fahrzeugquerrichtung verläuft; zwei seitliche Abschnitte 120a, 120b, die von den beiden Enden des mittleren Abschnitts aus zu Seitenflächenelementen (Frontkotflügelblechen) hin verlaufen; einen oberen Flansch 130, der von einer Oberkante der seitlichen Abschnitte aus relativ zu einer Fahrzeugkarosserie nach innen übersteht; einen Befestigungsflansch 132, der in der Nähe eines Endes der seitlichen Abschnitte an den oberen Flansch anschließt und weiter ins Innere der Fahrzeugkarosserie hinein übersteht als der obere Flansch; eine Nut 140, die durch eine Vertiefung in einer oberen Fläche des oberen Flansches in der Nähe des Befestigungsflansches entlang der Oberkante 124 der ...

Laserscan-Mikroskop und mikroskopisches Überwachungsverfahren

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DIODE, SEMICONDUCTOR DEVICE, AND MOSFET

Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction. 1. A diode comprising:a cathode electrode;a cathode region made of a first conductivity type semiconductor;a drift region made of a low concentration first conductivity type semiconductor;an anode region made of a second conductivity type semiconductor;an anode electrode;a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region; anda pillar electrode formed so as to connect the barrier region to the anode electrode and made of metal,wherein the barrier region and the pillar electrode are connected through a Schottky junction.2. The diode according to claim 1 , further comprising an electric field progress preventing region formed between the barrier region and the drift region and made of the second conductivity type semiconductor.3. The diode according to claim 1 , wherein a trench extending from the anode region to the drift region is formed claim 1 , anda trench electrode which is coated with an insulating film is formed inside the trench.4. The diode according to claim 1 , further ...

PURIFICATION PROCESS FOR HYDROPHILIC ORGANIC SOLVENT

Methods for the removal of ionic contaminants from a hydrophilic organic solvent by a mixed bed of ion exchange resins are described. A mixed bed of ion exchange resins with gel-type strong-acid cationic ion exchange resin with a specific moisture holding capacity and gel-type anionic ion exchange resin is used in some embodiments of such methods. 1. A method for removing ionic contamination from a hydrophilic organic solvent , the method comprising: (a) the cationic ion exchange resins are hydrogen (H) form strong-acid cationic ion exchange resins with a moisture holding capacity from 40 to 55 wt %, and', {'sup': 3', '2, '(b) both the cationic ion exchange resins and the anionic ion exchange resins have a porosity of 0.001 to 0.1 cm/g, an average pore size of 0.001 to 1.7 nm, and a B.E.T. surface area of 0.001 to 10 m/g.'}], 'contacting the hydrophilic organic solvent with a mixed bed of ion exchange resins comprising cationic ion exchange resins and anionic ion exchange resins, wherein2. The method of claim 1 , wherein the mixed bed of ion exchange resins show 10 ppb or less of total organic carbon measured by the following method:washing the mixed bed of ion exchange resins with 25 bed volumes (BV) of ultra pure water for 24 hours; and then analyzing total organic carbon of the ultra pure water.3. The method of claim 1 , wherein the contents of Na claim 1 , K claim 1 , Ca claim 1 , Al claim 1 , Fe claim 1 , Ni claim 1 , Zn claim 1 , Cu claim 1 , Cr and Sn in the H form strong cationic ion exchange resins and the anionic ion exchange resins are each 10 mg/kg or less based on dry weight of the ion exchange resins.4. A hydrophilic organic solvent obtained by the method of claim 1 , wherein the concentration of Na claim 1 , K claim 1 , Ca claim 1 , Al claim 1 , Fe claim 1 , Ni claim 1 , Zn claim 1 , Cu claim 1 , Cr and Sn in the hydrophilic organic solvent after contacting with the mixed bed of ion exchange resins is each 0.1 ppb or less.5. A method for removing ...

Semiconductor device

In a plan view of a semiconductor substrate, the semiconductor substrate includes a pillar exposing area in which the pillar region is exposed on the front surface of the semiconductor substrate, a pillar contacting area in which the pillar region is in contact with a deeper side of the anode contact region, and an anode contacting area in which the anode region is in contact with the deeper side of the anode contact region. In a direction along which the pillar contacting area and the anode contacting area are aligned, a width of the pillar contacting area is smaller than a width of the anode contacting area.

Diode, semiconductor device, and MOSFET

Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.

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Switching element and method of manufacturing the same

A switching element may include a SiC substrate including an off-angle; a trench provided in an upper surface of the SiC substrate and extending along an off-direction of the SiC substrate in a plan view of the upper surface; a gate insulating film; and a gate electrode. The SiC substrate may include a source region of n-type; a contact region of p-type; a body region of p-type being in contact with the gate insulating film below the source region; a drift region of n-type being in contact with the gate insulating film below the body region; and low lifetime regions located in a range between the drift region and at least one of the source region and the contact region. The low lifetime regions may be arranged along the off-direction with intervals, and at least a part of the body region may be provided in the intervals.

SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor substrate comprising an upper surface and a lower surface, an upper electrode provided on the upper surface, and a lower electrode provided on the lower surface. The semiconductor substrate includes, in a planar view, a first section including a center of the semiconductor substrate and a second section located between the first section and a peripheral edge of the semiconductor substrate. The first and second sections each comprise a MOSFET structure including a body diode. The MOSFET structure in the first section and the MOSFET structure in the second section are different from each other such that a forward voltage drop of the body diode in the first section with respect to a current density is higher than a forward voltage drop of the body diode in the second section with respect to the current density. 1. A semiconductor device comprising:a semiconductor substrate comprising an upper surface and a lower surface;an upper electrode provided on the upper surface; anda lower electrode provided on the lower surface;whereinthe semiconductor substrate comprises, in a planar view, a first section including a center of the semiconductor substrate and a second section located between the first section and a peripheral edge of the semiconductor substrate,the first section and the second section each comprise a MOSFET structure including a body diode, andthe MOSFET structure in the first section and the MOSFET structure in the second section are different from each other such that a forward voltage drop of the body diode in the first section with respect to a current density is higher than a forward voltage drop of the body diode in the second section with respect to the current density, an n-type source region being in contact with the upper electrode,', 'an n-type drain region being in contact with the lower electrode,', 'a p-type body region intervening between the source region and the drain region and being in contact ...

Halbleitereinrichtung

Es wird eine Halbleitereinrichtung mit einer Halbleiterschicht, die Si enthält, und eine Schottky-Elektrode, die in Schottky-Kontakt mit zumindest einem Teil einer der Hauptflächen der Halbleiterschicht ist, bereitgestellt. Ein Material der Schottky-Elektrode ist eine Al-Si Legierung, die zumindest ein Metall enthält, das aus der Gruppe ausgewählt ist, die aus Ti, Ta, Nb, Hf, Zr, W, Mo und V besteht.

Umgekehrt leitender bipolarer Transistor mit isoliertem Gate

Umgekehrt leitender bipolarer Transistor mit isoliertem Gate (1, 2, 3, 4, 5), mit:einer Halbleiterschicht (10);einer Emitterelektrode (24), die eine der Hauptoberflächen (10B) der Halbleiterschicht (10) bedeckt; undeinem isolierten Grabengate (30), das sich von der einen der Hauptoberflächen (10B) der Halbleiterschicht (10) in die Halbleiterschicht (10) erstreckt, wobeidie Halbleiterschicht (10) aufweist:einen Driftbereich (14) eines ersten Leitfähigkeitstyps, wobei der Driftbereich (14) in Kontakt mit dem isolierten Grabengate (30) ist;einen Körperbereich (15) eines zweiten Leitfähigkeitstyps, wobei der Körperbereich (15) oberhalb des Driftbereichs (14) angeordnet ist und in Kontakt mit dem isolierten Grabengate (30) ist; undeinen Barrierenbereich (18) des ersten Leitfähigkeitstyps, wobei der Barrierenbereich (18) in dem Körperbereich (15) angeordnet ist und elektrisch mit der Emitterelektrode (24) über ein Säulenbauteil (19) verbunden ist, das sich von der einen der Hauptoberflächen ( ...

SWITCHING DEVICE AND MANUFACTURING METHOD THEREOF

A switching device includes a semiconductor substrate, first and second trenches, a gate insulation layer (24), and a gate electrode (26). The semiconductor substrate comprises: a first conductive first semiconductor area (30); a second conductive body area; a first conductive second semiconductor area (34); and second conductive first and second lower semiconductor areas arranged in a range contacting lower surfaces of the first and second trenches; and a second conductive connection semiconductor area (38) extended to reach from the first trench to the second trench in a depth range from a lower end depth of the body area to lower surface depths of the first and second trenches, configured to contact the second semiconductor area (34), and connected to the body area and the first and second lower semiconductor areas. COPYRIGHT KIPO 2018 ...

Reverse conducting IGBT

A reverse conducting IGBT that includes an insulated gate; a semiconductor layer having a first conductivity type drift region, a second conductivity type body region, a first conductivity type emitter region, and a second conductivity type intermediate region; and an emitter electrode provided on a surface of the semiconductor layer. The first conductivity type drift region of the semiconductor layer contacts the insulated gate. The second conductivity type body region of the semiconductor layer is provided on the drift region and contacts the insulated gate. The first conductivity type emitter region of the semiconductor layer is provided on the body region and contacts the insulated gate. The second conductivity type intermediate region of the semiconductor layer is provided on the emitter region and is interposed between the emitter region and the emitter electrode.

SEMICONDUCTOR SWITCHING ELEMENT

A switching element including: a bottom insulating layer disposed at a bottom of a trench; a side surface insulating film covering a side surface of the trench; and a gate electrode disposed inside the trench and insulated from a semiconductor substrate. The semiconductor substrate has a bottom region and a connection region. The bottom region is in contact with the bottom insulating layer. The connection region is in contact with the bottom insulating layer and the side surface insulating film, and connects a body region to the bottom region. An area of the connection region in which the bottom insulating layer contacts to the connection region includes an area with lower a second conductivity-type impurity concentration than a minimum value of the second conductivity-type impurity concentration in an area of the connection region in which the side surface insulating film contacts the connection region. 1. A switching element comprising:a semiconductor substrate;a trench provided in an upper surface of the semiconductor substrate;a bottom insulating layer disposed at a bottom of the trench, and covering a bottom surface of the trench and a part of a side surface of the trench near the bottom surface;a side surface insulating film covering the side surface of the trench on an upper side of the bottom insulating layer and having a thickness smaller than a width between an upper surface and a lower surface of the bottom insulating layer; anda gate electrode disposed inside the trench and insulated from the semiconductor substrate by the bottom insulating layer and the side surface insulating film, wherein a first region of a first conductivity type in contact with the side surface insulating film;', 'a body region of a second conductivity type in contact with the side surface insulating film on a lower side of the first region;', 'a second region of the first conductivity type in contact with the side surface insulating film and the bottom insulating layer on a lower ...

Fahrzeug-Stossfänger

Es wird ein Fahrzeug-Stoßfänger bereitgestellt, der in der Umgebung der Stelle, an welcher der Stoßfänger an einem Seitenflächenelement angebracht ist, eine höhere Steifigkeit erzielen kann, während ein hervorragendes Entwässerungsvermögen gewährleistet wird, und Folgendes aufweist: einen mittleren Abschnitt 110, der in Fahrzeugquerrichtung verläuft; zwei seitliche Abschnitte 120a, 120b, die von den beiden Enden des mittleren Abschnitts aus zu Seitenflächenelementen (Frontkotflügelblechen) hin verlaufen; einen oberen Flansch 130, der von einer Oberkante der seitlichen Abschnitte aus relativ zu einer Fahrzeugkarosserie nach innen übersteht; einen Befestigungsflansch 132, der in der Nähe eines Endes der seitlichen Abschnitte an den oberen Flansch anschließt und weiter ins Innere der Fahrzeugkarosserie hinein übersteht als der obere Flansch; eine Nut 140, die durch eine Vertiefung in einer oberen Fläche des oberen Flansches in der Nähe des Befestigungsflansches entlang der Oberkante 124 der ...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

The present invention provides a method of manufacturing a semiconductor device in which an oxide film is formed relatively thick on one side of a trench while the oxide film is very thin or completely removed from the bottom side of the trench. The present invention relates to a method of manufacturing a semiconductor device, including a step of forming a trench (13) on the surface of a semiconductor substrate (12); a step of forming an oxide film (54) on the side surface (13a) and the bottom surface (13b) of the trench (13); a step of removing at least a part of the oxide film (54) formed on the bottom surface (13b) of the trench (13) by dry etching; and a step of ion-implanting conductive impurities into the semiconductor substrate through the bottom surface (13b) of the trench (13) after finishing the dry etching. The dry etching is reactive ion-etching and uses an etching gas (112) containing a fluorocarbon-based gas having a cyclic structure of carbon atoms, an oxygen gas, and an ...

SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor substrate of silicon carbide, and a temperature sensor portion. The semiconductor substrate includes a portion in which an n-type drift region and a p-type body region are laminated. The temperature sensor portion is disposed in the semiconductor substrate and is separated from the drift region by the body region. The temperature sensor portion includes an n-type cathode region being in contact with the body region, and a p-type anode region separated from the body region by the cathode region.

HIGH FREQUENCY SUBSTRATE

PROBLEM TO BE SOLVED: To provide a high frequency substrate that easily adjusts an insertion loss of substrate wiring lines even after wiring lines are arranged. SOLUTION: Slits 5-1 to 5-6 are created at positions opposite to a signal line 4 on a GND layer 1. When an insertion loss of the high frequency substrate is adjusted, the slits 5-1 to 5-6 are closed with a conductive resin 6. The conductive resin 6 slightly transmits electricity, so that signals leak through the conductive resin 6 that closes the slits and the electric power of transmission signals decreases. Thereby, the insertion loss of the high frequency substrate is increased by closing the slits 5-1 to 5-6 with the conductive resin 6. COPYRIGHT: (C)2009,JPO&INPIT ...

SCANNING OPTICAL APPARATUS AND OBSERVING METHOD

PROBLEM TO BE SOLVED: To simply acquire a clear fluorescence image, regardless of scatter changes due to variations in depth of a light focusing position in a sample. SOLUTION: A scanning optical apparatus is provided with: a laser light source for emitting laser light; a scanning section for scanning the laser light emitted by the laser light source on the sample A; a light focusing depth adjusting section for adjusting the depth of the light focusing position of the scanning laser light in the sample A; a fluorescence detecting section for detecting fluorescence emitted from the light focusing position of the laser light in the sample A; a reference depth information storing section for storing an absolute depth value Z10 of a prescribed reference depth of the light focusing position of the laser light which is adjusted by the light focusing depth adjusting section, in the sample A; and a hardware set storing section for storing relative depth values d1-d5 at respective light focusing ...

OBSERVATION APPARATUS AND OBSERVATION METHOD

An observation apparatus compares a plurality of image information acquired in a specific time by a plurality of image acquisition methods whose image acquisition timings are different, and includes a timer for counting observation time, and a PMT and a CCD whose image information acquisition timings are different. A storage unit stores different image information, when acquired by the PMT and the CCD, by relating each type of the acquired image information to the observation information counted by the timer. A control unit sets a display standard to associate the different types of image information stored in the storage unit, according to the observation time that has been respectively related to these types of image information, and associates the different types of image information according to the time information, on the basis of the set display standard. A monitor displays the image information associated by the control unit. 1. An observation apparatus which comprises:a timer for counting time information;a plurality of image information acquisition units whose acquisition timings to acquire image information of a specimen are different;a storage unit for storing different types of image information, when acquired by these image information acquisition units, by respectively relating each type of the acquired image information to the time information counted by the timer;a standard setting unit for setting a standard to make a mutual association between the different types of image information that have been stored in the storage unit, according to the time information that has been respectively related to these types of the image information;an image processing unit for making a mutual association between the different types of image information according to the time information, on the basis of the standard that has been set by the standard setting unit; anda display unit for displaying the image information associated by the image processing unit.2. An ...

DIODE, SEMICONDUCTOR DEVICE, AND MOSFET

Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction. 1. A diode comprising:a cathode electrode;a cathode region made of a first conductivity type semiconductor;a drift region made of a low concentration first conductivity type semiconductor;an anode region made of a second conductivity type semiconductor;an anode electrode made of metal;a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region; anda pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region,wherein the pillar region and the anode electrode are connected through a Schottky junction.2. The diode according to claim 1 , further comprising an electric field progress preventing region formed between the barrier region and the drift region and made of the second conductivity type semiconductor.3. The diode according to claim 1 , wherein a trench extending from the anode region to the drift region is formed claim 1 , anda trench electrode which is ...

IMAGE FORMING APPARATUS AND INK JET RECORDING APPARATUS

An image forming apparatus includes an image forming portion that forms an image on a medium, a casing that houses the image forming portion, a power operating portion for use in switching on and off the main power source of the image forming apparatus, and a touch operation portion for use in inputting operations on the image forming apparatus. Assuming that a direction in which the casing faces a user when the touch operation portion is used is a front-to-back direction, the power operating portion is disposed at a one side in a lateral direction crossing the front-to-back direction at a front of the casing in the front-to-back direction, and the touch operation portion is disposed at an other side at the front of the casing in the front-to-back direction. 1. An image forming apparatus comprising:an image forming portion that forms an image on a medium;a casing that houses the image forming portion;a power operating portion anda touch operation portion that is operated by user, whereinassuming that a direction in which the casing faces a user when the touch operation portion is used is a front-to-back direction,the power operating portion is disposed at a one side in a lateral direction crossing the front-to-back direction at a front of the casing in the front-to-back direction, andthe touch operation portion is disposed at an otherside at the front of the casing in the front-to-back direction.2. The image forming apparatus according to claim 1 , wherein the power operating portion and the touch operation portion are disposed at the front of the casing in the front-to-back direction.3. The image forming apparatus according to claim 1 , wherein the power operating portion and the touch operation portion are disposed with a level-difference in the front-to-back direction of the casing.4. The image forming apparatus according to claim 1 , further comprising:an externally coupling portion at the front of the casing, the externally coupling portion coupling an external ...

SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor layer and a trench gate portion that extends toward a deep portion from a front surface of the semiconductor layer. The semiconductor layer includes an island region surrounded by the trench gate portion. A first side surface of the trench gate portion and a second side surface of the trench gate portion are in contact with the island region. A first conductivity type contact region that includes a first contact region that is in contact with the first side surface and a second contact region that is in contact with the second side surface is provided in the island region. Moreover, a second conductivity type contact region that is in contact with the trench gate portion at a position between the first contact region and the second contact region is provided in the island region. 1. A semiconductor device comprising a semiconductor layer and a trench gate portion that extends toward a deep portion from a front surface of the semiconductor layer , a drift region which is of a first conductivity type;', 'a body region which is of a second conductivity type and is provided on a surface of the drift region;', 'a first conductivity type contact region that is provided in a portion of a surface layer of the body region, and is separated from the drift region by the body region; and', 'a second conductivity type contact region that is provided in another portion of the surface layer of the body region, and includes second conductivity type impurities of a higher concentration than that in the body region,, 'wherein the semiconductor layer comprisesthe semiconductor layer comprises an island region surrounded by the trench gate portion in a plan view,the trench gate portion includes a first side surface that is in contact with the island region and a second side surface that is in contact with the island region and is different from the first side surface,the first conductivity type contact region includes a first contact ...

PURIFICATION PROCESS FOR HYDROLYSABLE ORGANIC SOLVENT

Methods for the removal of ionic contaminants from hydrolysable organic solvent by ion exchange resins are described. A mixed bed of ion exchange resin with cationic ion exchange resin and weak-base anionic ion exchange resin is used in such methods. 1. A method for removing ionic contaminants from a hydrolysable organic solvent , the method comprising contacting the hydrolysable organic solvent with a mixed bed of ion exchange resin comprising cationic ion exchange resins and anionic ion exchange resins , wherein the anionic ion exchange resins are selected from weak-base anionic ion exchange resins.2. The method of claim 1 , wherein the weak-base anionic ion exchange resins have tertiary amine groups.3. The method of claim 1 , wherein the content of water in the cationic ion exchange resins and the anionic ion exchange resins are 5 weight % or less respectively.4. The method of claim 1 , wherein the contents of Na claim 1 , K claim 1 , Ca claim 1 , Al claim 1 , Fe claim 1 , Ni claim 1 , Zn claim 1 , Cu claim 1 , Cr and Sn in the cationic ion exchange resins and the anionic ion exchange resins are 5 ppm or less based on the dry-weight of the cationic ion exchange resins and anionic ion exchange resins.5. The method of claim 1 , the mixed bed of ion exchange resin comprises 10 ppb or less of leachable species of low-molecular organic compound measured by the following method:washing the ion exchange resin by 50 BV/Hr of ultra pure water flow for 2 hours, analyzing total organic carbon values of water before and after contacting with the washed ion exchange resin, then calculating the difference of the total organic carbon values of the water by subtracting the total organic carbon value of water after contacting with the ion exchange resin from the total organic carbon value of water before contacting with the ion exchange resin.6. The method of claim 1 , wherein the hydrolysable organic solvent is a compound having an ester bond.7. A compound having an ester bond ...

METHOD FOR MANUFACTURING COMPOUND SEMICONDUCTOR DEVICE

A method for manufacturing a compound semiconductor device includes causing epitaxial growth of a p-type impurity layer containing a compound semiconductor on a foundation layer containing the compound semiconductor. The causing the epitaxial growth includes performing pre-doping to preliminarily introduce dopant gas before introducing material gas for the epitaxial growth of the compound semiconductor. The dopant gas contains an organic metal material providing dopant of p-type impurities. An impurity concentration profile of the p-type impurity layer is controlled by controlling a time of the pre-doping. 1. A method for manufacturing a compound semiconductor device , the method comprisingcausing epitaxial growth of a p-type impurity layer containing a compound semiconductor on a foundation layer containing the compound semiconductor, whereinthe causing the epitaxial growth includes performing pre-doping to preliminarily introduce dopant gas before introducing material gas for the epitaxial growth of the compound semiconductor,the dopant gas contains an organic metal material providing dopant of p-type impurities, andan impurity concentration profile of the p-type impurity layer is controlled by controlling a time of the pre-doping.2. The method for manufacturing the compound semiconductor device according to claim 1 , whereinin the causing the epitaxial growth, the pre-doping is performed to maximize an impurity concentration of the p-type impurity layer in an initial stage of the epitaxial growth.3. The method for manufacturing the compound semiconductor device according to claim 2 , whereinin the causing the epitaxial growth, an introduction quantity of the dopant gas in the pre-doping is increased than an introduction quantity of the dopant gas after the introducing of the material gas to maximize the impurity concentration of the p-type impurity layer in the initial stage of the epitaxial growth.4. The method for manufacturing the compound semiconductor device ...

Semiconductor device

A semiconductor device includes; a schottky diode; a semiconductor substrate that includes a first surface and a second surface opposite to the first surface; a schottky electrode that is placed on the first surface and schottky-contacts to the semiconductor substrate; a first electrode placed on the schottky electrode; and a second electrode that is placed on the second surface and is connected to the semiconductor substrate. The schottky electrode is made of a metal material that is a columnar crystal; and a content of carbon on the schottky electrode is less than 6×10 19 cm −3 in at least a part of an area of the schottky electrode.

SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SILICON CARBIDE SEMICONDUCTOR DEVICE

A silicon carbide semiconductor device includes a substrate, a drift layer disposed above the substrate, a base region disposed above the drift layer, a source region disposed above the base region, a gate trench formed deeper than the base region from a surface of the source region, a gate insulating film covering an inner wall surface of the gate trench, a gate electrode disposed on the gate insulating film, an interlayer insulating film covering the gate electrode and the gate insulating film and having a contact hole, a source electrode brought in ohmic contact with the source region through the contact hole, and a drain electrode disposed to a rear surface of the substrate. The source region has a lower impurity concentration on a side close to the base region than on a surface side brought in ohmic contact with the source region. 16-. (canceled)7. A manufacturing method of a silicon carbide semiconductor device including an inverted semiconductor element , the manufacturing method comprising:preparing a substrate made of silicon carbide of a first or second conductivity type;forming a drift layer made of silicon carbide of the first conductivity type and having an impurity concentration lower than an impurity concentration of the substrate above the substrate;forming a base region made of silicon carbide of the second conductivity type above the drift layer;forming a source region made of silicon carbide of the first conductivity type and having an impurity concentration higher than the impurity concentration of the drift layer above the base region;forming a trench gate structure by providing, from a surface of the source region, a plurality of gate trenches deeper than the base region and aligned in stripes with one direction as a longitudinal direction, forming a gate insulating film on inner wall surfaces of the gate trenches, and forming a gate electrode on the gate insulating film;forming a source electrode electrically connected to the source region; ...

Printing apparatus

A printing apparatus includes an image reading unit that reads a document mounted on a document table, a printing unit that performs printing on a print medium fed from a feed opening, and a document cover which is supported openably/closably with respect to the document table and which supports the print medium inserted into the feed opening.

Silicon carbide semiconductor device and method for manufacturing the same

In a semiconductor device, a source region is made of an epitaxial layer so as to reduce variation in thickness of a base region and variation in a threshold value. Outside of a cell part, a side surface of a gate trench is inclined relative to a normal direction to a main surface of a substrate, as compared with a side surface of a gate trench in the cell part that is provided by the epitaxial layer of the source region being in contact with the base region.

SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF

A semiconductor device () includes a semiconductor substrate () including an element region () and an outer-periphery voltage withstanding region (). The outer-periphery voltage withstanding region includes a plurality of p-type guard rings () surrounding the element region () in a multiple manner. Each of the guard rings () includes a high concentration region () and a low concentration region (). A low concentration region of an outermost guard ring includes a first part () positioned on an outer peripheral side of its high concentration region. Respective low concentration regions of the guard rings include respective second parts () each positioned in a range sandwiched between corresponding two adjacent high concentration regions among a plurality of concentration regions. A width of the first part on a front surface () is wider than widths of the second parts on the front surface. 1. A semiconductor device comprising:a semiconductor substrate;a front-surface electrode making contact with a front surface of the semiconductor substrate; anda back-surface electrode making contact with a back surface of the semiconductor substrate, wherein:the semiconductor substrate includes an element region overlapping with a contact face between the front-surface electrode and the semiconductor substrate in a plan view of the semiconductor substrate along a thickness direction of the semiconductor substrate, and an outer-periphery voltage withstanding region provided around the element region;the element region includes a semiconductor element configured to allow an electric current to flow between the front-surface electrode and the back-surface electrode;the outer-periphery voltage withstanding region includes a plurality of p-type guard rings facing the front surface and surrounding the element region in a multiple manner, and an n-type outer-periphery drift region separating the guard rings from each other;each of the guard rings includes a high concentration region having ...

Igbt with a built-in-diode

When an IGBT has a barrier layer 10 that separates an upper body region 8 a from a lower body region 8 b , conductivity modulation is enhanced and on-resistance decreases. When the IGBT also has a Schottky contact region 6 that extends to reach the barrier layer 10 , a diode structure can be obtained. In this case, however, a saturation current increases as well as short circuit resistance decreases. The Schottky contact region 6 is separated from the emitter region 4 by the upper body region 8 a . By selecting an impurity concentration in the region 8 a , an increase in a saturation current can be avoided. Alternatively, a block structure that prevents a depletion layer extending from the region 6 into the region 8 a from joining a depletion layer extending from the region 4 into the region 8 a may be provided in an area separating the region 6 from the region 4.

Semiconductor device and method of manufacturing the semiconductor device

A semiconductor device for restraining snapback is provided. The semiconductor device includes IGBT and diode regions. In a view of n-type impurity concentration distribution along a direction from a front surface to a rear surface, a local minimum value of an n-type impurity concentration is located at a border between cathode and buffer regions. A local maximum value of n-type impurity concentration is located in the buffer region. At least one of the butler and cathode regions includes a crystal defect region having crystal detects in a higher concentration than a region therearound. A peak of a crystal defect concentration in a view of crystal defect concentration distribution along the direction from the front surface to the rear surface is located in a region on the rear surface side with respect to a specific position having the n-type impurity concentration which is a half of the local maximum value.

SWITCHING DEVICE AND METHOD OF MANUFACTURING THE SAME

A switching device includes a semiconductor substrate; first and second trenches; gate insulating layers; and gate electrodes. The semiconductor substrate includes a first semiconductor region of a first conductivity type, a body region of a second conductivity type, a second semiconductor region of the first conductivity type, first and second bottom semiconductor regions of the second conductivity type disposed in areas extending to bottom surfaces of the first and second trenches, and a connection semiconductor region of the second conductivity type extending from the first trench to reach the second trench in a depth range from a depth of a lower end of the body region to a depth of the bottom surfaces of the first and second trenches, the connection semiconductor region contacting the second semiconductor region, and being connected to the body region, and the first and second bottom semiconductor regions. 1. A switching device comprising:a semiconductor substrate;a first trench provided in an upper surface of the semiconductor substrate;a second trench provided in the upper surface of the semiconductor substrate and disposed at an interval from the first trench;gate insulating layers each of which covers an inner surface of a corresponding one of the first and second trenches; andgate electrodes each of which is disposed in a corresponding one of the first and second trenches and is insulated from the semiconductor substrate by a corresponding one of the gate insulating layers, a first semiconductor region of a first conductivity type disposed between the first and second trenches and facing the gate electrodes in the first and second trenches via the gate insulating layers,', 'a body region of a second conductivity type contacting the first semiconductor region from a lower side and facing the gate electrodes in the first and second trenches via the gate insulating layers,', 'a second semiconductor region of the first conductivity type contacting the body ...

INSULATED GATE TYPE SWITCHING DEVICE AND METHOD FOR MANUFACTURING THE SAME

A method of manufacturing an insulated gate type switching device includes forming a gate trench that has a first portion with a first width in a first direction and a second portion with a second width in the first direction, the second width being wider than the first width. In an oblique implantation, second conductivity type impurities are irradiated at an irradiation angle inclined around an axis orthogonal to the first direction. The first width, the second width, and the irradiation angle are set such that the second conductivity type impurities are suppressed, at a first side surface of the first portion, from being. implanted into a part below a lower end of a second semiconductor region, and at a second side surface of the second portion, the impurities are implanted into the part below the lower end of the second semiconductor region. 1. A method for manufacturing an insulated gate type switching device , the method comprising:forming a laminated structure in a semiconductor substrate, the laminated structure including a first semiconductor region of a first conductivity type, a body region of a second conductivity type located on at least a part of the first semiconductor region, and a second semiconductor region of the first conductivity type located on at least a part of the body region;forming a gate trench including a first portion and a second portion, the first portion having a first width along a first direction in a planar view of a surface of the semiconductor substrate, the second portion having a second width along the first direction in the planar view of the surface, the second width being wider than the first width, the first portion penetrating the second semiconductor region and the body region from the surface to reach the first semiconductor region, and the second portion penetrating the body region from the surface to reach the first semiconductor region;forming a bottom region of the second conductivity type in a range exposed on a ...

Diode, semiconductor device, and mosfet

Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.

PPAR-gamma ACTIVATOR

The present invention provides A PPARγ activator comprising a butenolide compound represented by the formula (1) or a pharmaceutically acceptable salt thereof: 14-. (canceled)6. The method according to claim 5 , wherein the pathological condition claim 5 , the symptom claim 5 , or the disease involving PPARγ is one or more pathological conditions claim 5 , symptoms claim 5 , or diseases selected from the group consisting of diabetes mellitus claim 5 , insulin resistance claim 5 , obesity claim 5 , body weight gain claim 5 , visceral fat accumulation claim 5 , subcutaneous fat accumulation claim 5 , leptin resistance claim 5 , abnormal lipid metabolism claim 5 , hyperlipidemia claim 5 , arteriosclerosis claim 5 , and metabolic syndrome. The present invention relates to a PPARγ activator that can be used for a lipid metabolism activator, an antidiabetic agent, or the prevention or amelioration, etc., of obesity, lifestyle-related diseases, or the like.Fragrance vinegars (aromatic vinegars) are fermented foods that are typically produced by the fermentation of glutinous rice followed by aging for a long period, and have been used as vinegar seasonings in China from a long time ago. The fragrance vinegars have also become increasingly popular in Japan in recent years as health foods that help maintain or promote health, because of their higher contents of organic compounds such as amino acids than those of rice vinegars, which are vinegars generally used in Japan.For example, the present inventors disclose, in Patent Literature 1, a peroxisome proliferator-activated receptor α activator and a peroxisome proliferator-activated receptor γ activator each containing a lower alkanol extract of fragrance vinegar as an active ingredient. This literature states that the lower alkanol extract of a fragrance vinegar exhibits the peroxisome proliferator-activated receptor (PPAR) α-activating effect of improving sugar metabolism by participating in the stimulation of fatty acid, ...

FLEXIBLE CONDUCTIVE MATERIAL AND TRANSDUCER

A flexible conductive material of the present invention is formed by dispersing a conductive agent containing carbon nanotubes in a matrix that contains a polymer formed by amide bond formation or imide bond formation of a polycyclic aromatic component and an oligomer component and that has a glass transition point of 20° C. or less. The flexible conductive material of the present invention has good dispersibility of a conductive agent containing carbon nanotubes and has an excellent following performance to an expanding and shrinking substrate. A transducer of the present invention includes a dielectric layer made of a polymer, a plurality of electrodes with the dielectric layer interposed therebetween, and wirings connected to the respective electrodes, and at least either the electrodes or the wirings include the flexible conductive material of the present invention. The transducer of the present invention has a performance that is unlikely to deteriorate due to the electrodes or the wirings and has excellent durability. 1. A flexible conductive material , comprising a conductive agent containing carbon nanotubes and dispersed in a matrix that contains a polymer formed by amide bond formation or imide bond formation of a polycyclic aromatic component and an oligomer component and an elastomer compatible with the oligomer component and that has a glass transition point of 20° C. or less , whereinthe flexible conductive material has a volume resistivity at an elongation of 30% of 2.50 Ω·cm or less.2. The flexible conductive material according to claim 1 , whereinthe polycyclic aromatic component has any of a benzene ring, a naphthalene ring, an anthracene ring, a phenanthrene ring, a pyrene ring, a perylene ring, and a naphthacene ring.3. The flexible conductive material according to claim 1 , whereinthe oligomer component is compatible with any of a nitrile rubber, a chloroprene rubber, a chlorosulfonated polyethylene rubber, a urethane rubber, an acrylic rubber, ...

SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor substrate having an active region in which a main switching element structure is formed, a current sense region in which a sense switching element structure is formed, and a peripheral region located around the active region and the current sense region. The semiconductor substrate is a 4H-SiC substrate having an off angle in a <11-20>direction. The current sense region is disposed in a range where the active region is not present when viewed along the <1-100>direction. 1. A semiconductor device comprising:a semiconductor substrate having an active region in which a main switching element structure is formed, a current sense region in which a sense switching element structure is formed, and a peripheral region located around the active region and the current sense region, wherein{'b': 11', '20, 'the semiconductor substrate is a 4H-SiC substrate having an off angle in a <->direction, and'}{'b': 1', '100, 'the current sense region is disposed in a range where the active region is not present when viewed along the <->direction.'}21100. The semiconductor device according to claim 1 , wherein the active region has a first active region and a second active region claim 1 , the first active region and the second active region are disposed apart from each other in the semiconductor substrate claim 1 , and the current sense region is disposed between the first active region and the second active region when viewed along the <->direction.3. The semiconductor device according to claim 2 , further comprisinga temperature sense element disposed in a portion of the peripheral region located between the first active region and the second active region.4. The semiconductor device according to claim 2 , wherein{'b': 11', '20, 'the first active region and the second active region are apart from each other in the <->direction, and'}{'b': 11', '20', '1', '100, 'the current sense region is disposed at a position that is located between the ...

ELECTRIC STORAGE DEVICE

The electric storage device includes an electrode assembly having a positive electrode and a negative electrode, a case for housing the electrode assembly, a pressure relief valve, and positive and negative electrode conductive members that are electrically connected to the respective corresponding electrodes. The case has a wall in which the pressure relief valve is disposed. At least one of the positive and negative electrode conductive members includes an interposing portion located between the inner surface of the wall and an end face of the electrode assembly facing the inner surface, and a shielding portion located closer to the end face of the electrode assembly than the interposing portion. The shielding portion covers the pressure release valve from a side of the wall where the electrode assembly is located. 1. An electric storage device comprising:an electrode assembly having a layered structure and including a positive electrode and a negative electrode insulated from each other, wherein each of the positive electrode and the negative electrode includes a metal foil, an active material layer applied to at least one surface of the metal foil, and a non-coated portion where the active material layer is not applied and the metal foil is exposed;a case that accommodates the electrode assembly;a pressure release valve existing on a wall of the case and configured to be ripped open when pressure in the case reaches a release pressure in order to release the pressure out of the case; anda positive electrode conductive member and a negative electrode conductive member that at least partially exist between an inner surface of the wall where the pressure release valve exists and an end face of the electrode assembly facing the inner surface, wherein the positive electrode conductive member and the negative electrode conductive member are electrically connected to the non-coated portion of the positive electrode and the non-coated portion of the negative electrode, ...

IMAGE PROCESSING DEVICE AND MICROSCOPE SYSTEM

Visual observation of morphological features of a cell group or individual cells acquired in 3D image data is facilitated, thus improving observation accuracy. Provided is an image processing device that generates, on the basis of a plurality of 2D images acquired by a microscope at different focus positions on a cell clump, 3D images of respective cells constituting the cell clump, that processes the generated 3D images and analyzes feature amounts on the basis of at least one measurement parameter, that displays analysis results in a graph, that allows a user to select a region of interest on the displayed graph, and that generates, from the 3D images that correspond to the plurality of cells that are included in the selected region of interest, 2D display images each in a plane with reference to an axis that is determined on the basis of a shape feature of the corresponding cell and displays the 2D display images in a list. 1. An image processing device comprising at least one processor that is provided with hardware , generate, on the basis of a plurality of 2D images acquired by a microscope at different focus positions on a cell clump, 3D images of respective cells constituting the cell clump;', 'process the generated 3D images and analyze feature quantities on the basis of at least one measurement parameter;', 'display analysis results in a graph;', 'allow a user to select a region of interest on the displayed graph; and', 'generate, from the 3D images that correspond to the plurality of cells that are included in the selected region of interest, 2D display images each in a plane with reference to an axis that is determined on the basis of a shape feature of the corresponding cell and display the 2D display images in a list., 'wherein the at least one processor is configured to2. An image processing device according to claim 1 , further comprising a storage unit that stores at least one computer program to be executed by the at least one processor.3. An image ...

ELECTRICITY STORAGE DEVICE

An electricity storage device includes an electrode assembly, a case, a first terminal, and a second terminal. The electrode assembly includes one or more first electrodes and one or more second electrodes, which are stacked alternately with one or more separators in between. The case accommodates the electrode assembly. The first terminal and the second terminal are located on a wall portion of the case. First tabs and second tabs are provided on ends of the first and second electrodes, respectively. A circuit breaker is arranged between the second terminal and the electrode assembly. A part of the first terminal and the first tabs are arranged along the width direction of the electrode assembly, and the circuit breaker and the second tabs are arranged along the width direction of the electrode assembly. 19-. (canceled)10. An electricity storage device comprising:an electrode assembly, in which one or more first electrodes and one or more second electrodes, which are electrodes, are stacked alternately with one or more separators in between;a case, which accommodates the electrode assembly; each first electrode has a first tab, which has a shape protruding from an end of the first electrode,', 'each second electrode has a second tab, which has a shape protruding from an end of the second electrode, and', 'the electrode assembly has an end face on which the first and second tabs are located, the end face facing the wall portion,, 'a first terminal and a second terminal, which are exposed to an outside from a wall portion of the case, a part of each terminal protruding toward the electrode assembly, wherein'}a circuit breaker, which is arranged between the second terminal and the electrode assembly and is joined to the second terminal;a first conductor, which is joined to the first tabs and the first terminal; anda second conductor, which is joined to the circuit breaker and the second tabs, whereinthe first conductor has a first bend portion, which is bent into a ...

Switching element

A switching element includes a semiconductor substrate, a gate insulating film, and a gate electrode that is disposed inside the trench. The semiconductor substrate further includes: an n-type source region, a p-type body region, an n-type drift region, a p-type first electric field reduced region, and a p-type connection region. When a permittivity of the connection region is ε (F/cm), a critical electric field strength of the connection region is Ec (V/cm), an elementary charge is e (C), an area density of p-type impurity when viewed in a plan view of the connection region located below the trench is Q (cm −2 ), Q>ε*Ec/e.

DIODE AND SEMICONDUCTOR DEVICE INCLUDING BUILT-IN DIODE

A diode is provided with a pillar region formed so as to extend between a barrier region and an anode electrode, contact the barrier region, and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region; and a barrier height adjusting region formed so as to be located between the pillar region and the anode electrode, and contact the pillar region and the anode electrode. The barrier height adjusting region includes at least one component selected from the group consisting of a second conductivity type semiconductor having a concentration lower than that of an anode region, the first conductivity type semiconductor having a concentration lower than that of the pillar region, and an i-type semiconductor. The barrier height adjusting region and the anode electrode are connected through a Schottky junction. 1. A diode comprising:a cathode electrode;a cathode region made of a first conductivity type semiconductor;a drift region made of the first conductivity type semiconductor;an anode region made of a second conductivity type semiconductor;an anode electrode made of metal;a barrier region formed between the drift region and the anode region, and made of the first conductivity type semiconductor having a concentration higher than that of the drift region;a pillar region formed so as to extend between the barrier region and the anode electrode and contact the barrier region, and made of the first conductivity type semiconductor; anda barrier height adjusting region formed so as to be located between the pillar region and the anode electrode, and contact the pillar region and the anode electrode,wherein the barrier height adjusting region includes at least one component selected from the group consisting of the second conductivity type semiconductor having a concentration lower than that of the anode region, the first conductivity type semiconductor having a concentration lower than that of the pillar region, and an i- ...

SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor substrate, a top electrode in contact with a top surface of the semiconductor substrate, a bottom electrode in contact with a bottom surface of the semiconductor substrate, and an oxide film in contact with the top surface of the semiconductor substrate. The semiconductor substrate includes an element region and an outer peripheral region. The element region is a region where the top electrode is in contact with the top surface of the semiconductor substrate. The outer peripheral region is a region where the oxide film is in contact with the top surface of the semiconductor substrate, and is located between the element region and an outer peripheral end surface of the semiconductor substrate. The element region includes a semiconductor element connected between the top electrode and the bottom electrode. The outer peripheral region includes surface high-voltage-breakdown regions, deep high-voltage-breakdown regions, and a drift region. 1. A semiconductor device comprising:a semiconductor substrate;a top electrode in contact with a top surface of the semiconductor substrate;a bottom electrode in contact with a bottom surface of the semiconductor substrate; andan oxide film in contact with the top surface of the semiconductor substrate, an element region at which the top electrode is in contact with the top surface of the semiconductor substrate; and', 'an outer peripheral region at which the oxide film is in contact with the top surface of the semiconductor substrate,, 'wherein the semiconductor substrate includeswherein the outer peripheral region is located between the element region and an outer peripheral end surface of the semiconductor substrate;wherein the element region includes a semiconductor element connected between the top electrode and the bottom electrode, a plurality of surface high-voltage-breakdown regions that respectively have p-type conductivity;', 'a plurality of deep high-voltage-breakdown regions ...

Silicon carbide semiconductor device

A SiC semiconductor device includes a main cell region and sense cell region being electrically isolated by an element isolation portion. The SiC semiconductor device includes a substrate, a first impurity region, a first current dispersion layer, first deep layers, a second current dispersion layer, a second deep layer, a base region, a trench gate structure, a second impurity region, first electrodes and a second electrode. The second impurity region, the first electrodes, and the second electrode are disposed at the main cell region and the sense cell region to form a vertical semiconductor element. The vertical semiconductor element allows a current flowing between the first electrode and the second electrode through a voltage applied to the gate electrode. The spacing interval between the deep layers at the element isolation portion is shorter than or equal to a spacing interval between the deep layers at the main cell region.

REVERSE CONDUCTING INSULATED GATE BIPOLAR TRANSISTOR

A semiconductor layer of a reverse conducting insulated gate bipolar transistor is provided with a drift region of a first conductive type, a body region of a second conductive type that is disposed above the drift region, and a barrier region of the first conductive type that is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer. The barrier region is not contact with a side surface of the insulated trench gate. 1. A reverse conducting insulated gate bipolar transistor comprising:a semiconductor layer;an emitter electrode covering one of main surfaces of the semiconductor layer; andan insulated trench gate extending from the one of main surfaces of the semiconductor layer into the semiconductor layer, a drift region of a first conductive type, wherein the drift region is in contact with the insulated trench gate;', 'a body region of a second conductive type, wherein the body region is disposed above the drift region and is in contact with the insulated trench gate; and', 'a barrier region of the first conductive type, wherein the barrier region is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer, and, 'wherein the semiconductor layer comprisesthe barrier region is not in contact with a side surface of the insulated trench gate.2. The reverse conducting insulated gate bipolar transistor according to claim 1 , whereina distance by which the barrier region is set apart from the side surface of the insulated trench gate is longer than a width of an inversion layer that is generated at the side surface of the insulated trench gate.3. The reverse conducting insulated gate bipolar transistor according to claim 1 , whereinthe semiconductor layer further comprises a floating region of the first conductive type, wherein the floating region ...

REVERSE CONDUCTING INSULATED GATE BIPOLAR TRANSISTOR

A semiconductor layer of a reverse conducting insulated gate bipolar transistor is provided with a barrier region of the first conductive type, wherein the barrier region is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer. The barrier region includes a first barrier partial region, wherein a distance between the first barrier partial region and the drift region is a first distance, and a second barrier partial region, wherein a distance between the second barrier partial region and the drift region is a second distance which is longer than the first distance. The second barrier partial region is in contact with a side surface of an insulated trench gate. 1. A reverse conducting insulated gate bipolar transistor comprising:a semiconductor layer;an emitter electrode covering one of main surfaces of the semiconductor layer; andan insulated trench gate extending from the one of main surfaces of the semiconductor layer into the semiconductor layer, a drift region of a first conductive type, wherein the drift region is in contact with the insulated trench gate;', 'a body region of a second conductive type, wherein the body region is disposed above the drift region and is in contact with the insulated trench gate; and', 'a barrier region of the first conductive type, wherein the barrier region is disposed in the body region and electrically connects to the emitter electrode via a pillar member which extends from the one of main surfaces of the semiconductor layer,, 'wherein the semiconductor layer comprises a first barrier partial region, wherein a distance between the first barrier partial region and the drift region is a first distance; and', 'a second barrier partial region, wherein a distance between the second barrier partial region and the drift region is a second distance which is longer than the first distance, and, 'the barrier region ...

ELECTRONIC DEVICE FOR EXECUTING PREDETERMINE PROCESSING BASED ON IMAGE DATA ACQUIRED VIA FILTERS HAVING DIFFERENT POLARIZATION ANGLES, CONTROL METHOD OF THE SAME, AND STORAGE MEDIUM

An electronic device acquires polarization information of a subject based on a plurality of pieces of image data based on a first signal output from a first sensor. The first sensor can capture an optical image of the subject acquired via a polarizing filter provided with areas having different polarization angles. The device further acquires an evaluation value for controlling brightness of an image at the time of capturing the optical image of the subject, based on the plurality of pieces of image data. The plurality of pieces of image data have different polarization angles, by respectively being acquired via areas of the polarizing filter having the plurality of different polarization angles. A degree of weighting to be assigned to the plurality of pieces of image data at the time of acquiring the evaluation value based on the polarization information. 1. An electronic device , comprising:at least one processor; andat least one memory coupled to the at least one processor storing instructions that, when executed by the at least processor, cause the at least processor to function as:an information acquisition unit configured to acquire polarization information of a subject based on a plurality of pieces of image data that are based on a first signal output from a first sensor, wherein the first sensor is capable of capturing an optical image of the subject acquired via a polarizing filter provided with areas having different polarization angles;a control unit configured to control brightness of an image at the time of acquiring image data by capturing the optical image of the subject; andan evaluation value acquisition unit configured to acquire an evaluation value to be used by the control unit to control the brightness, based on at least one of the plurality of pieces of image data,wherein the plurality of pieces of image data have different polarization angles, by respectively being acquired via areas of the polarizing filter having the plurality of different ...

REVERSE CONDUCTING IGBT

A reverse conducting IGBT that includes an insulated gate; a semiconductor layer having a first conductivity type drift region, a second conductivity type body region, a first conductivity type emitter region, and a second conductivity type intermediate region; and an emitter electrode provided on a surface of the semiconductor layer. The first conductivity type drift region of the semiconductor layer contacts the insulated gate. The second conductivity type body region of the semiconductor layer is provided on the drift region and contacts the insulated gate. The first conductivity type emitter region of the semiconductor layer is provided on the body region and contacts the insulated gate. The second conductivity type intermediate region of the semiconductor layer is provided on the emitter region and is interposed between the emitter region and the emitter electrode.

Method of manufacturing switching element

A method of manufacturing a switching element is provided. The method including: preparing a semiconductor substrate which includes an n-type drain region, a p-type body region, and a trench penetrating the body region and reaching the drain region; and forming a lateral surface p-type region extending along a lateral surface of the trench below the body region by heating the semiconductor substrate so as to make a part of the body region flow into the trench. The switching element includes: a gate insulating layer covering an inner surface of the trench; a bottom p-type region in contact with the gate insulating layer at a bottom surface of the trench and connected to the lateral surface p-type region; an n-type source region; and a gate electrode provided in the trench.

DROPLET EJECTING APPARATUS

There is provided a printer that functions as a droplet ejecting apparatus including: a tank which is configured of at least a part having light transmission property; a tank cover which functions as a cover portion that covers the tank; and a light transmitting portion which is provided at least at a part of the tank cover, and through which liquid accommodated on the inside of the tank can be visually confirmed, in which at least one of gradations and reference marks is provided in the light transmitting portion. 1. A droplet ejecting apparatus comprising:a tank which is configured of at least a part having light transmission property;a cover portion which covers the tank; anda light transmitting portion which is provided at least at a part of the cover portion, and through which liquid accommodated on the inside of the tank can be visually confirmed,wherein at least one of gradations and reference marks is provided in the light transmitting portion.2. The droplet ejecting apparatus according to claim 1 ,wherein the gradations are provided corresponding to an amount of the liquid, andwherein the reference marks are provided corresponding to the types of the liquid.3. The droplet ejecting apparatus according to claim 1 ,wherein the light transmitting portion is configured of a structure integrated with the cover portion.4. The droplet ejecting apparatus according to claim 1 ,wherein the light transmitting portion includes a through-hole provided at a part of a wall surface of the cover portion, and a light transmitting plate which covers the through-hole.5. The droplet ejecting apparatus according to claim 1 , further comprising:a housing which holds the tank,wherein the cover portion is supported to be openable and closable by the housing.6. The droplet ejecting apparatus according to claim 1 ,wherein the tank has a filling port through which the tank can be filled with the liquid.7. The droplet ejecting apparatus according to claim 1 ,wherein at least a part of ...

Light-emitting device and light-emitting device module

A light-emitting device having high output and high contrast with simple configuration is provided. The light-emitting device includes a substrate, a light-emitting element disposed on the substrate, a light-transmitting member disposed on the light-emitting element, and a covering body disposed on the substrate so as to surround the light-transmitting member and cover a side surface of the light-transmitting member. The covering body has a particle group including a plurality of metal oxide particles having a light scattering property and dispersed in the covering body, and the metal oxide particles existing in the vicinity of the side surface of the covering body have a portion having a bandgap smaller than that of other portions in each particle.

SEMICONDUCTOR DEVICE

A semiconductor device in which an IGBT region and a diode region adjoining each other are formed on a same substrate is presented. The semiconductor device is provided with a plurality of first gate trenches extending abreast in a first direction in the IGBT region and a plurality of second gate trenches extending abreast in a second direction intersecting the first direction. The first gate trenches and the second gate trenches are not in contact with each other. 1. A semiconductor device in which an IGBT region and a diode region adjoining each other are formed on a same substrate , the semiconductor device comprising:a plurality of first gate trenches extending abreast in a first direction in the IGBT region; anda plurality of second gate trenches extending abreast in a second direction intersecting the first direction,whereinthe first gate trenches and the second gate trenches are not in contact with each other.2. The semiconductor device according to claim 1 , whereinthe first gate trenches extend longer than the second gate trenches, andan emitter layer in the IGBT region is formed so as to extend along the first gate trenches.3. The semiconductor device according to claim 2 , whereinthe emitter layer in the IGBT region further includes portions extending along the second gate trenches.4. The semiconductor device according to claim 1 , whereinthe second gate trenches are dummy trenches, in which gate electrodes are formed, andON-potential is not applied to the gate electrodes of the dummy trenches. This application claims priority to Japanese Patent Application No. 2014-007713 filed on Jan. 20, 2014, the contents of which are hereby incorporated by reference into the present application.A technology disclosed herein relates to a semiconductor device including gate trenches.Patent Literature 1 (Japanese Patent Application Publication No, 2003-529209) discloses a semiconductor device including a plurality of gate trenches. In the semiconductor device of Patent ...

SEMICONDUCTOR DEVICE

A semiconductor substrate comprises an IGBT region and a diode region. The IGBT region comprises: an n-type emitter region; a p-type IGBT body region; an n-type IGBT barrier region; an n-type IGBT drift region; a p-type collector region; a first trench; a first insulating layer; and a first gate electrode. The diode region comprises: a p-type diode top body region; an n-type diode barrier region; a p-type diode bottom body region; an n-type cathode region; a second trench; a second insulating layer; and a second gate electrode. An n-type impurity density of a specific part of the diode barrier region making contact with the second insulating layer is higher than an n-type impurity density of the IGBT barrier region. 1. A semiconductor device comprising a semiconductor substrate , wherein the semiconductor substrate comprises an IGBT region and a diode region , an n-type emitter region exposed at a part of a front surface of the semiconductor substrate;', 'a p-type IGBT body region formed at a deeper position than the emitter region;', 'an n-type IGBT barrier region formed at a deeper position than the IGBT body region;', 'an n-type IGBT drift region formed at a deeper position than the IGBT barrier region, having an n-type impurity density lower than that in the IGBT barrier region;', 'a p-type collector region formed at a deeper position than the IGBT drift region, wherein the collector region is exposed at a rear surface of the semiconductor substrate;', 'a first trench penetrating the emitter region, the IGBT body region and the IGBT barrier region, wherein a bottom part of the first trench projects into the IGBT drift region;', 'a first insulating layer covering an inner surface of the first trench; and', 'a first gate electrode contained in the first trench in a state where the first gate electrode is covered by the first insulating layer,, 'the IGBT region comprises a p-type diode top body region exposed at the front surface of the semiconductor substrate;', ' ...

OBSERVATION SYSTEM

Provided is an observation system including: a monitor; a CPU that identifies, in a 3D image including the plurality of cells, the respective cells by assigning labels that differ from one another to the respective cells, that associates three mutually-intersecting cross-sectional images that constitute the 3D image, and that simultaneously displays the cross-sectional images on the monitor; and an input unit with which an operator specifies an arbitrary cell in any of the cross-sectional images displayed on the monitor. The CPU extracts, from the 3D image, the cross-sectional shapes, in the respective cross-sectional images, of the cell specified by using the input unit, on the basis of the labels, associates the extracted cross-sectional shapes of the cell with one another, and displays the extracted cross-sectional shapes in the respective cross-sectional images displayed on the monitor, in a distinguishable manner from the other cells. 1. An observation system comprising:a display unit that displays an image of a plurality of cells;a cell identifying unit that identifies, in a 3D image including the plurality of cells, respective cells by assigning labels that differ from one another to the respective cells;a display control unit that associates three mutually-intersecting cross-sectional images that constitute the 3D image and that simultaneously displays the cross-sectional images on the display unit;a cell specifying unit with which an operator specifies an arbitrary cell in any of the cross-sectional images, which are displayed on the display unit by the display control unit; anda cross-sectional-shape extracting unit that extracts, from the 3D image, cross-sectional shapes, in the respective cross-sectional images, of the cell specified by using the cell specifying unit, on the basis of the labels assigned to the respective cells,wherein the display control unit associates the cross-sectional shapes of the cell, which are extracted by the cross-sectional- ...

LIGHT EMITTING DEVICE AND MANUFACTURING METHOD THEREOF

To provide a light emitting device with high upward emission efficiency. The light emitting device is manufactured by sequentially performing: a step of disposing a phosphor-containing layer on a top face of a light emitting element that is mounted on a substrate; a step of disposing a frame at a position separated from a lateral face of the phosphor-containing layer, on the substrate; a step of pushing a plate-like elastic body against top faces of the phosphor-containing layer and the frame so as to come into contact therewith, and filling, in a state where a lower face of the elastic body is pushed up by the phosphor-containing layer and the frame, a reflection material having fluidity in an uncured state in surroundings of the light emitting element and the phosphor-containing layer so as to be along the lower face of the elastic body; and a step of curing the reflection material to form a reflection member. 1. A light emitting device comprising:a substrate; a chip-like light emitting body that is mounted on the substrate; and a reflection member that is filled in a surrounding of the light emitting body, whereina top face of the reflection member is an inclined surface with an edge, on a side of the light emitting body, that is in contact with a lateral face of the light emitting body, and an edge, on a side of an outer circumference, at least a part of which is located at a position higher than a height of the light emitting body, andthe inclined surface has a concave-shaped curved surface that is temporarily inclined in a direction to approach the substrate as being apart from the edge on the side of the light emitting body toward the side of the outer circumference, and is thereafter inclined in a direction to be apart from the substrate.2. The light emitting device according to claim 1 , wherein the light emitting body includes a light emitting element claim 1 , and a phosphor-containing layer that is disposed on a top face of the light emitting element ...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

A method of manufacturing a semiconductor device includes: forming a trench on a surface of a semiconductor substrate; forming an oxide film on side surfaces and a bottom surface of the trench; removing at least a part of the oxide film by dry etching from the bottom surface of the trench; and ion-implanting conductive impurities into the semiconductor substrate through the bottom surface of the trench after the dry etching. The dry etching is reactive ion etching in which etching gas including fluorocarbon based gas having a carbon atom ring structure, oxygen gas, and argon gas is used. 1. A method of manufacturing a semiconductor device , the method comprising:forming a trench on a surface of a semiconductor substrate;forming an oxide film on side surfaces and a bottom surface of the trench;removing at least a part of the oxide film by dry etching from the bottom surface of the trench; andion-implanting conductive impurities into the semiconductor substrate through the bottom surface of the trench after the dry etching,wherein the dry etching is reactive ion etching in which etching gas including fluorocarbon based gas having a carbon atom ring structure, oxygen gas, and argon gas is used.2. The method according to claim 1 , wherein in the removing of the oxide film claim 1 , the oxide film is removed by dry etching until the bottom surface of the trench is exposed.3. The method according to claim I claim 1 , wherein a capacitively coupled plasma etching device is used for the dry etching claim 1 , the capacitively coupled plasma etching device including two alternating current power sources that supply alternating current power to a pair of electrodes claim 1 , respectively.4. The method according to claim 1 , wherein the fluorocarbon based gas having the carbon atom ring structure is represented by any one of chemical formulae CF claim 1 , CF claim 1 , CF claim 1 , and CHF.5. The method according to claim 1 , wherein the semiconductor substrate is a silicon ...

Silicon carbide semiconductor device and manufacturing method of silicon carbide semiconductor device

A silicon carbide semiconductor device includes a substrate, a drift layer disposed above the substrate, a base region disposed above the drift layer, a source region disposed above the base region, a gate trench formed deeper than the base region from a surface of the source region, a gate insulating film covering an inner wall surface of the gate trench, a gate electrode disposed on the gate insulating film, an interlayer insulating film covering the gate electrode and the gate insulating film and having a contact hole, a source electrode brought in ohmic contact with the source region through the contact hole, and a drain electrode disposed to a rear surface of the substrate. The source region has a lower impurity concentration on a side close to the base region than on a surface side brought in ohmic contact with the source region.

Multiple-Winding Pipe Forming Device and Multiple-Winding Pipe Forming Method

A multiple-winding pipe forming device for forming a wound pipe, the multiple-winding pipe forming device comprising: a plurality of pairs of forming rollers curling a metal sheet and winding the metal sheet into a roll shape; and a mandrel fabricated of metal, the mandrel including: a shaft disposed inside the metal sheet wound in the roll shape, one end side of the shaft being retained, which one end side is disposed upstream in a feeding direction of the metal sheet, and a working portion including a taper portion that increases in diameter from upstream to downstream in the feeding direction, wherein the taper portion is disposed at a position at which the metal sheet wound in the roll shape is sandwiched by, of the plurality of pairs of forming rollers, a pair of the forming rollers that is disposed at a downstream side in the feeding direction. 1. A multiple-winding pipe forming device for forming a wound pipe , the multiple-winding pipe forming device comprising:a plurality of pairs of forming rollers arranged along a feeding direction of a metal sheet that is an object of forming, each pair of forming rollers opposing one another so as to sandwich the metal sheet, and the plurality of pairs of forming rollers curling the metal sheet and winding the metal sheet into a roll shape; anda mandrel fabricated of metal, the mandrel including:a shaft that extends in the feeding direction and is disposed inside the metal sheet wound in the roll shape, one end side of the shaft being retained, which one end side is disposed upstream in the feeding direction, anda working portion provided at an opposite end side of the shaft from a side thereof at which the one end side is disposed, the working portion including a taper portion that increases in diameter from upstream to downstream in the feeding direction,wherein the taper portion of the working portion is disposed at a position at which the metal sheet wound in the roll shape is sandwiched by, of the plurality of ...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME

A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer. 1. A semiconductor device comprisinga semiconductor element of inversion-type, including:a substrate made of semiconductor and having a first conductivity type or a second conductivity type;a drift layer formed above the substrate, made of semiconductor, having the first conductivity type, and having an impurity concentration smaller than the substrate; the electric field block layers are made of semiconductor, have the second conductivity type, and are arranged in a stripe manner;', 'a longer direction of a respective electric field block layer is one direction;', 'the JFET portions are made of semiconductor, have the first conductivity type, and are arranged in a stripe manner;', 'a longer direction of a respective JFET portion is the one direction; and', 'the electric field block layers and the JFET portions are alternately arranged,, 'a saturation current suppression layer formed above the drift layer and including a plurality of electric field block layers and a plurality of JFET portions, whereina base region formed above the saturation current suppression layer, made of semiconductor, and having the first conductivity type;a ...

A SEMICONDUCTOR DEVICE COMPRISING AN DIODE REGION AND AN IGBT REGION

A technology for inhibiting gate interference in an RC-IGBT employing a diode structure having Schottky connections is provided. A semiconductor device includes a semiconductor substrate including a diode region and an IGBT region. In this semiconductor device, the diode region includes: a p-type anode region connected to an anode electrode by an Ohmic contact; a plurality of n-type pillar regions connected to the anode electrode by Schottky contacts; an n-type barrier region; an n-type diode drift region; and an n-type cathode region. An on-resistance of a first pillar region with respect to the anode electrode is higher than an on-resistance of a second pillar region with respect to the anode electrode. The second pillar region is located at a position close to the IGBT region. 1. A semiconductor device comprising:a semiconductor substrate comprising an diode region and an IGBT region;an anode electrode formed on a front surface of the semiconductor substrate within the diode region;a cathode electrode formed on a rear surface of the semiconductor substrate within the diode region;an emitter electrode formed on the front surface within the IGBT region;a collector electrode formed on the rear surface within the IGBT region;a gate insulating film; anda gate electrode,whereinthe diode region comprises:a p-type anode region connected to the anode electrode by an Ohmic contact;a plurality of n-type pillar regions located lateral to the anode region, being in contact with the anode region, and connected to the anode electrode by Schottky contacts;an n-type barrier region located at the rear surface side with respect to the anode region, being in contact with the anode region, and connected to the plurality of the pillar regions;an n-type diode drift region located at the rear surface side with respect to the barrier region, and having an n-type impurity concentration lower than that in the barrier region; andan n-type cathode region located at the rear surface side with ...

IMAGE CAPTURING APPARATUS HAVING IMAGE CAPTURING DEVICE PROVIDED WITH POLARIZATION ELEMENTS AND METHOD OF CONTROLLING SAME

An image capturing apparatus that has an image capturing device including polarization elements and sets a proper frame rate according to a situation when acquiring a video using polarization information. The image capturing device an image capturing device including polarization pixels that detect polarization information of a plurality of different directions. The polarization information of the polarization pixels is determined by performing first polarization calculation or second polarization calculation which is smaller in calculation load than the first polarization calculation, on video signals output from the polarization pixels. A polarization-processed image is generated by using the polarization information. The first polarization calculation and the second polarization calculation are switched according to a predetermined timing, a mode, or a result of detecting a predetermined state. 1. An image capturing apparatus including:an image capturing unit including polarization pixels that detect polarization information of a plurality of different direction, andat least one processor or circuit configured to perform the operations of the following units:a calculation unit configured to determine polarization information of the polarization pixels by performing first polarization calculation or second polarization calculation which is smaller in calculation load than the first polarization calculation, on video signals output from the polarization pixels;an image generation unit configured to generate a polarization-processed image using polarization information determined by the calculation unit; anda control unit configured to switch between the first polarization calculation and the second polarization calculation, which are performed by the calculation unit, according to a predetermined timing, a mode, or a result of detecting a predetermined state.2. The image capturing apparatus according to claim 1 , wherein a plurality of polarization pixels which are ...

IMAGE PICKUP APPARATUS HAVING IMAGE SENSOR EQUIPPED WITH POLARIZING ELEMENT AND CONTROL METHOD THEREFOR

An image pickup apparatus that enables to quickly capture an image from which a predetermined reflected light component is removed with desired sensitivity. A polarizing filter two-dimensionally arranges a plurality of sets each of which includes polarizing filter elements having different polarization directions. A first image sensor has pixels that respectively correspond to polarizing filter elements of the polarizing filter. A polarization calculation unit detects a polarized component of light that enters into a region in which one set of polarizing filter elements are arranged based on signals output from pixels in the region of the first image sensor for each region. A correction unit corrects a pixel signal output from a pixel of a second image sensor corresponding to the region based on a calculation result by the polarization calculation unit for each pixel of the second image sensor. 1. An image pickup apparatus comprising:a polarizing filter configured to two-dimensionally arrange a plurality of sets each of which includes polarizing filter elements having different polarization directions;a first image sensor configured to have pixels that respectively correspond to polarizing filter elements of the polarizing filter;a second image sensor;a polarization calculation unit configured to detect a polarized component of light that enters into a region in which one set of polarizing filter elements are arranged based on signals output from pixels in the region of the first image sensor for each region; anda correction unit configured to correct a pixel signal output from a pixel of the second image sensor corresponding to the region based on a calculation result by the polarization calculation unit for each pixel of the second image sensor.2. The image pickup apparatus according to claim 1 , wherein one set of the polarizing filter elements are arranged so as to change the polarization directions mutually claim 1 , andwherein the correction unit corrects a ...

METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR

A floating region includes a high-concentration region and a low-concentration region that are arranged along a thickness direction of a silicon carbide substrate. A concentration of a p-type dopant in the low-concentration region is lower than a concentration of the p-type dopant in the high-concentration region. The high-concentration region contacts the low-concentration region, and is disposed between a bottom surface of a trench and the low-concentration region. In graph obtained by plotting the concentration of the p-type dopant in the floating region along the thickness direction, a bending point or an inflection point appears on a boundary between the high-concentration region and the low-concentration region. A content of the p-type dopant in the low-concentration region is equal to or higher than a content of an n-type dopant in a portion of the drift region, which is adjacent to the low-concentration region in the thickness direction. 1. A metal-oxide-semiconductor field-effect transistor , comprising:a silicon carbide substrate including a trench; and an n-type source region;', 'an n-type drift region;', 'a p-type body region disposed between the n-type source region and the n-type drift region;', 'a p-type floating region disposed within the drift region, the p-type floating region being adjacent to a bottom surface of the trench; and', 'a p-type connection region extending from the p-type body region to the p-type floating region, wherein, 'the silicon carbide substrate including, 'a gate electrode disposed in the trench,'}the p-type floating region includes a high-concentration region and a low-concentration region that are arranged along a thickness direction of the silicon carbide substrate,the high-concentration region is disposed between the bottom surface of the trench and the low-concentration region, the high-concentration region being in contact with the low-concentration region,when a graph is obtained by plotting a concentration of a p-type ...

SEMICONDUCTOR DEVICE

A semiconductor device includes a diode region and an IGBT region. The diode region includes a front side anode region, an n-type diode barrier region, an n-type diode pillar region reaching the diode barrier region through the front side anode region, and a p-type back side anode region separated from the front side anode region by the diode barrier region. The IGBT region includes a front side body region, an n-type IGBT barrier region, and a back side body region separated from the front side body region by the IGBT barrier region. When a gate-off voltage is applied to a gate electrode, a resistance between the IGBT barrier region and the emitter electrode is higher than a resistance between the diode barrier region and the anode electrode. 1. A semiconductor device comprising:a semiconductor substrate including a diode region and an IGBT region;an anode electrode provided on a front surface of the semiconductor substrate in the diode region;a cathode electrode provided on a rear surface of the semiconductor substrate in the diode region;an emitter electrode provided on the front surface of the semiconductor substrate in the IGBT region;a collector electrode provided on the rear surface of the semiconductor substrate in the IGBT region;a gate insulating film; anda gate electrode, a p-type front side anode region connected to the anode electrode;', 'an n-type diode barrier region provided on a back side of the front side anode region;', 'an n-type diode pillar region connected to the anode electrode, the diode pillar region reaching the diode barrier region through the front side anode region from the front surface of the semiconductor substrate;', 'a p-type back side anode region provided on a back side of the diode barrier region, separated from the front side anode region by the diode barrier region, and having a p-type impurity concentration lower than a p-type impurity concentration of the front side anode region; and', 'an n-type cathode region provided on a ...

APPARATUS

Provided is an apparatus including: first and second photoelectric converting portions; a charge detecting portion; a transistor outputting a pixel signal first and second sampling and holding capacitors; an amplifier; and a controlling unit controlling gain in first and second mode. The pixel signal is one of: a first signal at time of resetting of charge; a second signal including a charge component of the first photoelectric converting portion and a noise component; and a third signal including the first component, a charge component of the second photoelectric converting portion and a noise component. In the first mode, the controlling unit uses a first gain. In the second mode, the controlling unit uses second gain to the first signal, third gain to the third signal of the first sampling and holding capacitor, and second gain to the third signal of the second sampling and holding capacitor. 1. An apparatus comprising:a first photoelectric converting portion and a second photoelectric converting portion;a charge detecting portion connected in common to the first photoelectric converting portion and the second photoelectric converting portion;a transistor configured to output a pixel signal corresponding to a potential of the charge detecting portion;a first sampling and holding capacitor and a second sampling and holding capacitor configured to hold the pixel signal;an amplifier configured to amplify the pixel signal held in the first sampling and holding capacitor or the second sampling and holding capacitor; anda controlling unit configured to control a gain used when the amplifier amplifies the pixel signal held in the sampling and holding capacitor and perform control in a first mode and a second mode, whereinthe pixel signal is any one of:a first signal corresponding to a potential of the charge detecting portion at time of resetting of the charge detecting portion;a second signal including a first component based on charges of the first photoelectric ...

SEMICONDUCTOR DEVICE

A semiconductor device is provided with a silicon layer, an upper surface side aluminum layer containing silicon and an insulation film. The upper surface side aluminum layer contacts and is layered on a part of a surface of the silicon layer. The insulation film contacts and is layered on another part of the surface of the silicon layer. The insulation film is adjacent to and contacts the upper surface side aluminum layer. The insulation film includes an insulation film body and a plurality of first nodule segregated portions projecting from the insulation film body toward the upper surface side aluminum layer as seen along a vertical direction relative to the surface of the silicon layer. A corner is formed by a side surface of the insulation film body and a side surface of each of the first nodule segregated portions as seen along the vertical direction. 1. A semiconductor device comprising:a semiconductor layer;an aluminum layer containing silicon, the aluminum layer contacting and layered on a part of a surface of the semiconductor layer; andan insulation film contacting and layered on another part of the surface of the semiconductor layer, the insulation film being adjacent to and contacting the aluminum layer;wherein the insulation film includes an insulation film body and a plurality of first nodule segregated portions projecting from the insulation film body toward the aluminum layer as seen along a vertical direction relative to the surface of the semiconductor layer, anda corner is formed by a side surface of the insulation film body and a side surface of each of the first nodule segregated portions as seen along the vertical direction.2. The semiconductor device according to claim 1 , whereineach of the first nodule segregated portions includes a first convex portion projecting from the insulation film body and a second convex portion projecting from the first convex portion.3. The semiconductor device according to claim 1 , whereinthe insulation film ...

IMAGE PROCESSING APPARATUS FOR DETECTING FLICKER, METHOD OF CONTROLLING THE SAME, AND NON-TRANSITORY STORAGE MEDIUM

An image processing technique that enables accurate detection of a flicker component even when applied to an image pickup device capable of changing a driving method on a region basis within a frame. A flicker detection section detects a flicker component of an image pixel signal read out from the image pickup device having a pixel region for detecting a phase difference. When the driving method is changed to one for performing phase difference detection, the flicker detection section detects a flicker component such that the period of the flicker component in a region used for phase difference detection within the frame coincides with a period of the flicker component in a region not used for phase difference detection. 1. An image processing apparatus comprising:a flicker detection unit configured to detect a flicker component of an image pixel signal, which is read out from an image pickup device that includes a pixel region for phase difference detection and is capable of changing a driving method, on a region-by-region basis, within a frame,wherein in a case where the driving method for driving the image pickup device is changed to a driving method for performing phase difference detection, said flicker detection unit detects the flicker component such that, within the frame, a period of the flicker component in a region used for phase difference detection coincides with a period of the flicker component in a region not used for phase difference detection.2. The image processing apparatus according to claim 1 , further comprising a drive unit configured to read out a signal from the image pickup device claim 1 ,wherein the pixel region for phase difference detection is a region of the image pickup device, in which pixels including a first photoelectric converter and a second photoelectric converter are arranged in a row direction, andwherein said drive unit reads out not only a signal generated by adding a first signal output from the first photoelectric ...

Semiconductor device

A semiconductor device is provided with a semiconductor layer including Si and a Schottky electrode being in Schottky contact with at least a part of one of main surfaces of the semiconductor layer. A material of the Schottky electrode is a Al—Si alloy including at least one metal selected from the group consisting of Ti, Ta, Nb, Hf, Zr, W, Mo and V.

SEMICONDUCTOR DEVICE

In a plan view of a semiconductor substrate, the semiconductor substrate includes a pillar exposing area in which the pillar region is exposed on the front surface of the semiconductor substrate, a pillar contacting area in which the pillar region is in contact with a deeper side of the anode contact region, and an anode contacting area in which the anode region is in contact with the deeper side of the anode contact region. In a direction along which the pillar contacting area and the anode contacting area are aligned, a width of the pillar contacting area is smaller than a width of the anode contacting area. 1. A semiconductor device comprising:a semiconductor substrate including an IGBT region and a diode region; anda front surface electrode provided on a front surface of the semiconductor substrate,wherein the IGBT region comprises:an n-type drift region;an n-type bather region provided on a front surface side of the drift region;a p-type body region provided on a front surface side of the barrier region;an n-type emitter region provided on a front surface side of the body region and configured to electrically connect to the front surface electrode;a p-type body contact region provided on the front surface side of the body region at a position different from a position of the emitter region, the p-type body contact region having an impurity concentration higher than an impurity concentration of the body region, and configured to electrically connect to the front surface electrode;a plurality of gate trenches extending from the front surface of the semiconductor substrate, piercing the emitter region, the body region and the bather region and reaching the drift region; andan n-type pillar region extending from the front surface of the semiconductor substrate between adjacent gate trenches, piercing the body region and reaching the barrier region, and configured to electrically connect to the front surface electrode and the barrier region;wherein the diode region ...

Microscope system

The purpose of the present invention is to detect a fixed number of photons or greater in a short time and to create a super-resolution image having a desired resolution equal to optical resolution or higher. A microscope system includes: a scanner that scans laser light emitted from a continuous-wave light source on a specimen; a beam splitter that splits fluorescence from the specimen on which the laser light is scanned into a plurality of light paths with the same wavelength; a plurality of PMTs that respectively detect the fluorescence in the light paths split by the beam splitter and output light intensity signals; a PC that, each time the laser light is repeatedly scanned by the scanner, for each of the PMTs, acquires an image dataset of the specimen on the basis of the light intensity signals, that combines the plurality of image datasets for the same area of the specimen, which are acquired on the basis of the light intensity signals of the fluorescence from the same area of the specimen, detected by each PMT, and that subjects this final combined image dataset to computational processing for enhancing high-frequency components.

SAMPLE OBSERVATION APPARATUS AND METHOD FOR GENERATING OBSERVATION IMAGE OF SAMPLE

A good super-resolution image can be generated, while eliminating a troublesome task necessary for generating a raw image. Provided is a sample observation apparatus including a memory, which stores a first number of photoelectrons required in a raw image for generating a super-resolution image, and a main controller, which calculates the number of image data sets to be added together for generating the raw image based on the first number of photoelectrons stored in the memory and a predetermined image acquisition condition, which acquires multiple sets of image data of the same region of a sample by repeatedly detecting light from the same region based on the calculated number of image data sets, and which generates the raw image by adding together the acquired multiple sets of image data of the same region. 1. A sample observation apparatus comprising:a storage section that stores information about an S/N ratio required in a raw image for generating a super-resolution image;a number-of-image-data-sets calculator that calculates a number of image data sets to be added together for generating the raw image based on the S/N-ratio information stored in the storage section and a predetermined image acquisition condition;an image-data acquisition section that acquires the image data by detecting light from a sample with the predetermined image acquisition condition;a controller that causes the image-data acquisition section to acquire multiple sets of the image data of the same region of the sample by making the image-data acquisition section repeatedly detect light from the same region based on the number calculated by the number-of-image-data-sets calculator; anda raw-image generator that adds together the multiple sets of image data of the same region acquired by the image-data acquisition section so as to generate the raw image.2. The sample observation apparatus according to claim 1 ,wherein the S/N-ratio information includes a first number of photoelectrons, which ...

IMAGING APPARATUS, IMAGING METHOD, AND STORAGE MEDIUM

An imaging apparatus having a wide dynamic range and a stable black level without decreasing frame rate comprises a pixel unit including pixels, a read out unit for reading out the noise signal from each pixel and to amplify the noise signal by a first gain to generate a first noise signal, reads out the pixel signal and amplifies the pixel signal by the first gain and a second gain to generate a first and a second pixel signal, a first memory unit for storing a second noise signal generated by amplifying, by the second gain, the noise signal read out from a pixel of a predetermined row, and a subtraction unit for subtracting the first noise signal from the first pixel signal and to subtract the second noise signal stored in the first memory unit from the second pixel signal, while sequentially reading out signals from each pixel. 1. An imaging apparatus comprising:a pixel unit including a plurality of pixels arranged in rows and columns, wherein each pixel can output a noise signal and a pixel signal that is generated by photoconversion;at least one processor or circuit which function asa read out unit configured to read out the noise signal from each pixel in the pixel unit and to amplify the noise signal by a first gain to generate a first noise signal, wherein the read out unit reads out the pixel signal and amplifies the pixel signal by the first gain to generate a first pixel signal and amplifies the pixel signal by a second gain to generate a second pixel signal;a first memory unit configured to store a second noise signal that is generated by amplifying, by the second gain, the noise signal read out from a pixel of a predetermined row in the pixel unit; anda subtraction unit configured to subtract the first noise signal from the first pixel signal and to subtract the second noise signal stored in the first memory unit from the second pixel signal, while sequentially reading out signals from each pixel of the pixel unit.2. The imaging apparatus according to ...

IMAGE PICKUP APPARATUS THAT DETECTS FLASH BAND AND CONTROL METHOD THEREFOR

An image pickup apparatus which is capable of detecting a flash band with high accuracy even when no flash light is falling on a part of an image. The image pickup apparatus detects a band-shaped luminance step appearing in a plurality of frame images, which are obtained through image pickup by an image pickup unit, in a video comprised of the plurality of frame images. A detection area, which is for use in detecting the luminance step, is set in a part of the frame image according to a subject included in the frame image. Luminance data is obtained on a line-by-line basis in the detection area, and based on a difference in luminance data between corresponding lines in the frame images, the luminance step is detected. 1. An image pickup apparatus that has an image pickup unit and detects a band-shaped luminance step appearing in a plurality of frame images , which are obtained through image pickup by the image pickup unit , in a video comprised of the plurality of frame images , comprising:a setting unit configured to set a detection area, which is for use in detecting the luminance step, in a part of the frame image according to a subject included in the frame image; anda detecting unit configured to obtain luminance data on a line-by-line basis in the detection area, and based on a difference in luminance data between corresponding lines in the frame images, detects the luminance step.2. The image pickup apparatus according to claim 1 , further comprising a subject detecting unit configured to detect a subject included in the frame image claim 1 ,wherein said setting unit sets the detection area such that the detection area includes the subject detected by said subject detecting unit.3. The image pickup apparatus according to claim 1 , wherein said setting unit obtains a subject area based on distance information indicative of a distance between the image pickup apparatus and the subject and sets the detection area according to the subject area.4. The image pickup ...

POWER STORAGE APPARATUS

A power storage apparatus is configured such that a region surrounded by a plane connecting the outline of a pressure release valve and the outline of a tab-side end face in an electrode assembly in the shortest distance is defined as a three-dimensional region. The power storage apparatus is provided with a covering portion that covers the entire cross section of the three-dimensional region along the tab-side end face in a space between the tab-side end face and the inner surface of a lid body. 1. A power storage apparatus comprising:an electrode assembly in which a positive electrode and a negative electrode are insulated from each other and have a lamination structure;a positive electrode conductive member connected to a tab of the positive electrode;a negative electrode conductive member connected to a tab of the negative electrode;liquid electrolyte;a case containing the electrode assembly and the liquid electrolyte; anda pressure release valve that is located in a wall portion of the case and configured to tear when a pressure in the case reaches a release pressure to release the pressure out of the case, whereinthe positive electrode conductive member and the negative electrode conductive member are arranged in a longitudinal direction of the wall portion,the case has a parallelepiped shape and includes a base wall, which is opposite to the wall portion, two short side walls, which project from short edges of the base wall, and two long side walls, which project from long edges of the base wall,the electrode assembly has a lamination direction in which the positive electrode and the negative electrode are stacked, the lamination direction is identical with a transverse direction of the wall portion,the positive electrode conductive member and the negative electrode conductive member have dimensions in the transverse direction of the wall portion that are less than a distance between opposing surfaces of the two long side walls,a region surrounded by planes ...

SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

The width of the p type guard ring is set to match the interval between the adjacent p type guard rings, and the width of the p type guard ring is made larger as the interval between the p type guard rings becomes larger. The width of the frame portion is basically equal to the width of the p type deep layer so that the interval between the frame portions is equal to the interval between the p type deep layers. This makes it possible to reduce the difference in formation areas of the trenches per unit area in the cell portion, the connection portion and the guard ring portion. Therefore, when the p type layer is formed, the difference in the amount of the p type layer embedding into the trenches per unit area also decreases and the thickness of the p type layer is equalized. 1. A silicon carbide semiconductor device having a cell portion and an outer peripheral portion that includes a guard ring portion surrounding an outer periphery of the cell portion and a connection portion positioned between the guard ring portion and the cell portion , the semiconductor device comprising:a substrate having a first or second conductivity type; anda drift layer having the first conductivity type, arranged on a surface of the substrate, and having an impurity concentration lower than the substrate, wherein:the cell portion, or the cell portion and the connection portion includes a second conductivity type layer that is arranged in a plurality of line-shaped first trenches having a stripe shape and disposed in the drift layer, and is made of an epitaxial film having the second conductivity type;the cell portion includes a vertical type semiconductor element that has: a first electrode electrically connected to the second conductivity type layer; and a second electrode arranged on a back side of the substrate, and flows a current between the first electrode and the second electrode;the guard ring portion, or the guard ring portion and the connection portion includes a second ...

PHOTOELECTRIC CONVERSION DEVICE

A device includes a conversion unit, a generation unit configured to generate a pulse signal based on a signal from the conversion unit, a counter circuit configured to count the generated pulse signal, and a time measurement circuit configured to measure a time wherein one of a count value counted by the counter circuit or a time measurement value measured by the time measurement circuit is selectively output. 1. A device , comprising:a conversion unit;a generation unit configured to generate a pulse signal based on a signal from the conversion unit;a counter circuit configured to count the generated pulse signal; anda time measurement circuit configured to measure a time,wherein one of a count value counted by the counter circuit or a time measurement value measured by the time measurement circuit is selectively output.2. The device according to claim 1 , further comprising a plurality of pixels claim 1 ,wherein the time measurement circuit is provided corresponding to one of the plurality of pixels.3. The device according to claim 2 , wherein the time measurement circuit is provided corresponding to a pixel having highest sensitivity among the plurality of pixels.4. The device according to claim 2 ,wherein the count value and the time measurement value are output, andwherein pixel values of the plurality of pixels are restored from the count value and the time measurement value.5. The device according to claim 2 , wherein claim 2 , in a case where the count value of the counter circuit corresponding to the pixel connected to the time measurement circuit is saturated claim 2 , all counter circuits corresponding to the plurality of pixels stop.6. The device according to claim 1 , further comprising:a number-of-saturation-times counter configured to count a number of saturation times of the counter circuit;a saturation time counter configured to count a total saturation time of the counter circuit; anda memory unit configured to store the number of saturation times ...

Vehicle bumper

A vehicle bumper is provided that can increase the rigidity while ensuring a superior drainage capability in the vicinity of the location where the bumper is attached to a side face member. A vehicle bumper includes a middle portion extending in vehicle width direction, two lateral portions extending from the two ends of the middle portion towards side face members (front fender panels), an upper flange protruding inward, with respect to a vehicle body, from an upper edge of the lateral portions, an attachment flange that is continuous with the upper flange near an end of the lateral portions and protruding further inside the vehicle body than the upper flange, a long groove formed by a depression in an upper face of the upper flange, at least one rib that partitions the long groove in vehicle width direction into depressions, and water drainage holes formed in the depressions.

IGBT with a built-in-diode

When an IGBT has a barrier layer 10 that separates an upper body region 8 a from a lower body region 8 b , conductivity modulation is enhanced and on-resistance decreases. When the IGBT also has a Schottky contact region 6 that extends to reach the barrier layer 10 , a diode structure can be obtained. In this case, however, a saturation current increases as well as short circuit resistance decreases. The Schottky contact region 6 is separated from the emitter region 4 by the upper body region 8 a . By selecting an impurity concentration in the region 8 a , an increase in a saturation current can be avoided. Alternatively, a block structure that prevents a depletion layer extending from the region 6 into the region 8 a from joining a depletion layer extending from the region 4 into the region 8 a may be provided in an area separating the region 6 from the region 4.

Semiconductor device

Halbleitervorrichtung (102) mit einem Diodenbereich (108) und einem IGBT-Bereich (106) in einem selben Halbleitersubstrat, wobei der Diodenbereich (108) aufweist: eine Kathodenelektrode (146); einen Kathodenbereich (120), der aus einem Halbleiter eines ersten Leitfähigkeitstyps konfiguriert ist; einen ersten Driftbereich (114), der aus einem Halbleiter eines ersten Leitfähigkeitstyps mit einer niedrigen Dotierstoffkonzentration konfiguriert ist; einen unteren Anodenbereich (168), der aus einem Halbleiter eines zweiten Leitfähigkeitstyps konfiguriert ist; einen oberen Anodenbereich (124), der aus einem zweiten Leitfähigkeitstyp konfiguriert ist; eine Anodenelektrode (148), die aus einem Metall konfiguriert ist; einen ersten Barrierenbereich (122), der aus einem Halbleiter eines ersten Leitfähigkeitstyps mit einer höheren Dotierstoffkonzentration als der Dotierstoffkonzentration des ersten Driftbereichs (114) konfiguriert ist, und zwischen dem unteren Anodenbereich (168) und dem oberen Anodenbereich (124) angeordnet ist; und einen ersten Säulenbereich (142), der aus einem Halbleiter eines ersten Leitfähigkeitstyps mit einer höheren Dotierstoffkonzentration als die Dotierstoffkonzentration des ersten Barrierenbereichs (122) konfiguriert ist und so angeordnet ist, dass er den ersten Barrierenbereich (122) und die Anodenelektrode (148) verbindet, und der erste Säulenbereich (142) und die Anodenelektrode (148) einen Schottky-Übergang bilden, und der IGBT-Bereich (106) aufweist: eine Kollektorelektrode (146); einen Kollektorbereich (110), der aus einem Halbleiter eines zweiten Leitfähigkeitstyps konfiguriert ist; einen zweiten Driftbereich (115), der aus einem Halbleiter eines ersten Leitfähigkeitstyps mit einer niedrigen Dotierstoffkonzentration konfiguriert ist und den ersten Driftbereich (114) fortsetzt; einen unteren Bodybereich (166), der aus einem Halbleiter eines zweiten Leitfähigkeitstyps konfiguriert ist; einen oberen Bodybereich (118), der aus einem Halbleiter ...

Power storage device and power storage module

【課題】電極組立体に付加される拘束圧の変動を抑制できる蓄電装置及び蓄電モジュールを提供する。【解決手段】蓄電装置では、電極組立体３の外側に配置された緩衝体１６が弾性変形可能となっている。したがって、蓄電装置１を放充電する際に電極組立体３が膨張・収縮した場合であっても、緩衝体１６の弾性変形によって電極組立体３に付加される拘束圧の変動が抑制される。これにより、拘束圧の増加に起因する電極の破損や、局所的な内部抵抗の減少によって電流が増大し、金属の析出によって容量が低下してしまうことを防止できる。また、拘束圧の減少に起因する内部抵抗の増大を防止できる。緩衝体１６は、ケース２内の電解液４を保持しないので、電極組立体３が膨張・収縮を繰り返したとしても緩衝体１６の状態変化が抑えられ、拘束圧の変動抑制効果を維持できる。【選択図】図３

Image pickup device and storage medium

In order to improve linearity characteristics in synthesis processing for expanding a dynamic range, an image pickup apparatus comprising an AD conversion unit for performing AD conversion of input signals by comparing a first ramp signal or a second ramp signal; a first synthesis unit for synthesizing a first signal AD converted using the first ramp signal and a second signal AD converted using the second ramp signal; a first correction unit for correcting a level difference between the first signal and the second signal when the first signal and the second signal are synthesized; an amplifier for amplifying pixel signals by different gains; a second synthesis unit for synthesizing the signals amplified by the different gains; and a second correction unit for correcting a level difference between the signals amplified by the different gains when the signals amplified by the different gains are synthesized.

Laser scanning microscope and microscopic observing method

To provide a laser scanning microscope including a laser beam source for stimulation that emits a laser beam for stimulation for applying photostimulation to a sample, a scanner that performs scanning with the laser beam for stimulation, a control device that controls the scanner, and an objective lens that condenses the laser beam for stimulation used for scanning by the scanner to the sample. The scanner has at least one acoustooptic device arranged on an optical path of the laser beam for stimulation. The control device determines a plurality of frequencies on the basis of the position and the range of a photostimulation region, and simultaneously applies the high-frequency signals of the determined plurality of frequencies to a vibrator attached to the acoustooptic device.

Laser scanning microscope

Provided is a laser scanning microscope that allows stable examination by eliminating the influence of ambient light while inhibiting damage to a specimen and fading of fluorescence. Employed is a laser scanning microscope 1 including a culture vessel 6 accommodating a specimen A and capable of maintaining an interior temperature and humidity thereof and an optical system space 5 adjacent to the culture vessel 6 and optically connected to the culture vessel 6. The optical system space 5 includes a scanner 22 that two-dimensionally scans ultrashort pulsed laser light across the specimen A; an objective lens 15 that focuses the scanned ultrashort pulsed laser light on the specimen A and collects light coming from the specimen A; a dichroic mirror 53, disposed between the scanner 22 and the objective lens 15, that splits off the light coming from the specimen A from the laser light; a photodetector 55 that detects the split-off light coming from the specimen A; and a outer cover 2, provided so as to surround the optical system space 5, that blocks light coming from outside the optical system space 5.

Image sensor, image capturing apparatus and image processing apparatus

An image sensor comprises: a pixel region including a plurality of microlenses arranged in a matrix, and a plurality of photoelectric conversion portions provided for each of the microlenses; a plurality of amplifiers that apply a plurality of different gains to signals output from the pixel region; and a scanning circuit that scans the pixel region so that a partial signal and an added signal are read out, the partial signal being a signal from some of the plurality of photoelectric conversion portions, and the added signal being a signal obtained by adding the signals from the plurality of photoelectric conversion portions.

Printer

Purification process for hydrophilic organic solvent

Methods for the removal of ionic contaminants from a hydrophilic organic solvent by a mixed bed of ion exchange resins are described. A mixed bed of ion exchange resins with gel-type strong-acid cationic ion exchange resin with a specific moisture holding capacity and gel-type anionic ion exchange resin is used in some embodiments of such methods.

Method for manufacturing compound semiconductor device including p-type impurity layer

A method for manufacturing a compound semiconductor device includes causing epitaxial growth of a p-type impurity layer containing a compound semiconductor on a foundation layer containing the compound semiconductor. The causing the epitaxial growth includes performing pre-doping to preliminarily introduce dopant gas before introducing material gas for the epitaxial growth of the compound semiconductor. The dopant gas contains an organic metal material providing dopant of p-type impurities. An impurity concentration profile of the p-type impurity layer is controlled by controlling a time of the pre-doping.

Diode, semiconductor device, and mosfet

Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.

purification process for hydrophilic organic solvent

métodos para a remoção de contaminantes iônicos de um solvente orgânico hidrofílico por um leito misto de resinas de permuta iônica são descritos. um leito misto de resinas de permuta iônicas com resina permuta iônica catiônica de ácido forte tipo gel com uma capacidade de retenção de umidade específica e resina de permuta iônica aniônica do tipo gel é usado em algumas modalidades de tais métodos. Methods for the removal of ionic contaminants from a hydrophilic organic solvent through a mixed bed of ion exchange resins are described. A mixed bed of gel-like strong acid cation-exchange ion exchange resin resins with a specific moisture retention capacity and gel-like anion-exchange resin is used in some embodiments of such methods.

Silicon carbide semiconductor device and manufacturing method of silicon carbide semiconductor device

A silicon carbide semiconductor device includes a substrate, a drift layer disposed above the substrate, a base region disposed above the drift layer, a source region disposed above the base region, a gate trench formed deeper than the base region from a surface of the source region, a gate insulating film covering an inner wall surface of the gate trench, a gate electrode disposed on the gate insulating film, an interlayer insulating film covering the gate electrode and the gate insulating film and having a contact hole, a source electrode brought in ohmic contact with the source region through the contact hole, and a drain electrode disposed to a rear surface of the substrate. The source region has a lower impurity concentration on a side close to the base region than on a surface side brought in ohmic contact with the source region.