Настройки

Укажите год
-

Небесная энциклопедия

Космические корабли и станции, автоматические КА и методы их проектирования, бортовые комплексы управления, системы и средства жизнеобеспечения, особенности технологии производства ракетно-космических систем

Подробнее
-

Мониторинг СМИ

Мониторинг СМИ и социальных сетей. Сканирование интернета, новостных сайтов, специализированных контентных площадок на базе мессенджеров. Гибкие настройки фильтров и первоначальных источников.

Подробнее

Форма поиска

Поддерживает ввод нескольких поисковых фраз (по одной на строку). При поиске обеспечивает поддержку морфологии русского и английского языка
Ведите корректный номера.
Ведите корректный номера.
Ведите корректный номера.
Ведите корректный номера.
Укажите год
Укажите год
Применить Всего найдено 2. Отображено 2.
17-04-2013 дата публикации

FinFET parasitic capacitance reduction using air gap

Номер: GB0002495606A
Автор: YAMASHITA TENKO [GB], ANDO TAKASHI [GB], STANDAERT THEODORUS EDUARDUS [GB], KANAKASABAPATHY SIVANANDA [GB], KULKARNI PRANITA [GB], CHANG JOSEPHINE [GB], YAMASHITA TENKO, ANDO TAKASHI, STANDAERT THEODORUS EDUARDUS, KANAKASABAPATHY SIVANANDA, KULKARNI PRANITA, CHANG JOSEPHINE, TENKO YAMASHITA, TAKASHI ANDO, THEODORUS EDUARDUS STANDAERT, SIVANANDA KANAKASABAPATHY, PRANITA KULKARNI, JOSEPHINE CHANG
Принадлежит:

A transistor, such as a FinFET, includes a gate structure 6, 102 disposed over a substrate. The gate structure has a width and also a length and a height defining two opposing sidewalls of the gate structure. The transistor further includes at least one electrically conductive channel between a source region and a drain region that passes through the sidewalls of the gate structure; a dielectric layer 310 disposed over the gate structure and portions of the electrically conductive channel that are external to the gate structure; and an air gap 314 underlying the dielectric layer. The air gap is disposed adjacent to the sidewalls of the gate structure and functions to reduce parasitic capacitance of the transistor. At least one method to fabricate the transistor is also disclosed.

Подробнее
Номер записи: 1
26-06-2013 дата публикации

Source-drain extension formation in replacement metal gate transistor device

Номер: GB0002497849A
Автор: YAMASHITA TENKO [GB], DIVAKARUNI RAMACHANDRA [GB], BU HUIMING [GB], SHANG HUILING [GB], CHUNG-HSUN LIN [GB], ANDO TAKASHI [GB], DORIS BRUCE B [GB], YAMASHITA TENKO, DIVAKARUNI RAMACHANDRA, BU HUIMING, SHANG HUILING, CHUNG-HSUN LIN, ANDO TAKASHI, DORIS BRUCE B, TENKO YAMASHITA, RAMACHANDRA DIVAKARUNI, HUIMING BU, HUILING SHANG, LIN CHUNG-HSUN, TAKASHI ANDO, BRUCE B DORIS
Принадлежит:

A method to fabricate a field effect transistor includes forming on a surface of a semiconductor 10 a dummy gate structure comprised of a plug 14, forming a first spacer 18 surrounding the plug, the first spacer being a sacrificial spacer, and performing an angled ion implant so as to implant a dopant species into the surface of the semiconductor adjacent to an outer sidewall of the first spacer to form source and drain extension regions 20, such that the implanted species extends under the outer sidewall of the first spacer by an amount that is a function of the angle of the ion implant. The method further includes performing a laser anneal to activate the source and drain extension implants. In further processing, a second spacer is formed surrounding the first spacer, the first spacer and dummy gate are removed to form an opening and a gate stack is deposited in the opening.

Подробнее
Номер записи: 2