THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME

A thin film transistor array panel includes: a gate line on a substrate and including a gate electrode; a first gate insulating layer on the substrate and the gate line, the first gate insulting layer including a first portion adjacent to the gate line and a second portion overlapping the gate line and having a smaller thickness than that of the first portion; a second gate insulating layer on the first gate insulating layer; a semiconductor layer on the second gate insulating layer; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a passivation layer on the second gate insulating layer, the source electrode and the drain electrode; and a pixel electrode on the passivation layer and connected with the drain electrode. The first gate insulating layer and the second gate insulating layer have stress in opposite directions from each other. 1. A thin film transistor array panel , comprising:a gate line on a substrate and including a gate electrode;a semiconductor layer on the substrate;a source electrode and a drain electrode spaced apart from each other, on the semiconductor layer; a first portion on the substrate and adjacent to the gate line,', 'a second portion overlapping the gate line and having a thickness smaller than a thickness of the first portion, and', 'a step portion connecting the first portion and the second portion,, 'a first gate insulating layer on the substrate and the gate line, the first gate insulating layer comprisinga second gate insulating layer on the first gate insulating layer;a passivation layer on the second gate insulating layer, the source electrode and the drain electrode; anda pixel electrode on the passivation layer, the pixel electrode connected with the drain electrode,whereinthe first and second gate insulating layers are between the gate line and the semiconductor layer,the first gate insulating layer has a tensile stress, andthe second gate insulating layer has a compressive stress ...

Metal wire etchant and method for manufacturing metal wire using the same

The invention provides a metal wire etchant and a method for manufacturing metal wire using the same. The metal wire etchant includes persulfate, a sulfonate, a fluorine compound, an azole-based compound, an organic acid, a nitrate, and a chlorine compound, and a method of making the same. The metal wire etchant can ensure high stability and a high process margin, and can uniformly etch a copper layer and a lower metal layer.

LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME

A liquid crystal display includes a first substrate, a gate line which includes a gate electrode, a gate insulating layer, a semiconductor stripe layer which is separated from the gate line in a plan view, a semiconductor island, a data line, a source electrode and a drain electrode, an interlayer insulating layer in which a data line exposure hole which exposes a part of the data line is defined, a connecting member which is disposed on the interlayer insulating layer and is connected to the data lines which are disposed on and below the gate line through the data line exposure hole in plan view; and a pixel electrode which is disposed on the interlayer insulating layer and is separated from the connecting member, where the connecting member is directly connected to the source electrode and the pixel electrode is directly connected to the drain electrode. 1. A liquid crystal display , comprising:a first substrate;a gate line which is disposed on the first substrate, extends in a first direction, and includes a gate electrode;a gate insulating layer which is disposed on the gate line;a semiconductor stripe layer which is disposed on the gate insulating layer, extends in a second direction which is perpendicular to the first direction, and separated from the gate line in a plan view;a semiconductor island layer which is disposed on the gate insulating layer, is separated from the semiconductor stripe layer, and overlaps the gate electrode;a data line which is disposed on the semiconductor stripe layer separated from the gate line in the plan view;a source electrode and a drain electrode which are disposed on the semiconductor island layer to be separated from each other;an interlayer insulating layer which is disposed on the data line and the gate insulating layer and in which a data line exposure hole, which exposes a part of the data line, is defined;a connecting member which is disposed on the interlayer insulating layer and is connected to data lines which are ...

ECHTANT AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME

An etchant according to exemplary embodiments of the present invention includes about 0.5 wt % to about 20 wt % of persulfate, about 0.01 wt % to about 2 wt % of a fluorine compound, about 1 wt % to about 10 wt % of inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 5 wt % of a chlorine compound, about 0.05 wt % to about 3 wt % of copper salt, about 0.1 wt % to about 10 wt % of organic acid or organic acid salt, and water. 1. An etchant comprising:about 0.5 wt % to about 20 wt % of persulfate,about 0.01 wt % to about 2 wt % of a fluorine compound,about 1 wt % to about 10 wt % of inorganic acid,about 0.5 wt % to about 5 wt % of a cyclic amine compound,about 0.1 wt % to about 5 wt % of a chlorine compound,about 0.05 wt % to about 3 wt % of copper salt,about 0.1 wt % to about 10 wt % of organic acid or organic acid salt, and water.2. The etchant of claim 1 , whereinthe persulfate comprises at least one compound selected from potassium persulfate, sodium persulfate, or ammonium persulfate.3. The etchant of claim 1 , whereinthe fluorine compound comprises at least one compound selected from ammonium fluoride, sodium fluoride, potassium fluoride, ammonium bifluoride, sodium bifluoride, or potassium bifluoride.4. The etchant of claim 1 , wherein the inorganic acid comprises at least one compound selected from a nitric acid claim 1 , a sulfuric acid claim 1 , a phosphoric acid claim 1 , or a perchloric acid.5. The etchant of claim 1 , whereinthe cyclic amine compound comprises at least one compound selected from 5-aminotetrazole, imidazole, indole, purine, pyrazole, pyridine, pyrimidine, pyrrole, pyrrolidine, or pyrroline.6. The etchant of claim 1 , whereinthe chlorine compound comprises at least one compound selected from hydrochloric acid, sodium chloride, potassium chloride, or ammonium chloride.7. The etchant of claim 1 , wherein:the copper salt comprises at least one compound selected from copper nitrate, copper sulfate, ...

ETCHANT AND METHOD OF MANUFACTURING AN ARRAY SUBSTRATE USING THE SAME

An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH)SO, about 0.1 percent by weight to about 10 percent by weight of an inorganic acid, about 0.1 percent by weight to about 10 percent by weight of an acetate salt, about 0.01 percent by weight to about 5 percent by weight of a fluorine-containing compound, about 0.01 percent by weight to about 5 percent by weight of a sulfonic acid compound, about 0.01 percent by weight to about 2 percent by weight of an azole compound, and a remainder of water. Accordingly, the etchant may have high stability to maintain etching ability. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced. 1. A method of manufacturing an array substrate , the method comprising:forming a base substrate;forming a first conductive layer on the base substrate;forming a gate line and a gate electrode by patterning the first conductive layer formed on the base substrate;forming a semiconductor layer on the base substrate including the gate line formed thereon;forming a second conductive layer on the semiconductor layer;forming a source electrode and a drain electrode by patterning the second conductive layer formed on the semiconductor layer;forming a passivation layer including a contact hole formed therethrough, the contact hole exposing a portion of the drain electrode;forming a third conductive layer on the passivation layer; andforming a pixel electrode by patterning the third conductive layer formed on the passivation layer, wherein the pixel electrode is electrically connected to the drain electrode through the contact hole, and{'sub': 4', '2', '2', '8, 'wherein the first conductive layer and the second conductive layer are patterned using an etchant comprising ammonium persulfate (NH)SO, an inorganic acid, an acetate salt, a fluorine-containing compound, a sulfonic acid compound, an azole compound, and water.'}2. The method of claim 1 , wherein the etchant ...

Method of forming a metal pattern and method of manufacturing a display substrate including the metal pattern

A method of forming a metal pattern on a display substrate includes blanket depositing a copper-based layer having a thickness between about 1,500 Å and about 5,500 Å on a base substrate, and forming a patterned photoresist layer on the copper-based layer. The copper-based layer is over-etched by an etching composition containing an oxidizing moderating agent where the over-etch factor is between about 40% and about 200% while using the patterned photoresist layer as an etch stopping layer, and where the etching composition includes ammonium persulfate between about 0.1% by weight and about 50% by weight, includes an azole-based compound between about 0.01% by weight and about 5% by weight and a remainder of water. Thus, reliability of the metal pattern and that of manufacturing a display substrate may be improved.

ETCHANTS AND METHODS OF FABRICATING METAL WIRING AND THIN FILM TRANSISTOR SUBSTRATE USING THE SAME

An etchant includes: a persulfate; a fluoride; an inorganic acid; a cyclic amine; a sulfonic acid; and one of an organic acid and a salt thereof. 1. An etchant comprising:a persulfate contained in an amount of about 0.5 weight % to about 20 weight %, with respect to a total weight of the etchant;a fluoride contained in an amount of about 0.01 weight % to about 2 weight %, with respect to the total weight of the etchant;an inorganic acid contained in an amount of about 1 weight % to about 10 weight %, with respect to the total weight of the etchant;a cyclic amine contained in an amount of about 0.5 weight % to about 5 weight %, with respect to the total weight of the etchant;a sulfonic acid contained in an amount of about 0.1 weight % to about 10.0 weight %, with respect to the total weight of the etchant; andat least one of an organic acid or a salt thereof contained in an amount of about 0.1 weight % to about 10 weight %, with respect to the total weight of the etchant.2. The etchant of claim 1 , wherein the persulfate is at least one of KSO claim 1 , NaSO claim 1 , or (NH)SO.3. The etchant of claim 2 , wherein the fluoride is at least one of an ammonium fluoride claim 2 , a sodium fluoride claim 2 , a potassium fluoride claim 2 , an ammonium bifluoride claim 2 , a sodium bifluoride claim 2 , or a potassium bifluoride.4. The etchant of claim 2 , wherein the inorganic acid is at least one of a nitric acid claim 2 , a sulfuric acid claim 2 , a phosphoric acid claim 2 , or a perchloric acid.5. The etchant of claim 2 , wherein the cyclic amine is at least one of aminotetrazole claim 2 , imidazole claim 2 , indole claim 2 , purine claim 2 , pyrazole claim 2 , pyridine claim 2 , pyrimidine claim 2 , pyrrole claim 2 , pyrrolidine claim 2 , or pyrroline.6. The etchant of claim 2 , wherein the sulfonic acid is a p-toluene sulfonic acid or methane sulfonic acid.7. The etchant of claim 2 , wherein the organic acid is a carboxylic acid claim 2 , a dicarboxylic acid claim 2 , a ...

ETCHING COMPOSITION, METHOD OF FORMING A METAL PATTERN USING THE ETCHING COMPOSITION, AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE

An etching composition, a method of forming a metal pattern using the etching composition, and a method of manufacturing a display substrate are disclosed. The etching composition includes about 0.1% by weight to about 25% by weight of ammonium persulfate, about 0.1% by weight to about 25% by weight of an organic acid, about 0.01% by weight to about 5% by weight of a chelating agent, about 0.01% by weight to about 5% by weight of a fluoride compound, about 0.01% by weight to about 5% by weight of a chloride compound, about 0.01% by weight to about 2% by weight of an azole-based compound and a remainder of water. Thus, a copper layer may be stably etched to improve a reliability of manufacturing the metal pattern and the display substrate. 1. An etching composition , comprising:about 0.1% by weight to about 25% by weight of ammonium persulfate;about 0.1% by weight to about 25% by weight of an organic acid;about 0.01% by weight to about 5% by weight of a chelating agent;about 0.01% by weight to about 5% by weight of a fluoride compound;about 0.01% by weight to about 5% by weight of a chloride compound; andabout 0.01% by weight to about 2% by weight of an azole-based compound.2. The etching composition of claim 1 , wherein the chloride compound comprises at least one selected from the group consisting of hydrochloric acid (HCl) claim 1 , ammonium chloride (NHCl) claim 1 , potassium chloride (KCl) claim 1 , iron (III) chloride (FeCl) claim 1 , sodium chloride (NaCl) claim 1 , ammonium perchlorate (NHClO) claim 1 , potassium perchlorate (KClO) claim 1 , sodium perchlorate (NaClO) claim 1 , and zinc chloride (ZnCl).3. The etching composition of claim 1 , wherein the fluoride compound comprises at least one selected from the group consisting of hydrofluoric acid (HF) claim 1 , sodium fluoride (NaF) claim 1 , sodium bifluoride (NaHF) claim 1 , ammonium fluoride (NHF) claim 1 , ammonium bifluoride (NHHF) claim 1 , ammonium fluoroborate (NHBF) claim 1 , potassium fluoride (KF ...

ETCHING COMPOSITION AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE SAME

An etching composition that includes, based on the total weight of the etching composition, from about 0.05% to about 15% by weight of a halogen-containing compound, from about 0.1% to about 20% by weight of a nitrate compound, from about 0.1% to about 10% by weight of an acetate compound, from about 0.1% to about 10% by weight of a cyclic amine compound, from about 0% to about 50% by weight of a polyhydric alcohol, and a remainder of water. 1. An etching composition comprising , based on the total weight of the etching composition:from about 0.05% to about 15% by weight of a halogen-containing compound;from about 0.1% to about 20% by weight of a nitrate compound;from about 0.1% to about 10% by weight of an acetate compound;from about 0.1% to about 10% by weight of a cyclic amine compound;from about 0% to about 50% by weight of a polyhydric alcohol; anda remainder of water.2. The etching composition of claim 1 , wherein the halogen-containing compound comprises at least one selected from the group consisting of hydrochloric acid (HCl) claim 1 , aluminum chloride (AlCl) claim 1 , ammonium fluoride (NHF) claim 1 , potassium chloride (KCl) claim 1 , potassium iodide (KI) claim 1 , and ammonium chloride (NHCl).3. The etching composition of claim 1 , wherein the nitrate compound comprises at least one selected from the group consisting of ammonium nitrate (NHNO) claim 1 , potassium nitrate (KNO) claim 1 , nitric acid (HNO) claim 1 , copper nitrate (CuNO) claim 1 , and sodium nitrate (NaNO).4. The etching composition of claim 1 , wherein the acetate compound comprises at least one selected from the group consisting of acetic acid (CHCOOH) claim 1 , potassium acetate (CHCOOK) claim 1 , ammonium acetate(CHCOONH) claim 1 , sodium acetate (CHCOOH) claim 1 , magnesium acetate (Mg(CHCOO)) claim 1 , manganese acetate (Mn(CHCOO)) claim 1 , and zinc acetate (Zn(CHCOO)).5. The etching composition of claim 1 , wherein the cyclic amine compound comprises at least one selected from ...

Metal wire etchant and method of forming metal wire using the same

A metal wire etchant including persulfate, a sulfonate, a fluorine compound, an azole-based compound, an organic acid, a nitrate, and a chlorine compound, and a method of making the same.

ETCHANT COMPOSITION AND METHOD OF FORMING METAL WIRE AND THIN FILM TRANSISTOR ARRAY PANEL USING THE SAME

A etchant composition that includes, based on a total weight of the etchant composition, about 0.5 wt % to about 20 wt % of a persulfate, about 0.5 wt % to about 0.9 wt % of an ammonium fluoride, about 1 wt % to about 10 wt % of an inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 10.0 wt % of a sulfonic acid, about 5 wt % to about 10 wt % of an organic acid or a salt thereof, and a remainder of water. The etchant composition may be configured to etch a metal layer including copper and titanium, to form a metal wire that may be included in a thin film transistor array panel of a display device. 1. An etchant composition comprising , based on a total weight of the etchant composition:about 0.5 wt % to about 20 wt % of a persulfate;about 0.5 wt % to about 0.9 wt % of an ammonium fluoride;about 1 wt % to about 10 wt % of an inorganic acid;about 0.5 wt % to about 5 wt % of a cyclic amine compound;about 0.1 wt % to about 10.0 wt % of a sulfonic acid;about 5 wt % to about 10 wt % of an organic acid or a salt of the organic acid; anda remainder of water.2. The etchant composition of claim 1 , wherein the persulfate is at least one selected from the group consisting of potassium persulfate (KSO) claim 1 , sodium persulfate (NaSO) claim 1 , and ammonium persulfate ((NH)SO).3. The etchant composition of claim 1 , wherein the inorganic acid is at least one selected from the group consisting of a nitric acid claim 1 , a sulfuric acid claim 1 , a phosphoric acid claim 1 , and a perchloric acid.4. The etchant composition of claim 1 , wherein the cyclic amine compound is at least one selected from the group consisting of an aminotetrazole claim 1 , an imidazole claim 1 , an indole claim 1 , a purine claim 1 , a pyrazole claim 1 , a pyridine claim 1 , a pyrimidine claim 1 , a pyrrole claim 1 , a pyrrolidine claim 1 , and a pyrroline.5. The etchant composition of claim 1 , wherein the sulfonic acid is a p-toluenesulfonic acid or a ...

ETCHANT COMPOSITION, METAL WIRING, AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE

A wet etching composition usable for etching a copper-based wiring layer includes between about 40% by weight to about 60% by weight of phosphoric acid, between about 1% by weight to about 10% by weight of nitric acid, between about 3% by weight to about 15% by weight of acetic acid, between about 0.01% by weight to about 0.1% by weight of a copper-ion compound, between about 1% by weight to about 10% by weight of a nitric salt, between about 1% by weight to about 10% by weight of an acetic salt, and a remainder of water 1. A combination of patterned metal wire and a substrate having the metal wire formed thereon , the metal wire comprising:an oxide layer including indium and zinc; anda copper-based layer disposed on or under the oxide layer including indium and zinc, wherein a zinc oxide amount of the oxide layer including indium and zinc is equal to or more than 10% by weight and less than about 35% by weight.2. The combination of claim 1 , wherein a thickness of the copper-based layer is between about 1 claim 1 ,000 Å to about 3 μm claim 1 , and a thickness of the oxide layer including indium and zinc is between about 100 Å to about 500 Å.3. The combination of claim 1 , wherein a thickness of the copper-based layer is between about 1 μm to about 3 μm.4. The combination of claim 1 , wherein the oxide layer including indium and zinc is disposed on the copper-based layer.5. The combination of claim 1 , wherein a zinc oxide amount of the oxide layer including indium and zinc is equal to or more than 10% by weight and less than about 35% by weight.6. The combination of claim 1 , wherein the copper-based layer has a substantially trapezoidal cross sectional profile claim 1 , and the base taper angle of the cross sectional profile of the copper-based layer is substantially more than 50°.7. The combination of claim 6 , wherein the base taper angle of the copper-based layer is between about 60° to about 85°.8. The combination of claim 1 , wherein the oxide semiconductor ...

ETCHANT, METHOD OF MANUFACTURING METAL WIRING AND THIN FILM TRANSISTOR SUBSTRATE USING THE ETCHANT

An etchant composition includes about 0.5 weight % to about 20 weight % of persulfate, about 0.01 weight % to about 2 weight % of a fluoride compound, about 1 weight % to about 10 weight % of an inorganic acid, about 0.5 weight % to about 5 weight % of a cyclic amine compound, about 0.1 weight % to about 10.0 weight % of a compound having an amino group and a sulfonic acid, about 0.1 weight % to about 15.0 weight % of an organic acid or a salt thereof, and water to 100 weight % of the etchant composition. 1. An etchant composition comprising:0.5 weight % to 20 weight % of persulfate,0.01 weight % to 2 weight % of a fluoride compound,1 weight % to 10 weight % of an inorganic acid,0.5 weight % to 5 weight % of a cyclic amine compound0.1 weight % to 10.0 weight % of a compound having an amino group and a sulfonic acid,0.1 weight % to 15.0 weight % of an organic acid or a salt thereof, andwater to a total of 100 weight % of the etchant composition;wherein the weight percents are based on a total weight of the etchant composition.2. The etchant composition of claim 1 , wherein the persulfate is at least one of potassium persulfate (KSO) claim 1 , sodium persulfate (NaSO) claim 1 , and ammonium persulfate ((NH)SO).3. The etchant composition of claim 1 , wherein the fluoride compound is at least one of ammonium fluoride claim 1 , sodium fluoride claim 1 , potassium fluoride claim 1 , ammonium bifluoride claim 1 , sodium bifluoride claim 1 , and potassium bifluoride.4. The etchant composition of claim 1 , wherein the inorganic acid is at least one of nitric acid claim 1 , sulphuric acid claim 1 , phosphoric acid claim 1 , and perchloric acid.5. The etchant composition of claim 1 , wherein the cyclic amine compound is at least one of aminotetrazole claim 1 , imidazole claim 1 , indole claim 1 , purine claim 1 , pyrazole claim 1 , pyridine claim 1 , pyrimidine claim 1 , pyrrole claim 1 , pyrrolidine claim 1 , and pyrroline.7. The etchant composition of claim 6 , wherein the ...

LIQUID CRYSTAL DISPLAY

A liquid crystal display includes: a substrate; a gate line and a data line disposed on the substrate; a semiconductor layer disposed on the substrate; first and second field generating electrodes disposed on the substrate; and a first protecting layer formed from the same layer as the first field generating electrode and covering at least a portion of the data line. 1. A liquid crystal display comprising:a substrate;a gate line and a data line disposed on the substrate;a semiconductor layer disposed on the substrate;first and second field generating electrodes disposed on the substrate; anda first protecting layer formed from the same layer as the first field generating electrode and covering at least a portion of the data line.2. The liquid crystal display of claim 1 , wherein the semiconductor layer comprises an oxide semiconductor.3. The liquid crystal display of claim 2 , wherein the first protecting layer comprises a transparent insulating layer having an indium oxide content that ranges from about 10 wt % to about 50 wt % claim 2 , based on the total weight of the transparent insulating layer.4. The liquid crystal display of claim 2 , further comprising an insulating layer covering the semiconductor layer and comprising silicon oxide.5. The liquid crystal display of claim 4 , further comprising:a source electrode overlapping the semiconductor layer and connected to the data line; anda drain electrode overlapping the semiconductor layer and facing the source electrode,wherein the first protecting layer comprises a first portion covering the source electrode and a second portion covering the drain electrode.6. The liquid crystal display of claim 5 , wherein the minimum distance between the source electrode and the drain electrode is larger than the minimum distance between the first and second portions of the first protecting layer.7. The liquid crystal display of claim 2 , wherein the data line comprises a low-resistance metal selected from Cu claim 2 , Al ...

THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF

A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. 1. A thin film transistor array panel comprising:a gate line;a gate insulating layer that covers the gate line;a semiconductor layer that is disposed on the gate insulating layer;a data line and drain electrode that are disposed on the semiconductor layer;a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode; anda pixel electrode that is electrically connected to the drain electrode through the contact hole,wherein the data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, andthe lower layer is wider than the upper layer, and the lower layer has a region that is exposed.2. The thin film transistor array panel of claim 1 , wherein a width of the exposed region of the lower layer is about 15% to about 70% of that of the entire lower layer.3. The thin film transistor array panel of claim 1 , wherein the gate insulating layer has a first portion that has a first thickness and a second portion that has a second thickness that is smaller than the first portion.4. The thin film transistor array panel of claim 3 , wherein a difference between the first thickness and ...

Etchant composition and methods of fabricating metal wiring and thin film transistor substrate using the same

An etchant composition including 0.5 wt % to 20 wt % of a persulfate, 0.01 wt % to 1 wt % of a fluorine compound, 1 wt % to 10 wt % of an inorganic acid, 0.01 wt % to 2 wt % of an azole-based compound, 0.1 wt % to 5 wt % of a chlorine compound, 0.05 wt % to 3 wt % of a copper salt, 0.01 wt % to 5 wt % of an antioxidant or a salt thereof, based on a total weight of the etchant composition, and water in an amount sufficient for the total weight of the etchant composition to be equal to 100 wt % is disclosed. The etchant composition is suitable for use in forming a metal wiring by etching a metal layer including copper or in fabricating a thin film transistor substrate for a display apparatus.

THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME

A thin film transistor substrate includes a gate electrode disposed on a substrate; a semiconductor layer partially overlapping the gate electrode, the semiconductor layer including an oxide semiconductor material; a source electrode and a drain electrode disposed on the semiconductor layer, the source electrode and the drain electrode including a barrier layer, a main wiring layer disposed on the barrier layer, and a first capping layer disposed on the main wiring layer and being spaced apart from each other; and second capping layers covering lateral surfaces of the main wiring layers of the source and drain electrodes. 1. A thin film transistor substrate , comprising:a gate electrode disposed on a substrate;a semiconductor layer partially overlapping the gate electrode, the semiconductor layer comprising an oxide semiconductor material;a source electrode and a drain electrode disposed on the semiconductor layer, the source electrode and the drain electrode comprising a barrier layer, a main wiring layer disposed on the barrier layer, and a first capping layer disposed on the main wiring layer and being spaced apart from each other; andsecond capping layers covering lateral surfaces of the main wiring layers of the source and drain electrodes.2. The thin film transistor substrate of claim 1 , wherein the second capping layers comprise at least one of nickel-phosphorus claim 1 , nickel-boron claim 1 , gold-nickel claim 1 , tin-lead claim 1 , tin claim 1 , and silver.3. The thin film transistor substrate of claim 2 , wherein the second capping layers comprise nickel-phosphorus comprising 8 wt % to 15 wt % of phosphorus.4. The thin film transistor substrate of claim 3 , wherein thicknesses of the second capping layers are 0.1 μm to 1.5 μm.5. The thin film transistor substrate of claim 4 , wherein the barrier layers and the first capping layers comprise a transparent conductive oxide.6. The thin film transistor substrate of claim 5 , wherein the barrier layers and the ...

Method for manufacturing mask and deposition apparatus including mask

A deposition apparatus includes a chamber, a deposition source disposed in the chamber, a mask assembly, and a base substrate disposed on the mask assembly. The mask assembly includes a frame including frame openings, a mask disposed on the frame and including deposition holes, and a welding stick disposed on the mask. A welding groove is disposed along an edge of the frame and has a depth in the thickness direction of the frame. The welding stick overlaps the welding groove.

Cleaning solution and method for manufacturing display device using the same

A cleaning solution and a method for manufacturing a display device, the cleaning solution including about 2 wt % to about 12 wt % of nitric acid; about 0.5 wt % to about 15 wt % of an organic acid; about 0.1 wt % to about 10 wt % of a salt compound; about 0.01 wt % to about 3 wt % of an inorganic salt that includes fluorine; and a balance of water, all amounts being based on a total weight of the cleaning solution.

ETCHANT AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME

An etchant includes, based on a total amount of the etchant, from about 0.5 to about 20 wt % of a persulfate, from about 0.01 to about 2 wt % of a fluorine compound, from about 1 to about 10 wt % of an inorganic acid, from about 0.5 to about 5 wt % of an azole compound, from about 0.1 to about 5 wt % of an electron-donating compound, from about 0.1 to about 5 wt % of a chlorine compound, from about 0.05 to about 3 wt % of a copper salt, from about 0.1 to about 10 wt % of an organic acid or an organic acid salt, and a remaining amount of water. 1. An etchant , comprising , based on a total amount of the etchant:from about 0.5 to about 20 wt % of a persulfate;from about 0.01 to about 2 wt % of a fluorine compound;from about 1 to about 10 wt % of an inorganic acid;from about 0.5 to about 5 wt % of an azole compound;from about 0.1 to about 5 wt % of an electron-donating compound;from about 0.1 to about 5 wt % of a chlorine compound;from about 0.05 to about 3 wt % of a copper salt;from about 0.1 to about 10 wt % of an organic acid or an organic acid salt; anda remaining amount of water.2. The etchant as claimed in claim 1 , wherein the electron-donating compound is a cyclic organic acid or a cyclic organic acid salt.3. The etchant as claimed in claim 2 , wherein;the cyclic organic acid includes at least one selected from the group of abietic acid, metanilic acid, riboflavin, folic acid, gallic acid and ascorbic acid,and the cyclic organic acid salt includes at least one selected from the group of a potassium salt, a sodium salt, and an ammonium salt of the cyclic organic acid.4. The etchant as claimed in claim 3 , wherein the cyclic organic acid salt includes at least one selected from the group of potassium L-ascorbate claim 3 , calcium L-ascorbate claim 3 , and sodium L-ascorbate.5. The etchant as claimed in claim 1 , wherein the persulfate includes at least one selected from the group of potassium persulfate claim 1 , sodium persulfate claim 1 , and ammonium ...

COMPOSITION FOR CLEANING FLAT PANEL DISPLAY AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME

The disclosure provides a cleaning agent composition for a flat panel display device, including: polyaminocarboxylic acid; alkali base; a nonionic surfactant; and a fluoride component. The cleaning agent composition for the flat panel display device can effectively remove metal oxides and organic contaminants on the substrate without impairing a transparent conductive layer. 1. A cleaning agent composition for a flat panel display device , comprising:a polyaminocarboxylic acid;a base;a nonionic surfactant;fluoride component; andwater.2. The composition of claim 1 , wherein:the polyaminocarboxylic acid is one or more selected from ethylenediaminetetraacetic acid, diethylenetriaminepentaacetic acid, ethylene glycoltetraacetic acid, hydroxyethylethylenediaminetriacetic acid, ethylenediamine-N,N′-bis(2-hydroxyphenylacetic acid), 1,2-bis(aminophenoxy) ethanetetraacetic acid, 1,4,7,10-tetraazacyclodecane-1,4,7,10-tetraacetic acid, 1,4,8,11-tetraazacyclotetradecane-N,N,N,N-tetraacetic acid, and 1,4,7-triazacyclononane-N,N,N-triacetic acid.3. The composition of claim 2 , wherein:the amount of the polyaminocarboxylic acid is 0.1 to 20 wt % with respect to the total weight of the cleaning agent composition.4. The composition of claim 1 , wherein:the base is one or more selected from monoethanolamine, diethanolamine, triethanolamine, amino ethoxy ethanol, tetramethyl ammonium hydroxide, tetraethyl ammonium hydroxide, potassium hydroxide, and sodium hydroxide.5. The alkali of claim 4 , wherein:the amount of the base is 0.1 to 10 wt % with regard to the total weight of the cleaning agent composition.6. The composition of claim 1 , wherein:the nonionic surfactant is one or more selected from aromatic or aliphatic oxyethylene-oxypropylene, an oxyethylene-oxypropylene copolymer, and alkyl polyglucoside with an alkyl radical comprising 1 to 4 carbon atoms.7. The composition of claim 6 , wherein:the amount of the nonionic surfactant is 0.001 to 20 wt % with regard to the total weight ...

SUBSTRATE, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE DISPLAY DEVICE

There is provided a display device. The display device includes a first substrate, a second substrate that faces the first substrate, and a liquid crystal layer disposed between the first substrate and the second substrate. One of the first substrate and the second substrate includes a base substrate and a light blocking pattern disposed on a surface that faces the other surface of both surfaces of the base substrate, the light blocking pattern exposing a part of the base substrate. The light blocking pattern includes a semi-transmission reflective layer a disposed on the base substrate, a phase matching layer disposed on the semi-transmission reflective layer, and a reflective metal layer disposed on the phase matching layer. The phase matching layer and the reflective metal layer include materials having substantially the same etching rate. 1. A substrate comprising:a base substrate; anda light blocking pattern provided on the base substrate, the light blocking pattern exposing a part of the base substrate,wherein the light blocking pattern comprises:a semi-transmission reflective layer disposed on the base substrate;a phase matching layer disposed on the semi-transmission reflective layer; anda reflective metal layer disposed on the phase matching layer, andwherein the phase matching layer and the reflective metal layer have substantially the same etching rate.2. The substrate of claim 1 , further comprising a transmission protective layer disposed on the reflective metal layer.3. The substrate of claim 2 , wherein an etching rate of a material of the transmission protective layer is substantially the same as etching rates of materials of the phase matching layer and the reflective metal layer.4. The substrate of claim 1 , further comprising a color filter disposed on the base substrate exposed by the light blocking pattern claim 1 ,wherein the color filter comprises a quantum dot material.5. The substrate of claim 4 , further comprising a first selective ...

ARRAY SUBSTRATE FOR DISPLAY DEVICES

An array substrate for display devices is provided. According to an exemplary embodiment, the array substrate for display device includes: a plurality of gate lines that extend along a first direction; and a data line that is formed by connecting a plurality of first sub-data lines extending along a second direction and a plurality of second sub-data lines extending along a third direction, wherein the gate lines overlap the second sub-data lines with an insulating layer interposed therebetween. 1. An array substrate for display devices , the array substrate comprising:a plurality of gate lines that extend along a first direction; anda data line that is formed by connecting a plurality of first sub-data lines extending along a second direction and a plurality of second sub-data lines extending along a third direction,wherein the gate lines overlap the second sub-data lines with an insulating layer interposed therebetween.2. The array substrate of claim 1 , wherein the data line further comprises a plurality of third sub-data lines extending along a fourth direction claim 1 , wherein the gate lines overlap the second sub-data lines or the third sub-data lines.3. The array substrate of claim 2 , wherein an included angle formed between the second direction and the third direction is equal to an included angle formed between the second direction and the fourth direction.4. The array substrate of claim 1 , wherein a width of each of the second sub-data lines is equal to a width of each of the first sub-data lines.5. The array substrate of claim 1 , wherein the first direction and the second direction are perpendicular to each other claim 1 , and the third direction is oblique to the first direction and the second direction.6. The array substrate of claim 5 , wherein each of the gate lines comprises a plurality of first sub-gate lines extending along the first direction and a plurality of second sub-gate lines extending along a fifth direction claim 5 , and wherein the ...

PHOTORESIST STRIPPING APPARATUS, AND METHODS OF STRIPPING PHOTORESIST AND FORMING THIN FILM PATTERN USING THE SAME

A method of forming a thin film pattern includes providing a thin film on a substrate, providing a photoresist on the thin film, forming a first photoresist pattern having a first packing density by exposing and developing the photoresist, etching the thin film by using the first photoresist pattern as a mask, processing the first photoresist pattern to convert the first photoresist pattern into a second photoresist pattern having a second packing density, which is lower than the first packing density, and stripping the second photoresist pattern by spraying steam onto the second photoresist pattern. 1. A method of forming a thin film pattern , the method comprising:providing a thin film on a substrate:providing a photoresist on the thin film;forming a first photoresist pattern having a first packing density by exposing and developing the photoresist;etching the thin film by using the first photoresist pattern as a mask;processing the first photoresist pattern to convert the first photoresist pattern into a second photoresist pattern having a second packing density, which is lower than the first packing density; andstripping the second photoresist pattern by spraying steam onto the second photoresist pattern.2. The method of forming the thin film pattern according to claim 1 , wherein the processing the first photoresist pattern comprises forming microcavities in the first photoresist pattern.3. The method of forming the thin film pattern according to claim 2 , wherein the stripping the second photoresist pattern by spraying the steam onto the second photoresist pattern comprises:providing moisture particles of the steam into the microcavities in the second photoresist in a way such that the second photoresist pattern is swollen by the moisture particles; andstripping the second photoresist pattern from the substrate by making a gap therebetween or by detaching the second photoresist pattern from the substrate.4. The method of forming the thin film pattern according ...

TOUCH SCREEN PANEL AND MANUFACTURING METHOD THEREOF

A touch screen panel and manufacturing method thereof are disclosed. In one aspect, the touch screen panel includes a substrate having a touch area and a peripheral area that surrounds the touch area and a plurality of first touch electrode patterns that are formed in the touch area, extend in a first direction, and are configured to transmit a first touch signal. The touch panel also includes a plurality of second touch electrode patterns that are formed in the touch area, extend in a second direction crossing the first direction, and are configured to transmit a second touch signal and a plurality of first driving circuit wirings that are formed in the peripheral area and are respectively electrically connected to the first touch electrode patterns. The first driving circuit wirings include a low resistance wiring layer. 1. A touch screen panel , comprising:a substrate having a touch area and a peripheral area that surrounds the touch area;a plurality of first touch electrode patterns that are formed in the touch area, extend in a first direction, and are configured to transmit a first touch signal;a plurality of second touch electrode patterns that are formed in the touch area, extend in a second direction crossing the first direction, and are configured to transmit a second touch signal; anda plurality of first driving circuit wirings that are formed in the peripheral area and are respectively electrically connected to the first touch electrode patterns,wherein the first driving circuit wirings include a low resistance wiring layer.2. The panel of claim 1 , wherein the second touch electrode patterns are spaced apart from each other and wherein the panel further comprises a plurality of connecting lines electrically connecting the second touch electrode patterns that are adjacent in the second direction.3. The panel of claim 2 , further comprising a plurality of touch insulating members that are respectively formed between the first touch electrode patterns and ...

Method of fabricating conductive pattern, display device, and method of fabricating display device

A method of fabricating a conductive pattern includes forming a conductive metal material layer and a conductive capping material layer on a substrate, forming a photoresist pattern as an etching mask on the conductive capping material layer, forming a first conductive capping pattern by etching the conductive capping material layer with a first etchant, forming a conductive metal layer and a second conductive capping pattern by etching the conductive metal material layer and the first conductive capping pattern with a second etchant, and forming a conductive capping layer by etching the second conductive capping pattern with a third etchant. The second conductive capping pattern includes a first region overlapping the conductive metal layer and a second region not overlapping the conductive metal layer, and the forming of the conductive capping layer includes etching the second region of the second conductive capping pattern to form the conductive capping layer.

Thin film transistor array substrate and manufacturing method of the same

A thin film transistor array substrate includes a first conductive pattern group including a gate line extending along a first direction, data lines extending along a second direction crossing the first direction and spaced apart from each other along the second direction with the gate line there between, and a gate electrode protruding from the gate line, an active pattern disposed on the gate electrode to overlap the gate electrode, a second conductive pattern group including a bridge pattern coupling the data lines, a source electrode extending to an upper portion of the active pattern from the bridge pattern and a drain electrode spaced apart from the source electrode, facing the source electrode and disposed on the active pattern and metal patterns each stacked between the active pattern and the source electrode and between the active pattern and the drain electrode.

ETCHANT COMPOSITION AND METHOD OF FORMING METAL WIRE AND THIN FILM TRANSISTOR ARRAY PANEL USING THE SAME

A etchant composition that includes, based on a total weight of the etchant composition, about 0.5 wt % to about 20 wt % of a persulfate, about 0.5 wt % to about 0.9 wt % of an ammonium fluoride, about 1 wt % to about 10 wt % of an inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 10.0 wt % of a sulfonic acid, about 5 wt % to about 10 wt % of an organic acid or a salt thereof, and a remainder of water. The etchant composition may be configured to etch a metal layer including copper and titanium, to form a metal wire that may be included in a thin film transistor array panel of a display device. 1. A method of manufacturing a metal wire , comprising:laminating a copper layer and a titanium layer to form a metal layer;etching the metal layer using a photosensitive film pattern as a mask; andremoving the photosensitive film pattern from the etched metal layer,wherein the metal layer is etched using an etchant composition comprising, based on the total weight of the etchant composition, about 0.5 wt % to about 20 wt % of a persulfate, about 0.5 wt % to about 0.9 wt % of an ammonium fluoride, about 1 wt % to about 10 wt % of an inorganic acid, about 0.5 wt % to about 5 wt % of a cyclic amine compound, about 0.1 wt % to about 10.0 wt % of a sulfonic acid, about 5 wt % to about 10 wt % of an organic acid or a salt thereof, and a remainder of water.2. The method of claim 1 , wherein the titanium layer is disposed on a substrate and the copper layer is disposed on the titanium layer.3. The method of claim 2 , wherein the persulfate is at least one selected from the group consisting of potassium persulfate (KSO) claim 2 , sodium persulfate (NaSO) claim 2 , and ammonium persulfate ((NH)SO).4. The method of claim 2 , wherein the inorganic acid is at least one selected from the group consisting of a nitric acid claim 2 , a sulfuric acid claim 2 , a phosphoric acid claim 2 , and a perchloric acid.5. The method of claim 2 , wherein ...

Thin film transistor array substrate and method of manufacturing the same

A transistor array substrate includes a substrate (having a first trench), a gate electrode (in the first trench), an insulating film, a gate line, a data line, a source electrode, and a drain electrode. The insulating film includes second, third, fourth, fifth, and sixth trenches. The gate line is in the second trench and is not parallel to the data line. The data line includes a first section and a second section that are separated by the gate line and respectively in the third and fourth trenches. The source electrode and the drain electrode are respectively in the fifth and sixth trenches. The source electrode is electrically connected to the data line. The gate electrode is electrically connected to the gate line.

MANUFACTURING METHOD OF DISPLAY DEVICE

A method of manufacturing a display device in a chamber in which a material including yttrium is coated on an inner surface includes: forming a first layer pattern by dry etching on a substrate; depositing a second layer material on the first layer pattern; forming a photoresist pattern on the second layer material; completing a second layer pattern by using the photoresist pattern as an etch mask; and performing an additional acid etching process by using an etching solution including at least one of hydrochloric acid, sulfuric acid, or nitric acid before the forming of the photoresist pattern on the second layer material after the dry etching to form the first layer pattern. 1. A method of manufacturing a display device in a chamber in which a material including yttrium is coated on an inner surface , comprising:forming a first layer pattern by dry etching on a substrate;depositing a second layer material on the first layer pattern;forming a photoresist pattern on the second layer material;completing a second layer pattern by using the photoresist pattern as an etch mask; andperforming an additional acid etching process by using an etching solution including at least one of hydrochloric acid, sulfuric acid, or nitric acid before the forming of the photoresist pattern on the second layer material after the dry etching to form the first layer pattern.2. The manufacturing method of claim 1 , whereinthe forming of the photoresist pattern on the second layer material includes depositing a photoresist material and completing the photoresist pattern by exposing the photoresist material.3. The manufacturing method of claim 2 , whereinthe additional acid etching process is performed prior to the completing of the photoresist pattern by the exposing of the photoresist material.4. The manufacturing method of claim 3 , whereinthe additional acid etching process is performed between the depositing of the photoresist material and the completing of the photoresist pattern by the ...

ETCHANT AND METHOD OF MANUFACTURING DISPLAY DEVICE BY USING THE SAME

An etchant composition is provided comprising a persulfate from 0.5 to 20 wt %; a fluoride compound from 0.01 to 2 wt %; an inorganic acid from 1 to 10 wt %; a N (nitrogen atom)-containing heterocyclic compound from 0.5 to 5 wt %; a chloride compound from 0.1 to 5 wt %; a copper salt from 0.05 to 3 wt %; an organic acid or an organic acid salt from 0.1 to 10 wt %; an electron-donating compound from at 0.1 to 5 wt %; and a solvent of the residual amount. Also provided is a method of manufacturing a display device by using the same. 1. An etchant comprising a persulfate from about 0.5 wt % to about 20 wt %;a fluoride compound from about 0.01 wt % to about 2 wt %;an inorganic acid from about 1 wt % to about 10 wt %;a N (nitrogen atom)-containing heterocyclic compound from about 0.5 wt % to about 5 wt %;a chloride compound from about 0.1 wt % to about 5 wt %;a copper salt from about 0.05 wt % to about 3 wt %;an organic acid or an organic acid salt from about 0.1 wt % to about 10 wt %;an electron-donating compound from about 0.1 wt % to about 5 wt %; anda residual amount of solvent.2. The etchant of claim 1 , wherein the persulfate comprises at least one selected from the group consisting of potassium persulfate claim 1 , sodium persulfate claim 1 , and ammonium persulfate.3. The etchant of claim 1 , wherein the fluoride compound comprises at least one selected from the group consisting of ammonium fluoride claim 1 , sodium fluoride claim 1 , potassium fluoride claim 1 , ammonium bifluoride claim 1 , sodium bifluoride claim 1 , and potassium bifluoride.4. The etchant of claim 1 , wherein the inorganic acid comprises at least one selected from the group consisting of nitric acid claim 1 , sulfuric acid claim 1 , phosphoric acid claim 1 , and perchloric acid.5. The etchant of claim 1 , wherein the N-containing heterocyclic compound comprises at least one selected from the group consisting of 5-aminotetrazole claim 1 , 3-amino-1 claim 1 ,2 claim 1 ,4-triazole claim 1 , 4H-1 ...

Etchant for metal

An etchant for a metal is described. In one example, the etchant includes ammonium persulfate ((NH 4 ) 2 S 2 O 8 ), an azole compound and water. The etchant does not include hydrogen peroxide. Thus, the etchant may etch a metal layer including copper so that an etched copper layer has a tapered profile. Furthermore, the etchant may have a high stability to maintain etching ability for a longer time. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.

Wiring substrate and display device including the same

A display device includes conductive layers including wires and conductive patterns in a display area and a pad area, a via layer on the conductive layers, a first electrode and a second electrode on the via layer in the display area and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, light emitting elements on the first electrode and the second electrode spaced apart from each other on the first insulating layer, and a first connection electrode on the first electrode and electrically contacting the light emitting elements, and a second connection electrode on the second electrode and electrically contacting the light emitting elements, each of the conductive layers includes a first metal layer and a second metal layer on the first metal layer, and the second metal layer contains copper and has a grain size of about 155 nm or less.

Etchant composition, and method of fabricating metal pattern and thin film transistor array panel using the same

An etchant composition is provided. The etchant composition includes about 40 to about 65 wt % of phosphoric acid, about 2 to about 5 wt % of nitric acid, about 2 to about 20 wt % of acetic acid, about 0.1 to about 2 wt % of a compound containing phosphate, about 0.1 to about 2 wt % of a compound simultaneously containing an amino group and a carboxyl group, and a remaining weight percent of water for the total weight of the composition.

Wiring substrate and display device including the same

A display device includes conductive layers including wires and conductive patterns in a display area and a pad area, a via layer on the conductive layers, a first electrode and a second electrode on the via layer in the display area and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, light emitting elements on the first electrode and the second electrode spaced apart from each other on the first insulating layer, and a first connection electrode on the first electrode and electrically contacting the light emitting elements, and a second connection electrode on the second electrode and electrically contacting the light emitting elements, each of the conductive layers includes a first metal layer and a second metal layer on the first metal layer, and the second metal layer contains copper and has a grain size of about 155 nm or less.

Method of manufacturing a thin film transistor substrate and stripping composition

A method of manufacturing a thin film transistor substrate includes forming a transistor thin layer pattern, forming a protecting layer, forming a photoresist film, forming a pixel electrode and a conductive layer that are separated from each other, stripping a photoresist pattern to remove the conductive layer using a stripping composition and dissolving the conductive layer. The method of manufacturing a thin film transistor substrate is capable of improving an efficiency of manufacturing process of the thin film transistor substrate. In addition, the stripping composition is recycled.

Signal line for a display device, etchant, thin film transistor panel, and method for manufacturing the same

A thin film panel includes a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line, including a source electrode, and a drain electrode formed on the gate insulating layer or the semiconductor layer, and a pixel electrode connected to the drain electrode, wherein at least one of the gate line and the data line and drain electrode includes a first conductive layer made of a molybdenum Mo-niobium Nb alloy and a second conductive layer made of a copper Cu-containing metal.

Etchant, method for fabricating interconnection line using the etchant, and method for fabricating thin film transistor substrate using the etchant

Composition for stripping and stripping method

The present invention provides a stripping composition and a stripping method capable of easily stripping a color resist or an organic insulating film formed on a substrate to reuse the substrate when defects are found during a process of forming the color filter or organic insulating film on the substrate. In one embodiment, the stripping composition includes about 0.5 to about 45 wt % of hydroxide compound, about 10 to about 89 wt % of alkyleneglycolalkylether compound, about 5 to about 45 wt % of alkanolamine compound, and about 0.01 to about 5 wt % of inorganic salt compound. Advantageously, the stripping process can be performed without damaging a thin film transistor of a bottom substrate while removing the color resist or organic insulating film.

Display substrate and method of manufacturing the same

Thin film transistor panel and method of manufacture

Etchant and method for fabricating a thin film transistor substrate including conductive wires using the etchant and the resulting structure

Provided are an etchant, a method for fabricating a wire using the etchant, and a method for fabricating a thin film transistor (TFT) substrate using the etchant. The etchant includes a material having the formula 1, ammonium acetic acid, and the remainder of deionized water, wherein the formula 1 is expressed by: M(OH) X L Y   (1) where M indicates Zn, Sn, Cr, Al, Ba, Fe, Ti, Si, or B, X indicates 2 or 3, L indicates H 2 O, NH 3 , CN, COR, or NH 2 R, Y indicates 0, 1, 2, or 3, and R indicates an alkyl group.

Composition for stripping and stripping method

The present invention provides a stripping composition and a stripping method capable of easily stripping a color resist or an organic insulating film formed on a substrate to reuse the substrate when defects are found during a process of forming the color filter or organic insulating film on the substrate. In one embodiment, the stripping composition includes about 0.5 to about 45 wt % of hydroxide compound, about 10 to about 89 wt % of alkyleneglycolalkylether compound, about 5 to about 45 wt % of alkanolamine compound, and about 0.01 to about 5 wt % of inorganic salt compound. Advantageously, the stripping process can be performed without damaging a thin film transistor of a bottom substrate while removing the color resist or organic insulating film.

Etchant and method for fabricating liquid crystal display using the same

Provided are an etchant used for a transparent conductive oxide layer and a method for fabricating a liquid crystal display (LCD) using the etchant. The etchant includes 2-5 wt % sulfuric acid, 0.02-10 wt % hydrogen sulfate of alkali metal, and deionized water as the remainder.

Manufacturing method of display device

A method of manufacturing a display device in a chamber in which a material including yttrium is coated on an inner surface includes: forming a first layer pattern by dry etching on a substrate; depositing a second layer material on the first layer pattern; forming a photoresist pattern on the second layer material; completing a second layer pattern by using the photoresist pattern as an etch mask; and performing an additional acid etching process by using an etching solution including at least one of hydrochloric acid, sulfuric acid, or nitric acid before the forming of the photoresist pattern on the second layer material after the dry etching to form the first layer pattern.

Etching composition, method of forming a metal pattern using the etching composition, and method of manufacturing a display substrate

An etching composition, a method of forming a metal pattern using the etching composition, and a method of manufacturing a display substrate are disclosed. The etching composition includes about 0.1% by weight to about 25% by weight of ammonium persulfate, about 0.1% by weight to about 25% by weight of an organic acid, about 0.01% by weight to about 5% by weight of a chelating agent, about 0.01% by weight to about 5% by weight of a fluoride compound, about 0.01% by weight to about 5% by weight of a chloride compound, about 0.01% by weight to about 2% by weight of an azole-based compound and a remainder of water. Thus, a copper layer may be stably etched to improve a reliability of manufacturing the metal pattern and the display substrate.

Thin film transistor panel and method of manufacture

A thin film transistor array panel includes a pixel electrode formed on a substrate, a gate line formed on the pixel electrode, a gate insulating film formed on the gate line, a semiconductor formed on the gate insulating film, a data line and a drain electrode formed on the gate insulating film, and a passivation layer formed on portions of the data line and the drain electrode. The gate line includes a first film formed on the same layer and with the same material as the pixel electrode and a second film formed on the first film.

Manufacturing method of mold and method for forming liquid crystal display using the same

The present invention relates to a liquid crystal display (LDC) and in particular, a method of manufacturing a mold to be used in LCDs. The method includes the following steps: forming a first photosensitive film on a substrate; etching the substrate by using the first photosensitive film as a mask to form a first groove; removing the first photosensitive film; forming a second photosensitive film covering the first groove on the substrate; and etching the substrate by using the second photosensitive film as a mask to form a second groove. The method, according to embodiments of the invention, helps reduce the time and/or cost of manufacturing a liquid crystal display.

Thin film transistor substrate and the method thereof

A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

Method of manufacturing a thin film transistor substrate and stripping composition

A method of manufacturing a thin film transistor substrate includes forming a transistor thin layer pattern, forming a protecting layer, forming a photoresist film, forming a pixel electrode and a conductive layer that are separated from each other, stripping a photoresist pattern to remove the conductive layer using a stripping composition and dissolving the conductive layer. The method of manufacturing a thin film transistor substrate is capable of improving an efficiency of manufacturing process of the thin film transistor substrate. In addition, the stripping composition is recycled.

Thin film transistor substrate and method of producing the same

A thin film transistor substrate that has reduced production cost and defect rate is presented. The thin film transistor substrate includes a gate wiring line formed on an insulating substrate and including a gate electrode, a data wiring line formed on the gate wiring line and including a source electrode and a drain electrode, a passivation layer pattern formed on parts of the data wiring line other than the drain electrode and a pixel region, and a pixel electrode electrically connected to the drain electrode. The pixel electrode includes zinc oxide.

Display device

A display device includes a data conductive layer disposed on a substrate, a passivation layer disposed on the data conductive layer, a via layer disposed on the passivation layer, and a pixel electrode disposed on the via layer. The data conductive layer includes a data base layer, a data main metal layer disposed on the data base layer, a first data capping layer disposed on the data main metal layer, a second data capping layer disposed on the first data capping layer, and a third data capping layer disposed on the second data capping layer. The passivation layer and the via layer include a pad opening which exposes a portion of the data conductive layer in the pad area. The third data capping layer has a higher etch rate than the first and second data capping layers for a same etchant.

Thin film transistor array substrate minimizing unwanted reflection of external light and method of manufacturing the same

A transistor array substrate includes a substrate (having a first trench), a gate electrode (in the first trench), an insulating film, a gate line, a data line, a source electrode, and a drain electrode. The insulating film includes second, third, fourth, fifth, and sixth trenches. The gate line is in the second trench and is not parallel to the data line. The data line includes a first section and a second section that are separated by the gate line and respectively in the third and fourth trenches. The source electrode and the drain electrode are respectively in the fifth and sixth trenches. The source electrode is electrically connected to the data line. The gate electrode is electrically connected to the gate line.

Wiring substrate and display device including the same

A display device includes a display area and a pad area on a side of the display area, a plurality of conductive layers on a first substrate in the display area and the pad area and comprising a wiring and a conductive pattern, a via layer on the plurality of conductive layers, a plurality of electrodes on the via layer in the display area and spaced apart from each other, and a light emitting element on at least one of the plurality of electrodes. At least one of the conductive layers includes a first metal layer, a second metal layer on the first metal layer, and a third metal layer on the second metal layer. The second metal layer includes copper (Cu), the third metal layer includes a copper alloy, and a grain size of the third metal layer is smaller than a grain size of the second metal layer.

Wiring substrate and display device including the same

A display device includes a display area and a pad area on a side of the display area, a plurality of conductive layers on a first substrate in the display area and the pad area and comprising a wiring and a conductive pattern, a via layer on the plurality of conductive layers, a plurality of electrodes on the via layer in the display area and spaced apart from each other, and a light emitting element on at least one of the plurality of electrodes. At least one of the conductive layers includes a first metal layer, a second metal layer on the first metal layer, and a third metal layer on the second metal layer. The second metal layer includes copper (Cu), the third metal layer includes a copper alloy, and a grain size of the third metal layer is smaller than a grain size of the second metal layer.

Method for manufacturing mask and deposition apparatus including mask

A deposition apparatus (EA) includes a chamber (CH), a deposition source (ES) disposed in the chamber, a mask assembly (MSA), and a base substrate (BS) disposed on the mask assembly. The mask assembly (MSA) includes a frame (SP) including frame openings (SP-OP), a mask (MS) disposed on the frame (SP) and including deposition holes (MS-OP), and a welding stick (WB) disposed on the mask (MS). A welding groove (SP-H) is disposed along an edge of the frame (SP) and has a depth in the thickness direction of the frame. The welding stick (WB) overlaps the welding groove (SP-H).

Method for manufacturing mask and deposition apparatus including mask

A deposition apparatus (EA) includes a chamber (CH), a deposition source (ES) disposed in the chamber, a mask assembly (MSA), and a base substrate (BS) disposed on the mask assembly. The mask assembly (MSA) includes a frame (SP) including frame openings (SP-OP), a mask (MS) disposed on the frame (SP) and including deposition holes (MS-OP), and a welding stick (WB) disposed on the mask (MS). A welding groove (SP-H) is disposed along an edge of the frame (SP) and has a depth in the thickness direction of the frame. The welding stick (WB) overlaps the welding groove (SP-H).

Display device

A display device includes a data conductive layer disposed on a substrate, a passivation layer disposed on the data conductive layer, a via layer disposed on the passivation layer, and a pixel electrode disposed on the via layer. The data conductive layer includes a data base layer, a data main metal layer disposed on the data base layer, a first data capping layer disposed on the data main metal layer, a second data capping layer disposed on the first data capping layer, and a third data capping layer disposed on the second data capping layer. The passivation layer and the via layer include a pad opening which exposes a portion of the data conductive layer in the pad area. The third data capping layer has a higher etch rate than the first and second data capping layers for a same etchant.

Method of manufacturing thin film transistor substrate

A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask.

Array substrate for a display panel, method of manufacturing the same, display panel having the same and liquid crystal display device having the same

Photoresist stripping apparatus, method of recycling photoresist stripper, and method of manufacturing thin film transistor array panel using the photoresist stripping apparatus

Provided is a photoresist (PR) stripping apparatus that enables the recycling of a photoresist stripper and utilizes a continuous filtering action during a filter operation. The PR-stripping apparatus includes a PR stripping tank for receiving a substrate having a PR pattern is disposed and for stripping of the PR pattern, a PR stripper recovery pipe for recovering a PR stripper from the PR stripping tank two or more filter units for filtering the PR stripper returned by the PR striper recovery pipe, and a PR stripper supply pipe for supplying the filtered PR stripper to the PR stripping tank. The two or more filter units are connected in parallel to each other between the PR stripper recovery pipe and the PR stripper supply pipe.

表示パネル用アレイ基板、その製造方法、これを有する表示パネル、及びこれを有する液晶表示装置

【課題】表示パネル用アレイ基板、その製造方法、これを有する表示パネル、及びこれを有する液晶表示装置が開示される。 【解決手段】表示パネル用アレイ基板は、ベース基板、信号印加モジュール、第１電極、第２電極、及び保護層を含む。信号印加モジュールはベース基板上に配置され、データ信号を出力する出力端を含む。第１電極はベース基板上に配置され、出力端と電気的に接続される。第２電極は第１電極上に配置され、第１電極と電気的に接続され、銀を含む。保護層は第２電極上に配置され、第２電極の少なくとも一部をカバーする。これによって、第２電極の下部膜に対する付着力を向上させ、第２電極の変色を防止することができる。 【選択図】 図２

Etchant composition and manufacturing method of display device using the same

Embodiments provide an etchant composition that includes about 5.0 to about 20.0 wt % of a persulfate, about 0.01 to about 15.0 wt % of a sulfonic acid, about 0.01 to about 2.0 wt % of a fluorine compound, about 0.01 to about 5.0 wt % of a 4-nitrogen cyclic compound, about 0.01 to about 1.0 wt % of an amino acid including a hydrophobic group having at least two carbon atoms, and water A weight ratio of the amino acid to the 4-nitrogen cyclic compound is in a range of about 1:16 to about 1:60.

エッチング組成物及びこれを適用した表示基板の製造方法

【課題】常温で保管安定性が高く、基板の処理枚数を増加させることができ、パターンのテーパ角を増加させることのできるエッチング組成物及びこれを適用した表示基板の製造方法を提供する。 【解決手段】本発明によるエッチング組成物は、リン酸４０重量％〜６０重量％と、硝酸１重量％〜１０重量％と、酢酸３重量％〜１５重量％と、銅イオン化合物０．０１重量％〜０．１重量％と、硝酸塩１重量％〜１０重量％と、酢酸塩１重量％〜１０重量％と、余分の水と、を含む。 【選択図】図２

Manufacturing method of display device

A method of manufacturing a display device in a chamber in which a material including yttrium is coated on an inner surface includes: forming a first layer pattern by dry etching on a substrate; depositing a second layer material on the first layer pattern; forming a photoresist pattern on the second layer material; completing a second layer pattern by using the photoresist pattern as an etch mask; and performing an additional acid etching process by using an etching solution including at least one of hydrochloric acid, sulfuric acid, or nitric acid before the forming of the photoresist pattern on the second layer material after the dry etching to form the first layer pattern.

Display device and method of manufacturing the same

A display device is disclosed that includes a substrate, a thin film transistor, a power line, a pixel electrode, an emission layer, a common electrode, and dummy electrodes. The thin film transistor is disposed on the substrate. The power line is disposed on the substrate and includes a first conductive layer and a second conductive layer having a protrusion part spaced apart from an upper surface of a first conductive layer. The pixel electrode is disposed on the substrate and is electrically connected to a thin film transistor. The emission layer is disposed on the pixel electrode. The common electrode is disposed on the emission layer and contacts the power line. The dummy electrodes are disposed on the same layer as the power line and include the same material as the pixel electrode.

Display panel and manufacturing method of the same

A display panel includes a pixel defining layer including first and second light-emitting openings, a conductive partition disposed on the pixel defining layer and including first and second partition openings and respectively corresponding to the first and second light-emitting openings, a first light-emitting element disposed in the first partition opening, a second light-emitting element disposed in the second partition opening, and a conductive pattern disposed on the conductive partition. The first light-emitting element includes a first anode, a first organic layer, and a first cathode contacting the conductive partition, and the second light-emitting element includes a second anode, a second organic layer, and a second cathode contacting the conductive partition. A conductive pattern opening corresponding to the second light-emitting opening is included in the conductive pattern.

Thin film transistor array and method of manufacturing the same

A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

Display device and method of providing the same

A display device includes first and second emitting layers of first and second organic layers, on first and second pixel electrodes, in first and second emission areas, respectively, a first bank layer defining the first and second emission areas, a second bank layer on the first bank layer and defining protruding tips, a first pattern of the first organic layer which is on the second bank layer, an inorganic layer on the first emitting layer and the first pattern, a metal pattern on the inorganic layer to surround the second emission area, and a second pattern of the second organic layer which is on the metal pattern to surround the second emission area. The second pattern and the metal pattern form an undercut structure.

Method of fabricating conductive pattern, display device, and method of fabricating display device

A method of fabricating a conductive pattern includes forming a conductive metal material layer and a conductive capping material layer on a substrate, forming a photoresist pattern as an etching mask on the conductive capping material layer, forming a first conductive capping pattern by etching the conductive capping material layer with a first etchant, forming a conductive metal layer and a second conductive capping pattern by etching the conductive metal material layer and the first conductive capping pattern with a second etchant, and forming a conductive capping layer by etching the second conductive capping pattern with a third etchant. The second conductive capping pattern includes a first region overlapping the conductive metal layer and a second region not overlapping the conductive metal layer, and the forming of the conductive capping layer includes etching the second region of the second conductive capping pattern to form the conductive capping layer.

Display panel and manufacturing method of the same

A display panel includes a pixel defining layer including first and second light-emitting openings, a conductive partition disposed on the pixel defining layer and including first and second partition openings and respectively corresponding to the first and second light-emitting openings, a first light-emitting element disposed in the first partition opening, a second light-emitting element disposed in the second partition opening, and a conductive pattern disposed on the conductive partition. The first light-emitting element includes a first anode, a first organic layer, and a first cathode contacting the conductive partition, and the second light-emitting element includes a second anode, a second organic layer, and a second cathode contacting the conductive partition. A conductive pattern opening corresponding to the second light-emitting opening is included in the conductive pattern.

Display panel and manufacturing method of the same

A display panel includes a pixel defining layer including first and second light-emitting openings, a conductive partition disposed on the pixel defining layer and including first and second partition openings and respectively corresponding to the first and second light-emitting openings, a first light-emitting element disposed in the first partition opening, a second light-emitting element disposed in the second partition opening, and a conductive pattern disposed on the conductive partition. The first light-emitting element includes a first anode, a first organic layer, and a first cathode contacting the conductive partition, and the second light-emitting element includes a second anode, a second organic layer, and a second cathode contacting the conductive partition. A conductive pattern opening corresponding to the second light-emitting opening is included in the conductive pattern.

Thin film transistor array and method of manufacturing the same

A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

Removing photoresist from substrates by means of treatment liquid, and processing treatment liquid with ozone

Display substrate and method of manufacturing the same

A display substrate includes a gate line, a data line, a pixel electrode and a source pad part. The gate line is formed on a base substrate. The data line crosses the gate line to define a pixel area. The pixel electrode makes contact with the base substrate. The source pad part is formed on an end portion of the data line, the source pad part including a source metal layer, a conductive etch stop layer formed on the source metal layer and a source pad electrode formed on the conductive etch stop layer. Thus, the conductive etch stop layer of the source pad part prevents the source metal layer of the source pad part from being damaged and the conductive etch stop layer of the source pad part may fully make contact with the source pad electrode.

Etchant and method of manufacturing display device by using the same

An etchant composition is provided comprising a persulfate from 0.5 to 20 wt %; a fluoride compound from 0.01 to 2 wt %; an inorganic acid from 1 to 10 wt %; a N (nitrogen atom)-containing heterocyclic compound from 0.5 to 5 wt %; a chloride compound from 0.1 to 5 wt %; a copper salt from 0.05 to 3 wt %; an organic acid or an organic acid salt from 0.1 to 10 wt %; an electron-donating compound from at 0.1 to 5 wt %; and a solvent of the residual amount. Also provided is a method of manufacturing a display device by using the same.

Array substrate for display devices

An array substrate for display devices is provided. According to an exemplary embodiment, the array substrate for display device includes: a plurality of gate lines that extend along a first direction; and a data line that is formed by connecting a plurality of first sub-data lines extending along a second direction and a plurality of second sub-data lines extending along a third direction, wherein the gate lines overlap the second sub-data lines with an insulating layer interposed therebetween.

Method for manufacturing thin film transistor array panel

A thin film transistor array panel includes: a gate line on a substrate and including a gate electrode; a first gate insulating layer on the substrate and the gate line, the first gate insulting layer including a first portion adjacent to the gate line and a second portion overlapping the gate line and having a smaller thickness than that of the first portion; a second gate insulating layer on the first gate insulating layer; a semiconductor layer on the second gate insulating layer; a source electrode and a drain electrode spaced apart from each other on the semiconductor layer; a passivation layer on the second gate insulating layer, the source electrode and the drain electrode; and a pixel electrode on the passivation layer and connected with the drain electrode. The first gate insulating layer and the second gate insulating layer have stress in opposite directions from each other.

Thin film transistor substrate and the method thereof

A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.