Pyroelectric infrared detector for planarization thermal isolation structure and method for making same
Technical Field The invention belongs to the technical field of photo-detector, in particular to a thermal insulation structure complanation a pyroelectric infrared detector and its manufacturing method. Background Art The pyroelectric infrared detector because of its low cost, light weight, quick response speed, wide spectral response of the, room temperature without refrigeration, easy thermal imaging, high cost performance, is widely applied in industrial, environmental, medical, military, etc., become the current infrared technical field of one of the hot spots of the study. Pyroelectric infrared detector performance impact on the key to two factors: one is the performance of the ferroelectric thin film material, another factor is the structure of the detector unit; when a certain area of the detector, the detector must be lowered to improve responsivity in thermal conductivity, heat capacity of a device is improved, so the detector unit of the design of the thermal insulation structure is a critical factor in high-performance device. Pyroelectric infrared detector is already reported the heat insulating structure 3 forms: composite membrane type mesa structure, the air gap structure and the microbridge structure. 1st for porous SiO2/SiO2 composite membrane type mesa structure, this kind of structure is relatively simple, but high level impact problems such as passivation and metallized interconnect, thereby increasing the difficulty of the craft and the surface of the device leakage current, but also with other devices is not easy to be monolithically integrated, process compatibility is poor; the air gap and the microbridge structure, these two kinds of structural insulation effect is good, but the production process is complicated, the cost is increased, the yield is low. Content of the invention The invention aims to solve the technical problem of providing a manufacturing process is simple, low cost, high yield, to monolithic integrated with other device thermal insulation structure for planarization of a pyroelectric infrared detector and its manufacturing method. In order to solve the above technical problem, the invention includes a substrate and a heat insulation structure, the heat insulating structure in a silicon or sapphire substrate is etched on a detector corresponding to the pattern of the lower electrode of the deep trench, the deposition of the deep groove with a porous silicon dioxide layer, the porous silicon dioxide layer and the substrate is deposited on the silicon dioxide layer or silicon nitride layer. The preparation method of this invention a silicon or sapphire substrate at the detector corresponding to the pattern of the lower electrode, by reactive ion (RIE, ion etch Reactive) etching or inductively coupled plasma (ICP, Inductive couple plasma) etching to form deep trench, the deposition of the deep groove as a heat insulating layer of the porous silicon dioxide layer, a large area of the reaction ion porous silicon dioxide is etched with the substrate surface of the epitaxial layer form the same plane, then deposition of silicon dioxide or silicon nitride modified porous silicon dioxide surface and the substrate surface of the epitaxial layer, the heat insulating structure by semiconductor micro-machining process to finish manufacturing of pyroelectric infrared detector. The invention in particular idea is in the silicon (Si) or sapphire substrate (if the other photoelectric device monolithically integrated, is required before on the sapphire substrate epitaxial the photoelectric device the material of the epitaxial layer structure, the specific structure of the device request the relevant) than the detector on the lower electrode to be slightly bigger graphics; with the thickness of photoresist as a mask, RIE or ICP etching to form the deep groove, remove the photoresist, using sol-gel method as a heat insulating layer made of porous silicon dioxide layer, a large area through the RIE etching the porous silicon dioxide, until the detector around the lower electrode pattern is etched clean porous silicon dioxide, lower electrode pattern are exposed out of the detector surface of the epitaxial layer the surrounding material of the, re-deposition of silicon dioxide or silicon nitride modified porous surface of silicon dioxide, to form buried complanation structure of the heat-insulating layer of porous silicon dioxide, then using semiconductor micro-machining process to finish manufacturing of pyroelectric infrared detector. Adopting the above-mentioned technical scheme, the produce the beneficial effect that: the invention has realized the process for manufacturing a semiconductor with a pyroelectric infrared detector compatible with the thermal insulation structure complanation, the structure of the detector can be monolithically integrated with other device, is conducive to high-density integrated detector unit, and the manufacturing process is simple, the processing cost is low; at the same time greatly reduces the mesa device of the step vertical height difference of structure, easy-to-metal interconnection, thereby reducing the difficulty of the device manufacturing process, reduce the surface leakage current; the realization of this invention, improved performance and yield pyroelectric infrared detector, the reliability of the device also is obviously improved. This invention is suitable for the pyroelectric infrared detector, infrared-ultraviolet dual-band monolithic integrated, infrared detector and CMOS ROIC (Low pressure chemical vapor deposition) of monolithic integrates burnt plane device. Description of drawings Below and in conjuction with the specific embodiment of the invention for further detailed description. Figure 1 is a structure diagram of the invention; Figure 2a the [...] 2h is a schematic diagram of the invention process. That all marks on the attached Figure: 101 the silicon (Si) or sapphire substrate [...] , 102 the porous silicon dioxide [...] , the 103 [...] silicon (Si) or an epitaxial layer on the sapphire substrate, 104 SiO2 or Si3 N4 surrogate mother, 105 the electrode pattern of the lower electrode [...] , the 106 BST ferroelectric thin film, 107 the electrode pattern of the upper electrode [...] , 108 Si3 N4 passivation layer, 109 the infrared detector electrode [...] , 110 the infrared detector [...] lower electrode Mode of execution As shown in Figure 1, the planarization of the thermal insulation structure of the pyroelectric infrared detector includes a substrate and a heat-insulating structure, the substrate is a silicon (Si) or sapphire substrate 101. The planarization of the thermal insulation structure of the pyroelectric infrared detector is a silicon or sapphire substrate 101 is etched on a detector corresponding to the pattern of the lower electrode of the deep trench, the deposition of the deep groove with a porous silica layer 102, in the porous silicon dioxide layer 102 and the substrate of the epitaxial layer 103 is deposited on the silicon dioxide layer or silicon nitride layer 104. As shown in Figure 1, is arranged on the heat insulation structure of electrode pattern of the lower electrode 105, BST ferroelectric thin film 106, the electrode pattern of the upper electrode 107, Si3N4 passivation layer 108, infrared detector electrode 109 and infrared detector the lower electrode 110. The planarization of the thermal insulation structure of the pyroelectric infrared detector adopts the following preparation method: 1, silicon (Si) or sapphire substrate 101 for pretreatment before lithography: using trichioroethane, acetone, isopropyl alcohol cleaning the substrate 101 ; if it is the sapphire substrate, then using HCL: H2O removing the substrate 101 or the epitaxial layer 103 of the natural oxide layer on, then in the 200 [...] /30 min to remove moisture under the condition of the substrate, if necessary, with the plasma cleaning equipment; If the detector monolithically integrated with other device, to the pre-treatment before the sapphire or silicon substrate 101 through the metal-organic chemical vapor deposition (MOCVD, Metal organic chemical vapor deposition) method or a molecular beam epitaxial technology (MBE, Molecular beam epitaxy) growing the epitaxial layer 103 (specific material parameters and the other single-chip integrated device), as shown in Figure 2a is shown. 2, in a pre-treatment of the substrate 101 on the substrate or the epitaxial layer 103 is coated with photoresist, the adhesive SPR220 4.5, speed: 3000-6000r/min, hardening the hot plate: the 90 [...] /90s, as shown in Figure 2b is shown. 3, through the exposure, developing, peb, plasma scavenging glue photolithographic process on the photoresist corresponding to the lower electrode of the detector pattern, as shown in Figure 2c as shown. 4, using SPR220 4.5 photoresist as a mask, RIE or ICP etching of the epitaxial layer 103, the substrate 101, to form deep groove, the groove depth is 3-6 microns, after the completion of etching, the photoresist is removed by acetone, wherein the corrosion gas and corrosion type relevant process parameters and the substrate, as shown in Figure 2d is shown. 5, made of porous silicon dioxide using sol-gel method, according to the specific the depth of the groove, selection 3000-6000r/min the rotation speed of the between the coated porous silicon dioxide 102, if the groove is relatively deep, a filling is insufficient, and repeat this process, until the porous silicon dioxide fill groove; as shown in Figure 2e is shown. 6, using RIE equipment of large area is etched porous silicon dioxide 102 to epitaxial layer 103 surface, when the 103 corrosion clean the surface of the porous silicon dioxide, is formed on porous silicon dioxide in the recess 102 and the epitaxial layer 103 surface on the same plane, as shown in Figure 2f shown. Etching gas as: carbon tetrafluoride or trifluoro methane, the power of 100W, specific etching time with the epitaxial layer 103 of the above porous silicon dioxide 102 related to thickness. 7, using plasma-enhanced chemical vapor deposition (PECVD, Plasma enhanced chemical vapor deposition) or low pressure chemical vapor deposition (LPCVD, Low pressure chemical vapor deposition) in the porous silicon dioxide 102 and the epitaxial layer 103 is deposited on the surface of silicon dioxide or silicon nitride 104 modified porous silicon dioxide 102 surface, the thickness of 180 nm -220 nm; to this, planarization of the infrared detector to form a thermal insulation structure, as shown in fig. 2g is shown in 8, in a semiconductor process for planarization thermal insulation structure of porous silicon dioxide 102 and SiO2 or Si3N4 layer 104 making pyroelectric infrared detector, the manufacturing process: thermal insulation structure in the planarization of the porous silicon dioxide 102 and Si02 or Si3N4 layer 104 on the lower electrode pattern of the detector, then the electron beam evaporation Ti/Pt, through the stripping process to form a lower electrode the electrode pattern 105 ; the magnetron sputtering system used for the lower electrode pattern 105 and SiO2 or Si3N4 layer 104 is deposited on the surface of the ferroelectric thin film Ba0.65Sr0 . 35TiO3 (BST); the electrode pattern of the lower electrode 105 and BST ferroelectric thin film 106 on the top of the detector the electrode pattern, a thin layer by sputtering Ni/Cr as the upper electrode contact metal, using lift-off process to form an upper electrode pattern electrode 107 ; then the upper electrode to the infrared detector 107 for the protection of the graphics table lithography, photoresist is AZ1500, HF for: H2O etching solution to the BST corrosion of the SiO2 or Si3N4 layer 104 and the surface of the electrode pattern of the lower electrode 105 (exposed portion of the lower electrode metal) surface; utilizing the PECVD SiO2 or Si3N4 layer 104, the electrode pattern of the lower electrode 105 and the upper electrode pattern electrode 107 (exposed portion of) is deposited on the surface of the 500 nm as a passivation layer of silicon nitride; detector the need to extract the part of the upper electrode and the lower electrode pattern window, are etched away by RIE in the graphical window 500 nm thick silicon nitride, photoresist is removed; the electrode pattern on the upper electrode 107 and Si3N4 passivation layer 108 surface and the graphics window sputtering Ti/Au, as one of the electrodes during electroplating; in the Si3N4 passivation layer 108 of the detector on the surface of the photoresist, the lower electrode pattern, making the detector through the electroplating process the upper electrode 109 and the lower electrode 110, to this, the planarization of the thermal insulation structure of the pyroelectric infrared detector is completed, as shown in Figure 2h illustrated. The invention discloses a pyroelectric infrared detector provided with a planarized heat-insulated structure and a preparation method thereof. The pyroelectric infrared detector comprises a substrate and the heat-insulated structure, wherein the heat-insulated structure is as follows: a deep notch of a corresponding figure of a lower electrode of a detector is etched on the silicon or sapphire substrate; a porous silicon dioxide layer is deposited inside the deep notch; and silicon dioxide layers or silicon nitride layers are deposited on the porous silicon dioxide layer and the substrate. The detector is easy to be integrated with other devices by means of single scale intergration, is favorable for high-density integration of detector units, has simple manufacturing technique and low processing cost, simultaneously greatly reduces the vertical height difference of steps of a mesa device structure, is easy to interconnect metals, reduces the difficulty of the processing technique of devices and the surface leakage current of the devices, improves the performance and the finished product rate of the pyroelectric infrared detector, and obviously improves the reliability of the devices. The detector provided with the structure is suitable for infrared-ultraviolet dual-range single scale intergration and manufacture of the infrared detector and a CMOS ROIC one chip integrated focal plane device. 1, a thermal insulation structure complanation a pyroelectric infrared detector, which comprises a substrate and the heat-insulating structure, which is characterized in that the thermal insulation structure in the silicon or sapphire substrate is etched on a detector corresponding to the pattern of the lower electrode of the deep trench, the deposition of the deep groove with a porous silicon dioxide layer, the porous silicon dioxide layer and the substrate is deposited on the silicon dioxide layer or silicon nitride layer. 2, thermal insulation structure complanation of the method for preparing of pyroelectric infrared detector according to Claim 1, which is characterized in that the lithography on silicon or sapphire substrate corresponding to the pattern of the lower electrode of the detector, corresponding to the pattern etching to form a deep trench, the deposition of the deep groove as a heat insulating layer of the porous silicon dioxide layer, the porous silicon dioxide is etched with the substrate surface of the epitaxial layer form the same plane, then deposition of silicon dioxide or silicon nitride modified porous silicon dioxide surface and the substrate surface of the epitaxial layer, finally the complete thermal insulation structure made of pyroelectric infrared detector. 3, thermal insulation structure complanation of the method for preparing of pyroelectric infrared detector according to Claim 2, characterized in that the reaction in the ion or inductive coupling plasma etching corresponding to the pattern etching into a deep groove, the groove depth is 3-6 microns. 4, thermal insulation structure complanation of the method for preparing of pyroelectric infrared detector according to Claim 2, characterized in that said porous silica through sol-gel method, according to the depth of the deep groove, the rotation speed of the corresponding selected in the deep groove coating porous silica. 5, thermal insulation structure complanation of the method for preparing of pyroelectric infrared detector according to Claim 2, characterized in that the porous silicon dioxide of reactive ion etching the substrate-epitaxial layer to form the same plane surface. 6, planarization heat-insulating structure of the method for preparing of pyroelectric infrared detector according to Claim 2, the invention is characterized in that a plasma-enhanced chemical vapor deposition process or low-pressure chemical vapor deposition is modified deposition of silicon dioxide or silicon nitride on the surface of porous silicon dioxide, deposited a thickness of 180 nm -220 nm. 7, the [...] 6 complanation any one of the heat-insulating structure of the method for preparing of pyroelectric infrared detector according to Claim 2, characterized in that the heat-insulating structure by semiconductor micro-machining process to finish manufacturing of pyroelectric infrared detector.