УСТРОЙСТВО ДЛЯ ИЗМЕРЕНИЯ РАСХОДА ЭЛЕКТРОЭНЕРГИИ С ПРЕОБРАЗОВАТЕЛЕМ СИГМА-ДЕЛЬТА С ПЕРЕМЕННЫМ КОЭФФИЦИЕНТОМ УСИЛЕНИЯ (ВАРИАНТЫ)

FIELD: electrical engineering. SUBSTANCE: device has at least one sigma-delta transducer, which can output sequence of digital pulses, digital counter which adds output signal from sigma-delta transducer, and attention unit which outputs signal when total signal reaches threshold level. Goal of invention is achieved by design of proportioning unit which has additional unit for digital control of sigma-delta converter gain with digital programmable memory unit which stores parameter which represents gain. Level of parameter is controlled externally. In addition device has digital logic units for logical combination of gain parameter with digital sum which stores in counter in order to determine number of pulses which is required for reaching preset level and output of output pulse. EFFECT: increased precision. 3 cl, 4 dwg сос гс пы ГЭ РОССИЙСКОЕ АГЕНТСТВО ПО ПАТЕНТАМ И ТОВАРНЫМ ЗНАКАМ (19) (51) МПК ВИ "” 2417 303 ' 13) СЛ С 01 В 11/48, © 06 С 7/46 12) ОПИСАНИЕ ИЗОБРЕТЕНИЯ К ПАТЕНТУ РОССИЙСКОЙ ФЕДЕРАЦИИ (21), (22) Заявка: 94001563/09, 19.01.1994 (30) Приоритет: 20.01.1993 ЕР 93400129.8 (46) Дата публикации: 10.08.1998 (56) Ссылки: ЕК, патент 2570854, С 06 С 7/16, 1986. (71) Заявитель: Шлюмберже Эндюстри С.А. (ЕК) (72) Изобретатель: Мишель Жервэ (ЕК), Ален Базэн (ЕК), Дениз Шанг (ЕК) (73) Патентообладатель: Шлюмберже Эндюстри С.А. (ЕК) (54) УСТРОЙСТВО ДЛЯ ИЗМЕРЕНИЯ РАСХОДА ЭЛЕКТРОЭНЕРГИИ С ПРЕОБРАЗОВАТЕЛЕМ СИГМА-ДЕЛЬТА С ПЕРЕМЕННЫМ КОЭФФИЦИЕНТОМ УСИЛЕНИЯ (ВАРИАНТЫ) (57) Реферат: Устройство для измерения расхода электроэнергии, содержащее по меньшей мере один преобразователь сигма-дельта, приспособленный выдавать последовательность цифровых импульсов, цифровой счетчик для суммирования выходного сигнала с преобразователя сигма-дельта и средство сигнализации для выдачи выходного сигнала в момент достижения суммарным сигналом заданной величины, отличающееся тем, что устройство дозирования дополнительно содержит средство для цифровой регулировки усиления преобразователя ...

Halbleiterschaltung und ihre Anwendung in einer Operationsschaltung, einem Signalwandler und einem Signalverarbeitungssystem

DIGITAL-/ANALOG-WANDLERSYSTEM

HYBRIDANALOGFUNKTIONSGEBER

Ein-Chip-Halbleitervorrichtung

RECHENVORRICHTUNG

Gemischter Rechner und Simulator

Hybrid system simulator

Published without abstract.

VERFAHREN ZUR MULTIPLIKATION/DIVISION ANALOGER SPANNUNGEN

Integrating electronic multiplying circuit

To multiply analog quantities A and B, the quantity A is supplied to an analog/digital converter (2), the numerical output values of which are input into an accumulator (8). The analog quantity B is converted by means of an analog frequency converter (4) into a switching signal which triggers with the frequencies proportional to the quantity B an addition or subtraction of the numerical values input into the accumulator. The information on the sign of the product of the analog quantities A and B is obtained by means of comparators (5) and (6) and of a gate (7). The content of the accumulator (8) corresponds to the time integral of the product of the analog quantities A and B. ...

Processing unit`s e.g. CPU, analog or digital signals switching and comparing method for computer system, involves switching between operating modes of units and comparing analog signals of units by changing one signal into digital value

The method involves switching between two operating modes of processing units (B10, B11) using a switching unit (B01). The operating modes correspond to comparison and performance modes, respectively. Two analog signals of the processing units are compared by changing one analog signal into a digital value. The conversion of the analog signals is conducted in one of the processing units. An independent claim is also included for a device for switching and comparing signals in a computer system with processing units.

INTEGRATING CIRCUIT

INTEGRATION ARRANGEMENT

MULTIPLYING DIGITAL-TO-ANALOGUE CONVERTER

APPARATUS FOR ANALOG-TO-DIGITAL CONVERSION OF PHYSICAL VALUES AND THEIR RATIOS

... 1307334 Electric measurement PENZENSKY POLITEKHNICHESKY INSTITUT 7 July 1970 32831/70 Heading G4A The Specification describes apparatus for converting to digital form various physical values, e.g. time intervals, electric pulse durations, electric frequencies, phase shift angles of two waves and ratios of time intervals. In the embodiment of Fig. 3 for measuring a time interval t x defined by the interval between two pulses, a coarse counter 25 counts n 0 pulses of period T 0 from an oscillator 23 between the two pulses to derive the coarsest digit. The second pulse enables an oscillator 26 which delivers pulses of period T 0 -.1T 0 to a comparator 28, the comparator receiving on its other input pulses of period T 0 and length . 1T 0 . A second counter 34 counts n 1 pulses from oscillator 23 between the second pulse and a pulse produced by the comparator 28 at coincidence of its two inputs to derive a second digit. The comparator output enables an oscillator 26 delivering pulses at period ...

MULTIPLE-FUNCTION DIGITAL/ANALOG CONVERTER

NET FLUID COMPUTING UNIT FOR USE WITH CENTRAL COMPUTER

... 1291671 Measuring content of oil in water HYDRIL CO 19 April 1971 [2 Feb 1970] 21084/71 Heading G1N [Also in Division G4] An analogue signal representing the oil content in an oil and water mixture flowing in a pipe (23) Fig. 2 (not shown) is derived from a capacitive bridge 200, Fig. 3, one capacitor 37 of which is in the pipe line so that the bridge output varies in accordance with the oil and water mixture flowing between the capacitor plates.

Direct frequency synthesiser

A direct frequency synthesiser includes an accumulator 2 having an input receiving a digital word representative of the desired frequency, a clock controlling the successive adding of the digital word to the contents of the accumulator 2 to provide a periodically varying value representing a sawtooth waveform at the output of the accumulator, an XOR gate system 10 to convert the sawtooth waveform to an equilateral triangle form and integrators 12, 14 to provide an output to a digital to analog converter 8 in order to provide a sine wave of a desired purity. ...

Configurable function implementing system and digital to analogue converters

DIGITAL/ANALOG MULTIPLIER

... 1301168 Multipliers INTERNATIONAL BUSINESS MACHINES CORP 9 Nov 1970 [26 Feb 1970] 53155/70 Headings G4G and G4H [Also in Division H3] In a digital/analogue multiplier in which the analogue input (e i , Fig. 1, not shown) is passed via resistances R B , R A to first and second input terminals of an operational amplifier having a feedback path connected to the second input terminal, a variable impedance (R V ) controlled by digital signals is connected between the second input terminal and a reference source so that the output (e 0 ) is the product of the input signal (e i ) and the digital signals. In the balanced modulator of Fig. 2 in which R A = R V = R F/2 , binary signals of 0 and 1 at input 20 applied to transistor 26 result in a respective voltage gain of + 0.5 and - 0.5. Circuit 30 may be included to compensate for the offset voltages of transistor 26 and operational amplifier 22 by introducing an offset current at a point 38. In the embodiment of Fig. 3 a nine-bit parallel coded ...

Improvements in or relating to automatic computing apparatus

... 769,530. Electric analogue calculating systems. SCHLUMBERGER WELL SURVEYING CORPORATION. June 2, 1954 [June 2, 1953], No. 16336/54. Class 37. [Also in Group XL(b)] A computer for deriving a particular function of two independent variables comprises a screen inscribed with a family of curves of the function depicting successive values of a dependent variable plotted in first and second co-ordinate directions in terms of two respective independent variables, sources of radiant energy projected upon the screen in beams which are deflectible with respect thereto in the first coordinate direction to scan the inscribed family of curves and effect modulation of the radiant energy thereby and in the second co-ordinate direction in response to instantaneous values of a first independent variable, timing means responsive to instantaneous values of a second independent variable to determine the time interval of scanning by the beam, and sensitive means receiving and utilizing the modulated radiant ...

Improvement in automatic computer

... 732,878. Photo-electric computation of functions of independent variables. SCHLUMBERGER WELL SURVEYING CORPORATION. July 1, 1953 [July 1, 1952], No. 18244/53. Class 40(3). A computor apparatus for deriving the instantaneous value of a function of two dependent variables comprises a member inscribed with a family of curves depicting such function, means forming a beam of radiant energy impinging on the member, means for displacing the member and beam relatively on to the other in a first direction to effect modulation of the beam by the inscribed curves, means for positioning the member and the incident beam relatively to one another in a second direction perpendicularly to said first direction in accordance with instantaneous values of a first independently variable quantity, and utilization means operated in synchronism with the relative displacement between the member and the incident beam in the first direction operative to. establish a time interval dependent on the instantaneous values ...

IMPROVEMENTS IN OR RELATING TO THE SIMULATION OF CIRCUITS HAVING ANALOGUE PARTS AND DIGITAL PARTS

STABLE SINE WAVE GENERATOR

A CIRCUIT ARRANGEMENT COMPRISING A DIVIDING ANALOG-TO-CONVERTER

Conversion and Calculating Arrangements Employing Logarithmitic and/or Exponential Relationships between Input and Output Quantities

... 1,195,262. Logarithmic/exponential analoguedigital and digital-digital converter; calculating apparatus. INTELLIGENT INSTRUMENTS Inc. 20 June, 1967, No. 28356/67. Headings G4A and G4H. Analogue-digital and digital-digital converter.-By controlling the frequency of a unijunction transistor relaxation oscillator 99, Fig. 4, (circuit-Fig. 1, not shown) to be proportional to the count in a multi-cathode type counter 100 (Fig. 3, not shown), which also counts the pulses from the oscillator, the count( and the oscillator frequency) will rise exponentially with time, and thus if counting is allowed to continue for a period proportional to x, either by direct control of the oscillator or by a gate between the oscillator and the counter, then the final count will be proportional to ex. Frequency control of the oscillator is effected by a feedback form appropriately weighted cathode resistors in the counter. Digital-to-analogue and digital-to-digital conversion is effected by allowing counting ...

PRODUCT/QUOTIENT DERIVING SYSTEM

... 1286743 Electric selective signalling MITSUBISHI DENKI KK 5 March 1970 [6 March 1969 2 April 1969] 10590/70 Headings G4D D7X D6Y D6C1 and D6C2 To derive the produce or quotient of two electrical quantities they are each converted into signals having a frequency proportional to or inversely proportional to the electrical quantities and the pulses of one frequency signal are counted for at least one period of the pulses of the other frequency signal. In the embodiment of Fig. 1 A in which the reactance X of the circuit is found, the reactive voltage E X is converted into a voltage V E proportional to it, this voltage being converted in an inversely proportional circuit 12a to a frequency signal f E proportional to 1/V E . Current 1 is converted in a circuit 14 to a voltage V 1 proportional to it this voltage then being converted in an inversely proportional circuit 12b to a frequency f1 proportional to 1/V 1 . A counter circuit 16 counts the pulses of the frequency signal f 1 for one cycle ...

AUTOMATIC CONTROL APPARATUS FOR ADJUSTING AN ANALOGUE OUTPUT IN STEPS

... 1324088 Analogue/digital converters UZINELE ELECTRO PUTERE CRAIOVO 24 July 1970 36112/70 Heading G4H In an analogue/digital converter system of the type in which a feedback signal is compared with the analogue input to derive an error signal mz, when me > Ur 2 a control circuit FSC c enables a main control register DCP under the control of a signal In and when me Подробнее

Apparatus and method for frequency translation in a communication device

ANALOGUE-TO-DIGITAL SIGNAL CONVERTERS

... 1486929 Analogue - to - digital conversion SUWA SEIKOSHA KK 27 Nov 1974 [28 Nov 1973 10 Dec 1973] 51387/74 Heading H3H In a dual ramp analogue-to-digital converter, the time period over which the input analogue V x is integrated by integrator 1 is determined by a digital number set at 10 and compared by comparator 11 with the state of stages 13-16 of a counter 4 counting clock pulses from a crystal oscillator 5. Upon detection of equality by comparator 11, V x is disconnected. Counter 4 may be immediately reset and a reference voltage V s integrated, the time taken for the output of the integrator 1 to drop to a given level, detected at 2, being measured by strobing counter 4 into a memory 12. Alternatively, counter 4 may be allowed to overflow, integration of V s being delayed till then. Counter 4 has three decade stages 13, 14, 15 and three binary stages 16, 17, 18. The A-to-D converter may be in a time-piece, sharing the crystal oscillator and a liquid crystal display.

ELECTRIC CIRCUITS FOR DIGITISING DATA REPRESENTED BY A VARIABLE ELECTRIC CURRENT

Improvements in and relating to hybrid analogue-digital computing equipment

... 1,022,683. Electric analogue calculating. IBM UNITED KINGDOM HOLDINGS Ltd. Aug. 19, 1963 [Aug. 29, 1962], No. 33205/62. Heading G4G. Hybrid computing equipment for performing arithmetical operations in a sequence of stages using operators in digital form and operands in analogue form, includes analogue storage means to store the partial results of the arithmetical operations derived from the successive stages in the sequence for a period long enough to permit the modification of the digital operator controlling the next stage in the sequence, thereby holding the analogue partial result of one stage for a period before it is supplied as an operand to the next stage in the operation. Fig. 3 shows the basic unit of the equipment which comprises a digital register 10 of binary or decimal form controlling an impedance network 11. The network 11 multiplies the digital input D by the signal V r supplied to terminal 13 to provide one input to a high gain amplifier 12. The other input to amplifier ...

Method and apparatus of electronic computation

Device for the measurement of the average value of the characteristic coefficient of an exponential function

PROGRAMMABLE STRUCTURE OF INSERTING WITH MIXED ANALOGDIGITAL ENTERPRISE

SIMULATION METHOD AND DEVICE (ELECTRONIC ART HEAD) TO THE REPRODUCTION OF THE TRANSMISSION CHARACTERISTICS OF THE HUMAN OUTER EAR DURING FREE FIELD ACOUSTIC IRRADIATION.

MODULAR INTERPOLATION ARCHITECTURE ABSTENTION EQUIPMENT

SIGNAL PROCESSING CIRCUIT WITH SWITCHED TENSION CURRENT CONVERTERS

DEVICE FOR THE PARTITIONING OF SIMILAR PERIODIC SIGNALS

IMPROVEMENTS IN SYSTEMS FOR REACHING LARGER DISSOLUTION OF AMPLITUDE

PROCEDURE FOR THE ENTERPRISE OF EQUIPMENT FOR THE RELIEF OF COMMUNICATIONS

IMPROVEMENTS IN CODING/CDECODING SYSTEMS

Analysis equipment for measuring instrument

Method and apparatus for processing sigma-delta modulated signals

SYSTEM FOR GENERATING CORRECTION SIGNALS FOR USE IN FORMING LOW DISTORTION ANALOG SIGNALS

MULTIPLIER/ADDER CIRCUIT

CONVERTORS

SECURITY MONITORING SYSTEM AND METHOD FOR AN ELECTRIC POWER SYSTEM EMPLOYING A FAST ON-LINE FLOW COMPUTER ARRANGEMENT

SQUARE ROOT DIGITAL-TO-ANALOG CONVERTER

ABSTRACT A twenty four bit digital-to-analog converter comprising three eight bit digital-to-analog converters. The outputs of the two least significant converters are proportioned and summed together into one amplifier to form a sixteen bit converter. The most significant converter is fed to a separate amplifier. The output of the two amplifiers is summed into a square-root amplifier through various analog switches and summing resistors. Gains at the input and output of the square-root amplifier are altered according to the input level of the digital-to-analog converter in order to optimize the dynamic range and gain requirements.

DIGITAL COMPUTER PROGRAM SYSTEM EMPLOYED IN A HYBRID LOADFLOW COMPUTER ARRANGEMENT FOR TORING THE SECURITY OF AN ELECTRIC POWER SYSTEM

ELECTRIC CIRCUITS

RATE MULTIPLIER SQUARE ROOT EXTRACTOR WITH INCREASED ACCURACY FOR TRANSMITTER APPLICATIONS

VIBRATION DENSITOMETER

PROCESS AND DEVICE FOR GENERATING RANDOM CONTROLLED HISTOGRAM AND SPECTRUM SIGNALS

Procédé et dispositif de génération d'un signal aléatoire comportant: .cndot. une première étape (a) de génération d'un signal pseudo-aléatoire, .cndot. une deuxième étape (b) de filtrage (F1) du signal issu de l'étape (a) pour obtenir un signal x(t) ayant une enveloppe spectrale prédéterminée H(f), .cndot. une troisième étape (c) où une fonction non-linéaire g est appliquée au signal x(t) de façon à former un signal y(t) et pour créer des remontées ou overshoots sur les bords de l'histogramme du signal y(t), .cndot. une quatrième étape (d) de filtrage (F2) permettant de lisser les remontées ou overshoots de l'histogramme du signal y(t), de compenser l'effet de la non-linéarité et d'effectuer un complément de filtrage à (F1). Application dans un système de conversion analogique-numérique ou numérique-analogique ...

DENSITY MEASUREMENTS

DIGITAL COMPUTER HAVING ANALOG SIGNAL CIRCUITRY

APPARATUS AND METHOD FOR FREQUENCY TRANSLATION IN A COMMUNICATION DEVICE

A digital-to-analog (D/A) convertor (206) multiplies an input signal by a sinewave approximation (300) to perform frequency translation. Optimized coefficient values are predetermined and are programmed based on a control word generated during a clock cycle. The programming over a time period representative of the frequency of the sinewave approximation (300) provides a signal that multiplies an input signal such that the effects of odd harmonics at an output are mitigated while the advantages of a traditional switching mixer are retained. In one embodiment the multiplying D/A convertor (206) includes a plurality of resistors (Rl-R8) connected to an amplifier (400), with plural switching gates (G1-G8) switching select resistors (R1-R8) in and out of operation, a control word from counter/controller (203) controlling the gates (G1-G8).

Appareil à calculer

Appareil à calculer

Calculateur électronique

Elektrische Schaltung zur Bestimmung des Vorzeichens und des Betrages der Differenz zweier binärer Zahlen

Appareil électronique pour effectuer l'analyse harmonique d'une fonction

Procédé pour engendrer à partir d'une tension électrique X donnée, une grandeur y liée à ladite tension par une équation y = f (x), et appareil pour la mise en oeuvre de ce procédé

Elektronischer Rechner zur Berechnung des Integrals

Dispositif de calcul

Elektronisches Auswertungsgerät an Waagen

Schaltungsanordnung zum Messen des Verhältnisses zwischen zwei Signalen

Elektronisches Rechengerät

Analog-digitales Rechen- und Anzeigewerk

Apparecchiatura di conversione e moltiplicazione permettente di far traslare o ruotare le immagini o i caratteri che appaiono sullo schermo di un tubo a raggi catodici

Vorrichtung zum Messen der Strömungsgeschwindigkeit einer Flüssigkeit

VERFAHREN ZUR BESTIMMUNG DER TRUEBUNG EINES MEDIUMS, GERAET ZUR DURCHFUEHRUNG DES VERFAHRENS UND ANWENDUNG DES VERFAHRENS.

Console de visualisation graphique

Calculateur de marée

Rechenanlage zur Verarbeitung von Signalen dreier variabler Grössen

Durchflussmengen-Recheneinrichtung

Dispositif de liaison bilatérale entre un calculateur analogique et un calculateur numérique formant une installation mixte

Analog-Digital-Rechner

Schaltungsanordnung zum Verändern zweier elektrischer Analoggrössen nach einem für beide Grössen identischen Programm

Schaltungsanordnung zur Messung elektrischer Energie

Schaltungsanordnung zur Multiplikation zweier Grössen, insbesondere von Strom und Spannung zur Wikleistungsmessung

Analog-Korrelator

Dispositif calculateur d'une fonction dépendant de lignes trigonométriques et utilisation de ce dispositif

Elektronisches Gerät mit impulsgesteuertem Kurvengenerator

Einrichtung zur digitalen Berechnung von Randbedingungen I oder II. Art der partiellen Differentialgleichungen II. oder IV. Ordnung, die einen elektrischen Analogrechner ergänzt

Verfahren zur digitalen Bestimmung des Quadrates des Verhältnisses einer variablen Messfrequenz zu einer konstanten Bezugsfrequenz

Regelkreis mit nachgebender Rückführung

Verfahren zur digitalen Bestimmung einer Potenz des Verhältnisses einer variablen Messfrequenz zu einer konstanten Grundfrequenz

Verfahren zur Messung elektrischer Wirkenergie und Schaltungsanordnung zur Durchführung des Verfahrens

Auswertungsgerät für eine Messeinrichtung

Verfahren zur digitalen elektronischen Integration einer Messgrösse über eine unabhängige Messgrösse

Verfahren und Schaltungsanordnung zur Bildung des Reziprokwertes einer numerischen Grösse, die in die Form von Informations-Codeimpulsen gebracht wird.

Funktionsbildende Schaltungsanordnung

Dispositif délivrant à partir de deux grandeurs un nombre d'impulsions proportionnel à l'intégrale de leur produit

VERFAHREN UND EINRICHTUNG ZUR ABLEITUNG DIGITALER MESSWERTE AN ELEKTRIZITAETSNETZEN.

Methods And Systems For Quantum Computing Enabled Molecular AB Initio Simulations

The present disclosure provides methods and systems for using a hybrid architecture of classical and non-classical (e.g., quantum) computing to compute the quantum mechanical energy and/or electronic structure of a chemical system, as well as to identify stable conformations of a chemical system (e.g., a molecule) and/or to perform an ab initio molecular dynamics calculation or simulation on the chemical system.

HANDHELD ELECTRONIC DEVICE TO WIRELESSLY CONTROL A WIRELESS ADAPTER

A device includes a processing device, memory, wireless circuitry, a touch-sensitive display. Programs are stored in the memory, when executed by the processing device, cause: displaying a user interface on the touch-sensitive display that includes a set of menu items associated with adaptive devices; detecting a first contact on the touch-sensitive display associated with a first menu item for selection of control of a first adaptive device; in response to detecting the first contact, displaying a set of control indicia associated with control functionality of the first adaptive device; detecting a second contact on the touch-sensitive display associated with a first control indicia of the set of control indicia; generating an actuation command associated with the first control indicia that corresponds to a specific action of the adaptive device; and transmitting, using the wireless circuitry, the actuation command to a wireless adapter device to which is coupled the adaptive device. 1. A handheld electronic device comprising:a processing device and memory;wireless circuitry coupled to the processing device;a touch-sensitive display coupled to the processing device; and displaying a user interface on the touch-sensitive display, wherein the user interface includes a set of menu items associated with a plurality of adaptive devices;', 'detecting a first contact on the touch-sensitive display associated with a first menu item of the set of menu items, the first menu item for selection of control of a first adaptive device of the plurality of adaptive devices;', 'in response to detecting the first contact, displaying a set of control indicia associated with control functionality of the first adaptive device;', 'detecting a second contact on the touch-sensitive display associated with a first control indicia of the set of control indicia;', 'generating an actuation command associated with the first control indicia, the actuation command corresponding to a specific ...

MIXED SIGNAL COMPUTER ARCHITECTURE

The present disclosure describes a computer using a combination of analogue and digital components/elements used in a cohesive manner. Depending on the signals and data the computer manipulates, the analog processing elements and digital processing elements can be used separately, independently or in combination to optimize the computational results and the performance of the computer. 13-. (canceled)4. A mixed signal computer , comprising:one or more digital ALUs;one or more digital registers, wherein at least one of said digital registers is connected to least one of said digital ALUs;one or more analog ALUs;one or more analog registers, wherein at least one of said analog registers is connected to least one of said analog ALUs; andone or more exchange registers, wherein said exchange registers are interconnected with at least one of said digital registers and at least one of said analog registers.5. The mixed signal computer of claim 4 , further comprising:a control unit, wherein said control unit is configured to control said one or more digital ALUs, said one or more analog ALUs, and said one or more exchange registers.6. The mixed signal computer of claim 5 , further comprising:a digital memory; andan analog memory.7. The mixed signal computer of claim 6 , further comprising:a plurality of inputs, wherein at least one of said inputs is analog and at least one of said inputs is digital; anda plurality of outputs, wherein at least one of said outputs is analog and at least one of said outputs is digital.8. (canceled)9. The mixed signal computer of claim 5 , wherein said one or more analog ALUs operate continuously responsive to a set of instructions from the control unit using a clock signal independent of the clock signal operating said one or more digital ALUs.10. (canceled)11. The mixed signal computer of claim 6 , further comprising:an automatic gain control circuit controlled by said control unit to scale data values stored in said analog memory; anda data ...

Function generator for the delivery of electrical signals

A function generator provides a first signal unit for the delivery of a first signal at a first output. The function generator provides a second signal unit for the delivery of a second signal at a second output. The function generator provides a calibration unit for the generation of a test signal, wherein the test signal can be supplied to the first signal unit and/or to the second signal unit. A comparison unit is connected downstream of the first signal unit and/or the second signal unit. The comparison unit compares the test signal delivered at the first output and/or at the second output with a calibration signal, wherein the output signal of the comparison unit can be supplied to the calibration unit.

RESISTIVE AND DIGITAL PROCESSING CORES

In some examples, a device includes a first processing core comprising a resistive memory array to perform an analog computation, and a digital processing core comprising a digital memory programmable with different values to perform different computations responsive to respective different conditions. The device further includes a controller to selectively apply input data to the first processing core and the digital processing core. 1. A device comprising:a first processing core comprising a resistive memory array to perform an analog computation;a digital processing core comprising a digital memory programmable with different values to perform different computations responsive to respective different conditions; anda controller to selectively apply input data to the first processing core and the digital processing core.2. The device of claim 1 , wherein the digital memory of the digital processing core comprises a random access memory.3. The device of claim 2 , wherein the controller is to:program the digital memory with first values to perform a first computation; andprogram the digital memory with second values different from the first values to perform a second computation.4. The device of claim 3 , wherein the first and second computations are different matrix operations.5. The device of claim 4 , wherein the analog computation is a matrix operation involving a matrix programmed as values in resistive memory cells of the resistive memory array.6. The device of claim 2 , wherein the random access memory comprises a static random access memory or a dynamic random access memory.7. The device of claim 1 , wherein the digital processing core further comprises digital mathematical logic to perform a mathematical operation in a digital domain.8. The device of claim 1 , further comprising:a second processing core comprising a resistive memory array to perform an analog computation; anda storage medium to store machine-readable instructions that upon execution ...

Averaging modules

Examples disclosed herein relate to averaging modules. For example, a method may include obtaining, by an analog-to-digital converter (ADC), a plurality of samples of an input analog signal. The method may also include determining, by an averaging module, a sum value of the plurality of samples, such that a set of most significant bits of the sum value represent an average value of the plurality of samples. The method may further include determining the average value based at least on the set of most significant bits, and outputting the average value to a bus coupled to a memory module.

AUDIO DIGITAL SIGNAL PROCESSOR UTILIZING A HYBRID NETWORK ARCHITECTURE

A system and method executed by audio processing software on one or more electronic devices in a computer system to process digital audio signals. The system comprises a digitizer for digitizing a received audio signal; and processor for performing a plurality of audio processing functions on the digitized audio signals, each of the audio processing functions having at least one programmable parameter, and wherein each of the audio processing functions are categorized and grouped as audio objects, and organized into a channel strip, the channel strip processing digitized audio signals for a particular received audio signal, and wherein, the audio objects are fixed in order, so that the digitized received audio signals are processed by a predefined number of N audio objects, and wherein the N audio objects occur in a fixed sequence, and further wherein, the N audio objects comprise a first subset of non-exchangeable audio objects and a second subset of exchangeable audio objects, such that any one or more of the second subset of audio objects can be exchanged by a replacement audio object, and further wherein when the audio processing functions are programmed, they can be saved without compiling the audio processing software. 1. A method executed by audio processing software on one or more electronic devices in a computer system to process digital audio signals , the method comprising:digitizing a received audio signal; and the audio objects are fixed in order, so that the digitized received audio signals are processed by a predefined number of N audio objects, and wherein the N audio objects occur in a fixed sequence, and further wherein,', 'the N audio objects comprise a first subset of non-exchangeable audio objects and a second subset of exchangeable audio objects, such that any one or more of the second subset of audio objects can be exchanged by a replacement audio object, and further wherein when the audio processing functions are programmed, they can be saved ...

Real time cognitive reasoning using a circuit with varying confidence level alerts

Real time cognitive reasoning using a circuit with varying confidence level alerts including receiving a first set of data results and a second set of data results; transferring a first unit of charge from a first charge capacitor on the A-B circuit to a collection capacitor on the A-B circuit for each of the first set of data results that indicates a positive data point; transferring a second unit of charge from a second charge capacitor to the collection capacitor for each of the second set of data results that indicates a positive data point; and triggering a first sense amp on the A-B circuit if the charge on the collection capacitor exceeds a first charge threshold, indicating that the positive data points in the first set of data results is greater than the positive data points in the second set of data results to a first statistical significance with a first confidence level.

SYSTEMS AND METHODS FOR IMPROVING PERFORMANCE OF AN ANALOG PROCESSOR

In a hybrid computing system including at least one analog processor and at least one digital processor an embedded problem is repeatedly run or executed on the analog processor(s) to generate a first plurality of candidate solutions to the computational problem, the candidate solutions are returned to the digital processor(s) which determine a value for at least one statistical feature of the candidate solutions, at least one programmable parameter of the plurality of analog devices in the analog processor(s) is adjusted to at least partially compensate for deviations from an expected value of the at least one statistical feature, the expected value of the at least one statistical feature inferred from the structure of the embedded problem, the embedded problem is again repeatedly run or executed on the analog processor(s) to generate a second plurality of candidate solutions to the computational problem. 1. A method of operation of a hybrid computing system that comprises an analog processor and at least one digital processor , the analog processor and the at least one digital processor communicatively coupled to one another , the analog processor comprising a plurality of analog devices , the plurality of analog devices characterized by values of at least one programmable parameter , the at least one programmable parameter programmable by the at least one digital processor , the method comprising:embedding, by the at least one digital processor, a computational problem on the analog processor to generate an embedded problem;causing, by the at least one digital processor, a first repeated running of the embedded problem on the analog processor to generate a first plurality of candidate solutions to the computational problem;receiving, by the at least one digital processor, the first plurality of candidate solutions to the computational problem;determining, by the at least one digital processor, a value for at least one statistical feature of the first plurality of ...

Method and apparatus for sequential control of analogue signals

A method and apparatus are provided for managing a plurality of analogue signals for digital control. Analogue input signals received from a process are periodically sampled and converted to digital input signals for access by a digital control. Digital output signals produced by the digital control are converted to analogue output signals and stored for continuous availability to a controlled process. The sampling and conversion of analogue input signals as well as the conversion and storage of analogue output signals is conducted asynchronously relative to the activity of the digital control by a predetermined program of control signals repetitively produced in response to a clock signal.

Function transformer

A function transformer is disclosed in which apparatus is used to transform an input signal that may be, originally, either in analog or digital form, into an output signal that is a selectable nonlinear function of the input signal, thereby using electronic apparatus where, in previous systems, mechanical apparatus, such as motor-driven cam(s), are usually used for such transformation of input to output. Although mechanical cams could be used for effecting transformations as disclosed herein, the use of electronic apparatus to effect such transformations, provides for greater flexibility, lower cost, graeter speed of transfomation, and simplicity, where very complex, non-linear, transformations are desired to be effected between data input and data output. In applications where a potentiometer is to be used to convert an angular displacement of a mechanical rotating shaft to a voltage, and when different variation of output voltage with angular displacement is to be produced, the changing of the taper of the potentiometer can be greatly simplified and the time required to effect the change in taper can be greatly reduced by providing an electronic potentiometer with an easily changeable taper, in the form of a function transformer as disclosed herein. An apparatus is provided for transforming an analog input signal into an analog output signal that approximates the value of a preselected mathematical function of the analog input signal, by using electronic or electromechanical conversion devices and an electronic data storage device.

METHOD AND DEVICE FOR EVALUATING AN ANGLE ON AN EXTENDED RANGE

Voltage multiplier circuit

A voltage multiplier circuit includes a voltage-to-current converter, a current multiplier, and load devices. The voltage-to-current converter receives a differential input voltage, and produces a differential current. The differential current is received by the current multiplier, which produces a scaled output current. The amount of scaling is provided by a digital control word. Load devices produce a differential output voltage from the scaled output current. Multiple voltage-to-current converters and current multipliers can be coupled in parallel so that the scaled output currents sum.

Ic device

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Analog arithmetic device

Device for industrial process automatic control

"PROCESS CONTROL APPARATUS" includes two transducers for measuring two parameters of the process, and a memory unit to which the outputs from the transducers are fed. The memory unit produces an output dependent on the values of the two parameters, this output being binary, and being coupled to a counter which also receives clock pulses. The counter samples the memory unit output, and produces an output pulse when the clock pulse reading is equal to the sample reading. The output pulses are then used to control the process.

A device for converting two electrical quantities into a number of pulses proportional to the integral of their product

Semiconductor integrated circuit

Semiconductor device, semiconductor circuit having the device, correlation arithmetic device, signal converter, and signal processing system

캐패시터 수단의 한 단자들은 입력 신호의 정 또는 부 논리를 선택할 수 있는 제1스위치 수단을 거쳐 다입력 단자들에 접속되며, 캐패시터의 다른 단자들은 제2스위치를 거쳐 차동 입력/출력형 센스 증폭기의 제1차동 입력에 공통으로 접속된다. 캐패시터들의 공통 접속부는 차동 입력/출력형 센스 증폭기의 제2차동 입력에 접속되며, 제2차동 입력은 제1차동 입력의 극성에 반대되는 극성을 가져, 비트 수 증가에 기인한 회로 규모 증가를 억제하고 고속 산술 동작을 가능하게 한다.

Switched capacitor systems, methods and uses

Scanner system

Control of illumination with illumination amplifier devices provides a basis for implementing scanner systems. Illumination amplifiers in closed illumination servo loops provide improved illumination control. An illumination control system provides precise control of camera operations for photographic and photoplotter applications. Illumination amplifier devices are used in conjunction with electronic control circuits to provide flexibility and precision in camera systems, reducing reliance on prior art mechanical devices. Illumination control circuits are presented in the form of digital gates and flip-flops and in the form of analog computational elements to provide illumination computer systems. In addition, a batch fabricated illumination computer arrangement is presented for improved implementation of illumination control systems.

Illumination signal processing system

Control of illumination with illumination amplifier devices provides a basis for implementing various types of illumination systems. Also illumination amplifiers in closed illumination servo loops provide improved illumination control. An illumination control system provides precise control of camera operations for photographic and photoplotter applications. Illumination amplifier devices are used in conjunction with electronic control circuits to provide flexibility and precision in camera systems, reducing reliance on prior art mechanical devices. Illumination control circuits are presented in the form of digital gates and flip-flops and in the form of analog computational elements to provide illumination computer systems. In addition, a batch fabricated illumination computer arrangement is presented for improved implementation of illumination control systems. Illumination amplifiers are further configured for control of illumination in buildings and automobiles. Various types of devices such as windows, shutters, shades and visors are configured with illumination amplifiers to provide electronic control of illumination. Batch fabricated display arrangements are provided having an illumination source integral with an illumination amplifier for low cost, small volume, and flexibility. Also, colored display arrangements are provided for control of colors with illumination amplifier devices.

Semiconductor integrated circuit

Patent JPH0521246B2

Computational circuit

A computational circuit that includes a first capacitive coupling that connects a plurality of analog input voltages to a first inverter. The first inverter is connected to a second inverter through a connecting capacitance. A first feedback capacitance connects the output of the first inverter to its input, and a second feedback capacitance connects the output of the second inverter to its input. A first additional capacitance is operatively connected between ground and the first capacitive coupling, and a second additional capacitance is connected between ground and the connecting capacitance. The values of the first and second additional capacitances is selected such that the closed-loop gains of the first and second inverters are substantially equal.

Computational circuit

Addition is performed by a capacitive coupling or resistive coupling. A quantizing circuit is realized by plurality of thresholding circuits receiving an analog input voltages. Subtraction is performed by to MOSs of anti-polarity inputted analog input voltages to gates.

Computational circuit

A computational circuit which has a capacitive coupling for weighted addition. Addition is performed by the capacitive coupling. By connecting and disconnecting capacitances of the capacitive coupling, multiplication can be executed by changing the weights of the capacitors. An inverter with a feed back capacitance is connected to a computational circuit to improve the accuracy of the computation. Capacitances consist of unit capacitances of scattered distribution, so that the deviation of the capacities is minimized.

Semiconductor integrated circuit

Digital type waveform generating device

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D/a converter

내용 없음.

Generating system of analog waveform for simulation

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Patent SU414822A3

Transform processor system having reduced processing bandwith

An improved transform processing system reduces processing bandwidth with improved processor architectures and improved transform algorithms. A hierarchal arrangement facilitates use of the same coefficients for multiple transforms, particularly when the coefficients have not changed. A detector arrangement is provided for detecting a change condition and then causing the processor to bypass redundant processing operations.

Ic with processing circuit of digital and analogue signal

내용 없음. No content.

Multiplier circuit

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Analog operation unit

Method of evaluating the precision of cross-spectral density measurements of random noise

This invention relates to a method of measuring parameters of a nuclear reactor by noise measurements. Noise signals are developed by the detectors placed in the reactor core. The polarity coincidence between the noise signals is used to develop quantities from which various parameters of the reactor can be calculated.

Automatic memorisation of lengthy measurements - starts counter and transfers data to static memory cyclically

A measuring circuit (1) has an input (2) for the voltage from a detector (A) and is protected from overvoltages by diodes (10). The signal is integrated (3) to produce a sawtooth waveform, which is applied to a comparator (7) to produce an average value from the frequency of this output. The input is also applied to a comparator (11) with variable (12) reference level whose output is connected to an alarm (8) and to a gate (13) to allow clock (14) pulses to enter a decimal counter (15) representing time measurements. This data is sent to a memory stage (22) and the average value is passed by a counter (9) for further comparisons (27) before entry to the memory stage.

Integrated circuit with analog and digital portions and including thermal modelling

A hybrid monolithic IC (10) that is standardized for controlling various types of electrical equipment, such as circuit breakers, motor controllers and the like. The IC is a hybrid monolithic IC, fabricated in CMOS technology. The IC includes an on-board microprocessor (30), an A/D subsystem (64) and various input/output devices which make it adaptable for use in various types of electrical equipment. In order to improve the resolution of the A/D subsystem, circuitry is provided, which includes current and voltage ranging amplifiers (Fig. 53) for ranging analog input voltage and current signals and compensating internal offsets, in such amplifiers, inherent in CMOS linear circuits which can affect the accuracy of the least significant bit. Novel auto-zero circuitry (Figs. 36, 39, 40 and 41) is provided for controlling the offsets in the ranging amplifiers. An electrical overcurrent circuit (FIG. 86) provides both digital based modeling (FIG. 85A) and analog based modeling (FIG. 85A) of the temperature of an electrical conductor to simulate the conductor temperature during all expected operating conditions including a condition when electrical power is unavailable to the electrical overcurrent circuitry.

Multiplication and division circuit for analogue signals - has up down counter for adjusting multiplicand and divisor fed by square wave pulse generator

DIGITAL HIGH FREQUENCY SYNTHESIZER WITH APERIODIC CORRECTIONS OPTIMIZING SPECTRAL PURITY.

Le synthétiseur comprend : - un générateur 1 de signaux d'horloge de référence de fréquence Fc - un dispositif de calcul 2 qui à partir d'un incrément de fréquence du signal à synthétiser fournit d'une part, des impulsions de fréquence Fsj non corrigées décalées dans le temps par rapport au signal de fréquence Fs à synthétiser, d'une quantité DELTA T au plus égale à 1/F et d'autre part, un signal d'erreur de temps correspondant au décalage DELTA t et un circuit de correction 3, 4, 5, 6 qui est déclenché par chacune des impulsions de fréquence Fsj pour retarder le signal Fsj d'une durée maximale lorsque le signal d'erreur de temps est nul et d'une quantité égale à la durée maximale diminuée du décalage DELTA t indiqué par le signal d'erreur de temps. Application : émetteurs récepteurs en évasion de fréquence. (CF DESSIN DANS BOPI) The synthesizer comprises: - a generator 1 of reference clock signals of frequency Fc - a calculating device 2 which, from a frequency increment of the signal to be synthesized, supplies on the one hand, non-corrected frequency pulses Fsj offset in time with respect to the frequency signal Fs to be synthesized, by a quantity DELTA T at most equal to 1 / F and on the other hand, a time error signal corresponding to the offset DELTA t and a correction circuit 3, 4, 5, 6 which is triggered by each of the frequency pulses Fsj to delay the signal Fsj by a maximum duration when the time error signal is zero and by an amount equal to the maximum duration minus the offset DELTA t indicated by the time error signal. Application: transceivers in frequency escape. (CF DRAWING IN BOPI)

Patent FR2198190A1

COMPUTING CIRCUIT BY INDIRECT CONVERSION OF THE DIGITAL SIGNALS INTO AN ANALOGUE SIGNAL

Circuit de calcul par conversion indirecte de signaux numériques en un signal analogique. Ce circuit peut additionner, soustraire, multiplier et/ou diviser plusieurs signaux d'entrée numériques codés, modifiables, de signe arbitraire, à bits multiples, représentant des valeurs numériques pour convertir ces signaux en un seul signal de sortie analogique d'amplitude prédéterminée ayant une période fixe mais dont le cycle d'utilisation est proportionnel à la somme algébrique, au produit ou au quotient de ces signaux d'entrée. Cette opération est réalisée en utilisant la conversion indirecte numérique-analogique. Peut être utilisée dans tout système de traitement d'information. Calculation circuit by indirect conversion of digital signals into an analog signal. This circuit can add, subtract, multiply and / or divide several encoded, modifiable, arbitrary sign, multi-bit digital input signals representing digital values to convert these signals into a single analog output signal of predetermined amplitude having a fixed period but whose duty cycle is proportional to the algebraic sum, the product or the quotient of these input signals. This is done using indirect digital-to-analog conversion. Can be used in any information processing system.

Automatic device to calculate

DIGITAL FREQUENTIAL FILTER

Digital quotient meter with numerical readout - has coupled and compared counters for pulse generator

The meter is used in an automatic test and diagnostic equipment as a phase meter for ignition advance measurements and also as a tachometer. A control circuit receives two variable amplitude signals of which the quotient is required. A pulse generator has two pulse train outputs which are switched by the control circuit. The switches permit the pulses to increment two counters during respective time intervals. Pulses at the output of one counter increment a second counter and provide a reset to zero signal from a pulse generator. When the value of this count equals that of the other counter a comparator increments a fourth counter to give a count proportional to the quotient.

Patent FR2262793B1

Analogue to logarithmic numerical conversion circuit - is esp. for axial transverse tomography machine and includes comparator to control electronic gate between timer and counter

The circuit has an analogue voltage comparator (10), which controls an electronic gate (20) inserted between a timer (7) and a numerical counter (30). The counter (30) counts the number of pulses from the timer during the duration of the control signal from the gate (20). The circuit has a first input circuit which has a capacitor (2) which puts into memory or integrates the signal applied to its terminals. A first electronic switch (3) connects the source, of a first analogue signal during a first fixed period, to the capacitor (2) and to a third electronic switch (5). This switch (5) is connected in parallel with the capacitor (2) and discharges it during a third fixed period. The first input circuit has a second electronic switch (4). This switch connects during a second period, the capacitor (2) to a resistance (6) and to the first input (11) of the comparator (10). The second input (12) of the comparator (10) receives a second fixed or variable analogue signal. The output (13) of the comparator (10) provides a rectangular form control signal. The duration of this signal is proportional to the logarithm w.r.t. the first and second analogue signals.

Patent FR2205227A5

Apparatus for measuring the quotient

Patent FR2214394A5

Patent FR2165850A1

Patent FR1582355A

Calculating device

Patent FR2164732B1

Integration of acceleration to determine speed - is performed by integrator with comparators and counter circuits at output

The integral of a physical value such as acceleration from an accelerometer is determined to provide a numerical indication of speed. An input current (ie) is integrated by an operational amplifier (2) with feedback capacitor (3). The output voltage (Vs) is applied to two comparators (4, 5) to provide count and count down signals for two counters (6, 9). The second counter (9) is connected to a digital to analogue convertor (10) to provide threshold values for the comparators. It also provides signals to control switches (11, 12) which enable connexion of calibrated constant currents (7, 8) to the integrator and allow clock (13) pulses to be sent to the counters.

Apparatus for measuring the logarithmic decrement of an exponential function and its application to the measurement of blood flow by radioactive tracer

Patent FR2253923B1

Patent FR2259352B1

Automatic calculator

Patent FR2044828A1

Numerical encoder for angular position - compares trigonometric functions derived from input

The encoder is designed to furnish a numerical value THETA c representing an angular position of an analogue value corresponding to two input signals A sin THETA and A cos THETA and has a preadjustable means to provide analogue forms of trigonometric functions of predetermined angles THETA nc and to select one of the angles which is closest to THETA c. An assembly (19) works out sin (THETA-THETA c) from the input signals. Analogue means (20) works out cos (THETA-(THETA nc +- alpha)) from the input signals and the preadjustable means, alpha being a predetermined angle. Analogue means works out THETA c - THETA n c and determine K(THETA-THETA nc)cos(THETA-(THETA nc+-a)). The sin and cos functions are compared so as to control the incremented increase and decrease of a counter such that its output is zero.

Digital frequency multiplier

Electric power system simulator

An electric power system simulator comprising a first calculator which calculates a generator dynamic characteristic, a second calculator calculates a load dynamic characteristic and third calculator calculates the power transmission condition of an electric power system network. The first calculator cyclically obtains an amplitude and a phase of an internal induced voltage of the generator based on output power data and a terminal voltage of the generator. The second calculator calculates a load equivalent admittance at a predetermined time based on the data of an A.C. voltage at a load installation point. The third calculator calculates a current flowing in each element of the electric power system based on the respective data obtained by the first calculator and the second calculator and an electric power system network impedance whereby to obtain the output power and terminal voltage of the generator, whereby a condition change of the electric power system, including the generators, is serially simulated by alternately executing The calculations of the first, second and third calculators.

Improvements to multiplication devices

MULTI-FUNCTION DIGITAL-TO-ANALOG CONVERTER

CONVERTISSEUR NUMERIQUE-ANALOGIQUE DU TYPE A FONCTIONS MULTIPLES UTILISANT UN CIRCUIT A RESISTANCE DU TYPE A ECHELONS, POUVANT ASSURER D'AUTRES FONCTIONS MATHEMATIQUES EN PLUS DE LA CONVERSION NUMERIQUE-ANALOGIQUE ET COMPORTANT UN CIRCUIT DE RESISTANCES EN SERIE CONSTITUE PAR UN NOMBRE N DE RESISTANCES R2 A R2 AYANT CHACUNE UNE VALEUR DE RESISTANCE R ET RELIEES EN SERIE ENTRE UNE BORNE DE SORTIE V ET L'UN DES COTES D'UNE RESISTANCE D'EXTREMITE V AYANT UNE VALEUR DE RESISTANCE 2R ET RELIEE, PAR SON AUTRE COTE, A LA TERRE, CE CIRCUIT EN SERIE COMPRENANT UN POINT DE JONCTION DES RESISTANCES ENTRE CHAQUE COUPLE ADJACENT DE RESISTANCES VOISINES R2 A R2 ET MONTES EN PARALLELE AVEC ELLES, UN NOMBRE DE N GROUPES DE RESISTANCES PARALLELES O1 A ON, 11 A 1N, ... N1 A NN, LES N RESISTANCES DE CHACUN DE CES GROUPES ETANT TOUTES RELIEES D'UN COTE AU MEME POINT DE JONCTION DES RESISTANCES ET DIFFERENTS GROUPES DE CES RESISTANCES ETANT RELIES A DIFFERENTS POINTS DE JONCTION LE LONG DU CIRCUIT EN SERIE, LES N RESISTANCES DE CHAQUE GROUPE POUVANT ETRE COMMUTEES INDIVIDUELLEMENT PAR LEUR AUTRE COTE ALTERNATIVEMENT ENTRE LA TERRE ET UNE TENSION DE REFERENCE V AU MOYEN DE GROUPES CORRESPONDANTS DE CIRCUITS DE COMMUTATION S A S ... SN A SN SOUS L'ACTION DE SIGNAUX NUMERIQUES APPLIQUES. MULTI-FUNCTION-TYPE DIGITAL-ANALOGUE CONVERTER USING A STEP-TYPE RESISTANCE CIRCUIT, CAPABLE OF PROVIDING OTHER MATHEMATICAL FUNCTIONS IN ADDITION TO DIGITAL-ANALOGUE CONVERSION AND INCLUDING A SERIAL RESISTOR CIRCUIT CONSTITUTED BY NUMBER R2 A R2 EACH HAVING A RESISTANCE R VALUE AND CONNECTED IN SERIES BETWEEN AN OUTPUT TERMINAL V AND ONE OF THE SIDES OF AN END RESISTOR V HAVING A RESISTANCE VALUE 2R AND CONNECTED BY ITS OTHER SIDE TO EARTH , THIS CIRCUIT IN SERIES INCLUDING A JUNCTION POINT OF THE RESISTORS BETWEEN EACH ADJACENT COUPLE OF NEIGHBORING RESISTORS R2 TO R2 AND MOUNTED IN PARALLEL WITH THEM, A NUMBER OF N GROUPS OF PARALLEL RESISTORS O1 A ON, 11 A 1N, ... N1 A NN, THE ...

Scalar multiplier circuit

Method of determining the components of a verctor, and its applications

Patent FR2186127A5

Fluid velocity measurement system

Multiplication and exponential processing of analogue signals - integrating input signal over interval corresp. to signal magnitude

Procédé et dispositif pour la multiplication de signaux et leur élévation à une puissance. Il est formé un premier intervalle de temps T1 correspondant à la grandeur d'un signal d'entrée et il est effectué une intégration du signal d'entrée sur un deuxième intervalle de temps T2 qui est associé au premier intervalle de temps T1 suivant une fonction pré-donnee.

Patent FR2198190B1

Improvements to electronic calculators

Electric current and voltage meter

IC with digital and analog circuits and mixed signal I/O pins

An integrated circuit providing mixed signal processing. I/O pin interface circuits include logic gates and other circuits for processing digital and analog signals. Processor-controlled configuration circuits allow the various I/O pin interface circuits to process either analog or digital circuits. The I/O pins can be configured for digital or analog operation on the fly.

Patent JPH0343665B2

Electronic multiplier

Hybrid analog-digital matrix processors

Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.

Real-time correlator

In various circumstances, such as the recovery of a signal from a noisy background, two signals x(t) and y(t) are to be correlated. In this invention x(t) is sampled at recurrence period n/fo (n is at least 2). The samples are put into a recirculating memory of circulation time (n+1)fo with erasure of existing samples at point of insertion. The memory is coupled to a multiplier which multiplies the output of the memory with synchronized samples of y(t). The output of the multiplier is applied to an averaging memory. Only one multiplier is used to give the correlation function at n different time delays and hence greatly simplified apparatus is provided.

Neural network logic system

A novel neural network implementation for logic systems has been developed. The neural network can determine whether a particular logic system and knowledge base are self-consistent, which can be a difficult problem for more complex systems. Through neural network hardware using parallel computation, valid solutions may be found more rapidly than could be done with previous, software-based implementations. This neural network is particularly suited for use in large, real-time problems, such as in a real-time expert system for testing the consistency of a programmable process controller, for testing the consistency of an integrated circuit design, or for testing the consistency of an "expert system." This neural network may also be used as an "inference engine," i.e., to test the validity of a particular logical expression in the context of a given logic system and knowledge base, or to search for all valid solutions, or to search for valid solutions consistent with given truth values which have been "clamped" as true or false. The neural network may be used with many different types of logic systems: those based on conventional "truth table" logic, those based on a truth maintenance system, or many other types of logic systems. The "justifications" corresponding to a particular logic system and knowledge base may be permanently hard-wired by the manufacturer, or may be supplied by the user, either reversibly or irreversibly.

Patent JPS5430077B2

Projection display system

Projection display systems implemented with illumination amplifiers, such as liquid crystal devices, are provided. High intensity illumination is used to provide a high intensity large screen display. Heat transfer devices are used for removal of heat, which is caused by the high intensity illumination, from the illumination amplifier. The illumination amplifiers can be implemented in either transmissive or reflective modes. In a reflective mode, illumination is reflected from a front side and heat is removed from a back side of the illumination amplifier. Color is provided, such as generating multiple channels of different color images and projecting the different color images to generate a multi-colored image. Various system configurations are provided; such as a high intensity projection liquid crystal television system, a scoreboard display system, and a billboard display system.

Patent FR2170198B1

Integrator circuits

1466729 Integrating voltage DEFENCE SECRETARY OF STATE FOR 14 May 1975 [22 May 1974] 22962/74 Heading G1U A signal to be integrated is applied to a circuit 1 whereby the signal and its inverse are alternately applied to an analogue integrator 2 the output of which is compared to a reference voltage in one of a pair of comparators 3, 4 effective to switch the circuit 1 between inverting and non-inverting conditions. The number of such switching operations is counted by a counter 7 which thereby gives a digital indication of the integration. The counter may be connected to a D/A converter. Circuit 1 includes an inverting amplifier 8 and a non-inverting amplifier 9 of equal gain, the amplifiers being alternately connected to the integrating circuit 2 by switches 10, 11 controlled by a bi-stable circuit 12. The reference voltage applied to comparator 3 is more positive than that applied to comparator 4 so that one responds to the signal and the other to its inverse. The output of the comparators is applied to the bi-stable 12 and to the counter 7.

Integrated circuit

Device measuring electric energy consumption with sigma-delta converter with variable gain factor

Устройство для измерения расхода электроэнергии, содержащее по меньшей мере один преобразователь 20 сигма-дельта, приспособленный выдавать последовательность цифровых импульсов, цифровой счетчик 21 для суммирования выходного сигнала с преобразователя сигма-дельта и средство сигнализации для выдачи выходного сигнала 38 в момент достижения суммарным сигналом заданной величины, дополнительно содержит средство для цифровой регулировки усиления преобразователя сигма-дельта, содержащее цифровое программируемое запоминающее устройство 33 для хранения параметра, представляющего усиление счетчика, причем величина параметра может программироваться извне, и средство цифровой логики 32 для логического комбинирования параметра усиления с цифровой суммой, хранимой в средстве счета для определения количества импульсов, требуемого для достижения заранее заданной величины и выдачи выходного импульса.

Digital electrocardiogram waveform generator

.epsilon. ABSTRACT OF THE DISCLOSURE This invention is a system for generating electrocardiogram wave-forms which can be used for many purposes. The system provides a counter whose outputs are applied to a group of gates in different combinations. The outputs from the gates are applied to an integrating circuit which converts the pulse amplitude and the widths of the outputs from the gates into analog signals whose slopes depend upon the widths of the pulses applied to the integrator. Any type of cardiogram can be analyzed initially and broken into its components. These individual components and their sequence determine the connections from the outputs of the counter to the inputs of the gates.

METHOD AND DEVICE FOR EVALUATING AN ANGLE ON AN EXTENDED BEACH

PROCEDE ET DISPOSITIF POUR EVALUER UN ANGLE A CONNU PAR AU MOINS DEUX FONCTIONS TRIGONOMETRIQUES ET SUSCEPTIBLE D'EVOLUER SUR UNE PLAGE SUPERIEURE A 360. DEUX ENTIERS COMPTEURS N, N SONT MEMORISES ET REMIS A JOUR, L'UN PAR RAPPORT A L'AUTRE, EN FONCTION DE SIGNAUX INDICATEURS PAIR ET IMPAIR FC, FS. LA VALEUR DE L'ANGLE A, EXPRIMEE EN QUART DE TOURS, EST DONNEE PAR LE PREMIER OU LE SECOND ENTIER COMPTEUR EN FONCTION DE LA VALEUR DU SIGNAL INDICATEUR PAIR FC. METHOD AND DEVICE FOR EVALUATING AN ANGLE A KNOWN BY AT LEAST TWO TRIGONOMETRIC FUNCTIONS AND LIKELY TO CHANGE OVER A RANGE GREATER THAN 360. TWO ENTIRE COUNTERS N, N ARE STORED AND UPDATED, ONE WITH RESPECT TO THE OTHER, AS A FUNCTION OF EVEN AND ODD INDICATOR SIGNALS HR, FS. THE VALUE OF ANGLE A, EXPRESSED IN QUARTERS OF TURNS, IS GIVEN BY THE FIRST OR THE ENTIRE SECOND COUNTER DEPENDING ON THE VALUE OF THE EVEN FC INDICATOR SIGNAL.

Device, in particular multiplier, for electrical computers

Arrangement and method for coverting an analog voltage signal to a digital signal utilizing the absolute value of the analog signal

An arrangement for integrating an analog voltage signal and for converting it into a corresponding digital signal, whereby during a measuring cycle, the analog signal is fed via a comparator to a counting circuit, which to provide the time-related control of the operation of the counter is connected to a variable clock frequency generator device controlled by the analog signal. The comparator is connected to a "D"-flipflop, which is connected to an up-down counter with a digital-to-analog converter, on whose counting input is provided the Q-output of the variable clock frequency generator, which changes its clock frequency according to the absolute value of the voltage to be integrated.

Methods and apparatus for determining the thrust of a jet engine

Apparatus is known for determining gross thrust in jet engines by measuring various internal pressures, including measurement of total pressure at the nozzle entrance by means of an immersed probe. The immersed probe has a very short life when an afterburner is used in the engine. The apparatus for the invention is able to determine total pressure at the nozzle entrance, without an immersed probe, from the total pressure in the diffuser and the static pressure at the nozzle entrance. Another embodiment makes use of an additional static pressure in the flame-holder region. Also, the invention is for determining the gross thrust of an engine and it distinguishes between an engine with a nozzle operating in a choked condition and an unchoked condition.

Digital waveform generation using table look-up of simulated delta-sigma conversion data

A digital waveform generator (10) reads out simulated .DELTA..SIGMA. ADC dat a (40) for a desired periodic analog waveform from a memory (38) and converts it, using a low-resolution high speed DAC (50), into a synthesized analog waveform (54). The .DELTA..SIGMA. digital waveform generator is preferably designed to take advantage of the natural evolution of device technologies. The memory is fabricated with older technologies, which tend to be slower bu t have a much higher integration. The DAC is implemented in more recent technologies, which are faster but have less integration. A speed up buffer (44) or buffers in intermediate speed intermediate integration technologies may be included to provide a bridge between the low speed memory and the low integration DAC. As the current technologies become more well developed, and thus more integrated, and new higher speed technologies take their place, th e technologies for the various components will gradually change, but the architecture should remain viable and superior to the known digital generato rs.

Sine wave synthesizer

A sine wave synthesizer is employed in an analog signal processing integrated circuit. The circuit includes an integrator driven from a plurality of integration constant capacitors which are sequentially selected by a clocked decoder. Each capacitor is selected by coupling it between the integrator and a switched reference source. The capacitors are selected so that their sequential selection produces a sine wave approximating current in four increments. A first increment of a sine wave is produced according to an ascending selection of integration constant capacitors. Thereafter, the capacitors are selected in reverse in a descending manner to produce a second increment of the sine wave. The switched capacitor phasing circuit is then operated to invert the sine wave signal to produce the third and fourth increments having a negative instead of a positive excursion. The frequency of the sine wave is controlled by the decoder clock input. An output filter stage converts the digitally produced sine wave increments into a smooth sine wave output. This filter is provided with selectable time constants to allow operation at different selected frequencies.

Multiplication circuit for multiplying analog inputs by digital inputs

A multiplication circuit for multiplying an analog input by a digital input. The digital input has a plurality of bits. The circuit has a circuit input terminal for receiving the analog input and a circuit output terminal for outputting the results of multiplication of the analog input by the digital input. The circuit also has a plurality of capacitances and a plurality of switching devices.

Reduced current quadratic digital/analog converter with improved settling-time

A digital/analog quadratic converter (DACQ) composed by a pair of linear converters connected in cascade has a direct coupling of the output node of the first converter (DAC1) with a node of a R-2R type resistive network of the second converter (DAC2) corresponding to the LSB stage of the R-2R type resistive network. High impedance nodes, notably the input node of the second linear converter, are advantageously eliminated from the "current path" thus markedly reducing the problems of relatively long settling times of high impedance nodes (having intrinsically large parasitic capacitances associated therewith). The peculiar architecture of the quadratic converter provides also for a remarkable simplification of the circuit.

Potentiometer multiplier circuit, and an electrical energy meter including such a circuit

A circuit has two multiplier modules. Each multiplier module has at least one controllable potentiometer for adjusting the amplitude ratio between an output signal and an input signal of the module. The potentiometers have substantially identical characteristics and they are controlled in the same manner such that the amplitude ratios of the multiplier modules are substantially equal. One of the modules receives as its input signal the first signal to be multiplied and delivers an output signal that is proportional to the product of the two operands, while the other module receives as its input signal a reference voltage and as its output signal it delivers a feedback signal which is servo-controlled to a value that is approximately equal to the value of the second signal to be multiplied. The circuit is applicable to meters for electrical energy.

Notional condition quantity estimating device for vehicle

(57)【要約】本公報は電子出願前の出願データであるた め要約のデータは記録されません。

Sigma-delta multiplier circuit for power measurement equipment

功率测量装置被用于计算从网络中取得的实际功率的瞬时值，在该网络中电流及电压均为可变的，电压变化很小但到可察觉，电流以明显方式变化，因为它的有效值实质上确定功率，即如果从电网取得的电流有一定的强度，则获得了功率，而当电源实际为零时，从电网未取得功率。公开了一种用于功率或能量测量装置(P、W，30，40)的乘法电路。第一被测量(9)的模拟信号(u)被输入到第一Sigma-delta转换器(SDM1；10)，它的输出控制一个乘法器(20；20a，20b，20c，20d；21a，21b，22a，22b)。第二被测量(19)的模拟信号(i)被输入到乘法器(20)。乘法器(20)的输出提供给第二Sigma-Delta转换器(SDM2；30)，其输出端产生一个输出信号(p(t))，它代表第一及第二摸拟信号(u，i)的积的瞬时值，由此测量出功率。