DISPLAY DEVICE

25-01-2018 дата публикации
Номер:
KR1020180008954A
Принадлежит:
Контакты:
Номер заявки: 00-16-102089215
Дата заявки: 14-07-2016

[1]

The present invention refers to display device relates to, more particularly vapor to prevent a transparent substrate is opposed to the device are disclosed.

[2]

By indication device when a power display panel etc. need increased in various forms. Bulky cathode ray tube (Cathode Ray Tube: CRT) display device field as a substitute, for flat panel display device made of light-weight thin (Flat Panel Display Device: FPD) response from the rapidly to change. Flat panel display device is liquid crystal display device (Liquid Crystal Display Device: LCD), plasma display panel (Plasma Display Panel: PDP), organic light emitting display device (Organic Light Emitting Display Device: OLED), and electrically connected device etc. (Electrophoretic Display Device: ED).

[3]

One of the organic light emitting display device which is capable of self-luminous element and the speed of response is luminous efficiency, brightness and viewing angle fine powders disclosed. In particular, organic light emitting display device has a flexible point on a plastic substrate (flexible) selected from hydroxyl, inorganic electroluminescent (EL) display or plasma display panel (Plasma Display Panel) connected to the external video signal and an relatively little compared drivable, natural color or gold disclosed.

[4]

Number prepared by the organic light emitting display device plastic substrate is flexible plastic substrate a plurality of buffer layers are combined with each other. Process for preparing organic light emitting display device among a plurality of buffer layer is a lower number of ion diffusion from plastic substrate or impurities are shut off. In addition, a plurality of buffer layer is organic light emitting display device cast plastic substrate from the gate line servicing the deterioration of external moisture and organic light-emitting diode.

[5]

Buffer layer is a silicon oxide film (SiOx), silicon nitride (SiNx) layer structure consisting of or consisting of. However, silicon oxide film refractive index at the interface between the silicon nitride layer by the difference between the reflected light pressure drop with each other. In addition, oxide semiconductor having present when gate interlayer is formed in the diffusion oxide semiconductor electrical property is door number point at the disclosed. The, door number and solving the aforementioned buffer layer etc. for continued studies.

[6]

The purpose of the invention is forced by said points prior art door number if the invention, the plastic substrate occurs via a display device to prevent vapor [...] number are disclosed.

[7]

It is another object of the present invention prevent a pressure drop through the buffer number [...] a display device are disclosed.

[8]

It is another object of the present invention protects the thin film transistor is formed and a display device can be prevented [...] number are disclosed.

[9]

In order to achieve said purposes, one in the embodiment according to display device of the present invention includes a plastic substrate, number 1 buffer layer, thin film transistor and organic light emitting diode having a predetermined wavelength. Number 1 buffer layer is positioned on the plastic substrate, comprising at least two different density silicon oxide layer. Number 1 buffer layer is positioned on a thin film transistor, a thin film transistor organic light-emitting diode-coupled with each other.

[10]

Less number 1 number 1 buffer layer is a silicon oxide layer, a silicon oxide film comprises a silicon oxide layer such that relatively to number 1 number 2.

[11]

Number 1 number 2 silicon oxide film laminated by alternating silicon oxide film is formed.

[12]

At least one of the plastic substrate silicon oxide layer number 1 number 2 silicon oxide film adjacent substrate.

[13]

Wet etching silicon oxide film etching rate is number 1 number 2 wet etching silicon oxide film etching rate faster than disclosed.

[14]

BOE (1:20) etching solutions etch rate is number 1 wet etching silicon oxide film 12. 01 To 100. 00 Å / sec and, number 2 wet etching silicon oxide film etching rate is 8. 00 To 12. 00 Å / sec are disclosed.

[15]

Number 1 number 2 silicon oxide film silicon oxide layer gradually changing density in each film substrate.

[16]

Each consisting of silicon oxide layer thickness of the silicon oxide 1000mn number 1 number 2 to 5.

[17]

Number 1 silicon oxide film compressive stress value is -50 to -250 mpa and, number 2 silicon oxide film compressive stress value is to -1000 mpa -251 are disclosed.

[18]

Number 1 number 2 between thin film transistor buffer layer further comprises buffer layer.

[19]

Organic light emitting display device according to an embodiment of the present invention has a different density silicon oxide films by including the first conductive layer, the interface between a plastic substrate can be prevent buckling in body of water to prevent a penetration of the pin is.

[20]

In addition, organic light emitting display device according to an embodiment of the present invention single material by forming a silicon oxide buffer layer, light can be adjusted to a transparent refractive index difference according to copyright 2001.

[21]

In addition, organic light emitting display device according to an embodiment of the present invention gradually increasing or decreasing in number 1 number 2 silicon oxide film includes a silicon oxide layer by forming density gradient to yield a, silicon oxide layer is formed by etching silicon oxide layer number 1 number 2 increase is preventable disclosed.

[22]

Figure 1 shows a schematic diagram of the organic light emitting display device also blocks. Figure 2 shows a circuit configuration of a sub pixel also indicating example number 1. Figure 3 shows a circuit configuration of a sub pixel also indicating example number 2. Figure 4 shows a cross-section indicating the organic light emitting display device of the present invention number 1 in the embodiment according to also. Figure 8 shows a cross-section of the present invention indicating various also 5 also to the buffer layer. Figure 9 shows a cross-section indicating the organic light emitting display device of the present invention number 2 in the embodiment according to also. Figure 11 shows a cross-section of the present invention also utilize various structures to 10 and also indicating the buffer layer. Figure 12 shows a comparison example 1 substrate prepared by the number according also controlled measuring graph. Figure 13 shows a substrate prepared by the number also in the embodiment 1 according to controlled measuring graph. Figure 14 head toward 100% transmittance glass substrate, polyimide substrate and the buffer layer and the substrate according to various graph path. Figure 15 in the embodiment 3 according to example 5 and measure a current thin film transistor prepared by the number of graph comparing On/Off. Figure 16 6 according to comparison example images of a substrate. Figure 17 in the embodiment 4 according to the Image of the substrate.

[23]

Hereinafter, with reference to the drawing objects, a preferred embodiment of the present invention examples are described as follows. Throughout the specification the same reference number are substantially the same big components. The description hereinafter, the present invention specifically associated with publicly known technology or configuration description is the subject matter of invention can be judged that a breach of haze when, description and the V-shaped substrate. In addition, components which are used in the description hereinafter specification name may ease the TdSS are controlled by the one or more database comprised of, chamber number number article component name each of the disclosed.

[24]

The present invention according to display device display on a flexible plastic substrate part of the plastic display device are disclosed. Examples of the plastic display device, organic light emitting display device, liquid crystal display device, is used as the enabled device electrically connected, organic light emitting display device as an example in the present invention are described as follows. It is a child node number 1 and number 2 electrode it digs up and it is a cow [tu organic light emitting display device includes a light emitting layer comprises organic material. The, number 1 number 2 supplied from an electrode and the electrons supplied from an electrode in the emissive layer the electron hole pair (exciton) - combine in the exciton is formed, messenger by energy produced bottom light self-luminous display device back state are disclosed.

[25]

The present invention according to organic light emitting display device includes a top light emitted light is used to frontlit type pulse type and can lower rear view. In addition, the opaque rear view of organic light emitting display device from a light transparent display as applicable disclosed.

[26]

Hereinafter, with reference to the drawing objects, of the present invention in the embodiment describes the on-sensors other.

[27]

Figure 1 shows a schematic diagram of the organic light emitting display device also blocks degrees and, Figure 2 of a sub pixel circuit configuration example [...] indicating number 1, number 2 example Figure 3 indicating sub-pixel circuit arrangement are disclosed.

[28]

The reference also 1, organic light emitting display device is Image processing unit (10), timing number control unit (20), data driver (30), the gate driving unit (40) and display panel (50) comprises.

[29]

Image processing unit (10) is also together with a data signal supplied from the data enable signal (DE) (DATA) on outputs or the like. Image processing unit (10) includes a data enable signal (DE) in addition vertical synchronous signal, horizontal synchronizing signal and a clock signal output one or more signals are descriptions but omitting [...] shown substrate. Image processing unit (10) has a circuit board IC (Integrated Circuit) formed form.

[30]

Timing number control unit (20) includes Image processing unit (10) from data enable signal (DE) or vertical synchronous signal, horizontal synchronizing signal and a clock signal with a data signal including driving signal like LIFD (DATA).

[31]

Timing number control unit (20) a drive signal based on the gate driving unit (40) for timing the operation of gate timing number hu when it freezes (GDC) number data and drive (30) for the operation of timing data timing number (DDC) and outputs a number hu when it freezes. Timing number control unit (20) is formed in the form IC number to the circuit board.

[32]

Data driver (30) the TV receiver number control unit (20) in response to number hu when it freezes (DDC) number data timing supplied from the timing control section (20) for sampling a data signal that is supplied from (DATA) into voltage to gamma reference the latched outputs. Data driver (30) is a data signal over the data lines (DL1 - DLn) (DATA) and outputs a. Data driver (30) formed in the form of IC causes the circuit board.

[33]

The gate driving unit (40) the TV receiver number control unit (20) in response to a gate voltage supplied from the gate timing number hu when it freezes (GDC) 30 outputs a gate signal outputs. The gate driving unit (40) and outputs a gate signal through the gate lines (GL1 - GLm). The gate driving unit (40) is shaped in the form of IC circuit device substrate or display panel (50) (Gate In Panel) gate the panel which is formed manner.

[34]

Display panel (50) the data driver (30) driving unit (40) (DATA) supplied from the data signal corresponding to and gate signals to display an Image substrate. Display panel (50) comprises the first container sub-pixels (SP).

[35]

The reference 2 also, one sub-pixels switching transistor (SW), drive transistor (DR), and organic light-emitting diode (OLED) comprising the compensation circuit (CC). Organic light emitting diode (OLED) (DR) a drive transistor formed by the drive current provided to light emitting and operate.

[36]

Gate lines (GL1) number 1 (SW) is fed via the switching transistor gate signal in response to a data signal that is fed through data lines (DL1) number 1 is to be stored by the data voltage switching and operate. Drive transistor (DR) data stored in a capacitor voltage (VDD) between high and low potential power supply line (GND) power line according to the drive current is to flow in the substrate. Compensation circuit (CC) (DR) like a drive transistor threshold voltage for compensating circuit are disclosed. In addition, switching transistor (SW) (DR) of the drive transistor connected to a capacitor compensation circuit (CC) in an inner can.

[37]

Compensation circuit (CC) consists of one or more of the thin-film transistors and capacitors. Compensation circuit according to the configuration of the compensation method (CC) wide variety of bar, for the specific example described and dispensed to each other.

[38]

In addition, as shown in fig. 3, compensation circuit (CC) is included in addition to the complementary thin-film transistor of the sub-pixels when a particular signal or signal line for driving the power supply and power line more like multiple myelomas are included. Added signal line is sub-pixel number 1 - 2 comprising a compensation thin film transistor for driving gate lines (GL1b) can be defined. The added power line specifying a particular node for initializing sub pixel voltage initialization (INIT) power line can be defined. However this is not limited to only one example.

[39]

On the other hand, 2 and in Figure 3 is also one of sub-pixel compensation circuit (CC) is set to one example as polyester. However, subject of compensation data drive (30) is located outside of a sub pixel when compensation circuit (CC) such as may be omitted is disapproval. I.e., one of the subpixel essentially relates to a switching transistor (SW), drive transistor (DR), organic light emitting diode (OLED) (Transistor) a capacitor and including 2T of the tree but 1C (Capacitor), compensation circuit (CC) added when 3T 1C, 4T 2C, 5T 2C, 6T 2C, 7T 2C adapted or solid material may be filled.

[40]

In addition, compensation circuit is also 2 and in Figure 3 (SW) (CC) switching transistor and a drive transistor (DR) located between shown but, on organic light emitting diode (OLED) may be positioned between the can drive transistor (DR) disapproval. Compensation circuit (CC) also is not limited to the position of structure 2 are symmetrically 3.

[41]

The organic light emitting device of plastic provided on the substrate to utilize various structures to disclosure as follows.

[42]

<Number 1 in the embodiment>

[43]

Figure 4 shows a cross-sectional drawing and organic light emitting display device of the present invention number 1 in the embodiment according to also indicating, buffer layer 5 to Figure 8 of the present invention indicating various cross-section also are disclosed.

[44]

The reference also 4, organic light emitting display device of the present invention number 1 in the embodiment according to the top light has a light emitted frontlit type (DIS), thin film transistor (TFT) on a plastic substrate (PIS) organic light-emitting diode (OLED) on without using a tool. For example polyimide (Polyimide) plastic substrate (PIS) may be the substrate disclosed. The, organic light emitting display device (OLED) of the present invention has a flexible a (flexible) properties.

[45]

(PIS) and TFT (TFT) plastic substrate number 1 and number 2 buffer layer (BUF) between buffer layer (MSBL) located therein. Plastic substrate (PIS) impurity ion diffusion from number 1 buffer layer (MSBL) or interrupted, blocking external moisture could be bonded each other. Number 1 buffer layer (MSBL) at description below for details description is equal to carry. Number 1 number 2 on buffer layer (BUF) buffer layer (MSBL) located therein. A thin film transistor (BUF) number 2 buffer layer to prevent contaminated by impurities in the active layer, silicon oxide (SiOx) connected to the chamber. The buffer layer has a thickness of 1 to 3000 nm (BUF) number 2 can be made.

[46]

Said thin film transistor (TFT) using an active layer (ACT), (GAT) gate electrode, a source electrode and a drain electrode (DEL) (SEL) comprises. More carefully, number 2 (BUF) (ACT) active layer on the buffer layer is the lungs. (ACT) can be silicon semiconductor or an oxide semiconductor active layer. Silicon semiconductor amorphous silicon crystal can be polycrystalline silicon. Wherein, polycrystalline silicon is mobility and high (100 cm2/Vs or more), low in power consumption energy has excellent reliability, and/or multiplexer (MUX) in except a gate driver for driving element applied to thin film transistor can be applied to. On the other hand, can be cited as an example IGZO a semiconductor oxide such as zinc oxide semiconductor and, off - selected from current, signal from off (Off) (On) on which a time switching thin film transistor suitable. In addition, off current slow drive and/or low power consumption in small pixel voltage retention complete requiring suitable display device. The present invention refers to an oxide semiconductor active layer (ACT) and in which for example, not shown but comprises at least one channel (channel).

[47]

A gate insulating film (GI) active layer (ACT) is the lungs. A gate insulating film corresponding to the gate electrode insulating (GI) (GAT), silicon oxide (SiOx), silicon nitride (SiNx) or that a combustion chamber. (GI) (GAT) gate electrode on the gate insulating film is the lungs. Copper (Cu) gate electrode (GAT), molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), tantalum (Ta) and tungsten (W) alloy selected from the group consisting of one or both of either a single multilayer combustion chamber. (GI) (ACT) corresponding to the gate electrode of said active layer is positioned to each other. Gate electrode (GAT) (ILD) on the first oxide layer is the lungs.

[48]

The lower interlayer dielectric (ILD) (GAT) (ACT) corresponding to the gate electrode of insulating and active layer, silicon oxide (SiOx), silicon nitride (SiNx) or that a combustion chamber. In addition, interlayer dielectric (ILD) on both sides of the active layer (ACT), e.g. source region and the drain contact hole exposing (CH) are combined with each other. Interlayer dielectric (ILD) on the source electrode and drain electrodes (SEL) (DEL) is the lungs. A source electrode and drain electrodes and can be single layer or multilayer (SEL) (DEL), molybdenum (Mo) in the case where the single, aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) can be selected from the group consisting of one or both of alloy. In addition, source electrode and drain electrodes (DEL) (SEL) multilayer turned molybdenum/aluminum - neodymium, molybdenum/aluminum/molybdenum/aluminum or titanium/aluminum neodymium - 2 or oxidation-molybdenum, molybdenum/aluminum/molybdenum or titanium/aluminum/titanium 3 can be an oxidation-reduction property. The source electrode and drain electrodes (SEL) (DEL) is filled via interlayer dielectric (ILD) (CH) active layer (ACT) respectively connected with each other.

[49]

Thin film transistor (TFT) on the passivation layer (PAS) is the lungs. A thin film transistor (TFT) passivation silicon oxide (SiOx) in protecting the active (PAS), silicon nitride (SiNx) or that a combustion chamber. (PAS) (OC) on the passivation layer in accordance with the lungs. (OC) in accordance with the lower step is planarizing, photo acrylic (photo acryl), polyimide (polyimide), benzo gap claw issue [thin total resin (benzocyclobutene resin), acrylate resin (acrylate) such as can be made of organic material. (OC) has a source electrode (SEL) in accordance with a via hole exposing comprises (VIA).

[50]

On the other hand, said organic light emitting diode (OLED) in accordance with (OC) is located on the substrate. Organic light emitting diode (OLED) is number 1 (ANO) electrode, the organic light emitting layer (EML) and number 2 electrode comprises (CAT). More carefully, in accordance with number 1 (ANO) (OC) electrode located on the substrate. The detecting electrode number 1 (ANO) act, the source electrodes of the thin film transistor through a via hole (VIA) (SEL) (TFT) connected with each other. The ITO electrode number 1 (ANO) PMOS regions (Indium Tin Oxide), IZO (Indium Zinc Oxide) or ZnO (Zinc Oxide) before material such as transparency can be. A reflective electrode in the central electrode number 1 (ANO) for further comprises a reflective layer. The reflective layer (Al) aluminum, copper (Cu), is (Ag), nickel (Ni) or an alloy thereof can be made, preferably APC (is/palladium/copper alloy) can be made.

[51]

(ANO) number 1 electrode including a plastic substrate (PIS) pixels (BAN) compartment on the bank layer is the lungs. Bank layer (BAN) polyimide (polyimide), benzo gap claw issue [thin total resin (benzocyclobutene series resin), acrylate (acrylate) consisting of lamp of. The bank layer (BAN) exposing electrode number 1 (ANO) pixel definition part (OP) is the lungs. Bank layer (BAN) (OP) number 1 (ANO) pixel definition part is a contact to the organic light emitting layer (EML) electrode positioned substrate. The organic light emitting layer (EML) electron binding layer emit light, and the organic light emitting layer (EML) number 1 (ANO) comprising a chemical formula or hole injection layer between the electrode can be, comprising metal-containing fullerene or injecting layer on the organic light emitting layer (EML) can be.

[52]

(CAT) number 2 electrode on the organic light emitting layer (EML) is the lungs. The workfunction of the cathode electrode electrode number 2 (CAT) low magnesium (Mg), calcium (Ca), aluminum (Al), is (Ag) or an alloy thereof can be made. (CAT) number 2 electrode holes consisting of a jacket wall to electrode thinner.

[53]

On the other hand, the present invention refers to plastic substrate (PIS) ion diffusion from external moisture or impurities for blocking the blocking, plastic substrate (PIS) and TFT (TFT) number 1 between buffer layer (MSBL) with each other.

[54]

Number 1 in at least two other density (MSBL) buffer layer comprises silicon oxide. At least two other density silicon oxide layer comprises a silicon oxide film (SBL1) number 1 and number 2 (SBL2) silicon oxide film. Wherein, the silicon oxide film (SBL1) number 1 number 2 (SBL2) relatively low density silicon oxide film compared to the number of silicon oxide, a silicon oxide film is a silicon oxide film (SBL1) number 1 number 2 (SBL2) compared to relatively high density silicon oxide matrix.

[55]

Number 1 (SBL1) relatively low density (porous) mounting and the porous silicon oxide film by a goniophotometer. The porous silicon oxide film (SBL1) number 1 of compressive stress (compressive stress) membrane has less value. The compressive stress of the film compared to one radius of curvature when a flat films causing crack can withstand higher degree are disclosed. The radius of curvature is larger oppositely film compressive stress that can withstand without generating cracks when smaller degree are disclosed.

[56]

Plastic substrate (PIS) organic function layer in contact with the inorganic contact holes reaching greater value, buckling (buckling) by compressive stress between chemically inorganic film has a weight. Wherein, chemically inorganic film formed by stacking a buckling is internal stresses (built-a in stress) over a threshold point, stress release (stress release) (peeling) for films generated caused by cracks between produced by said substrate. Stress due to the small value of the present invention number 1 (SBL1) silicon oxide film, a silicon oxide film generated between a plastic substrate (PIS) and number 1 (SBL1) can be can be prevent buckling. Thus, the silicon oxide film of the present invention number 1 to -250 mpa -50 of compressive stress value (SBL1) may have. (Wherein (-) is a good indication as to you.)

[57]

A silicon oxide film (SBL2) number 2 (dense) exhibits relatively high density compact head. A silicon oxide film (SBL2) number 1 number 2 (SBL1) processes are performed since relatively incompressible dense silicon oxide film compared to higher stress value. The silicon oxide film (SBL2)-251 -1000 mpa of compressive stress value to number 2 may have. The, number 2 (SBL2) silicon oxide film is a silicon oxide film compared to prevent buckling relative property number 1 (SBL1) spaced apart substrate. However, silicon oxide film is a silicon oxide film (SBL1) number 1 number 2 (SBL2) compared to dense quality thus, preventing moisture permeable excellent disclosed. Thus, the silicon oxide film of the present invention number 2 (SBL2) to prevent a penetration of moisture from the outside can be.

[58]

In addition, a silicon oxide film (SBL1) number 1 and number 2 silicon oxide film etching processes are performed (SBL2) etching rate it is possible to differ. The porous silicon oxide film has a film quality number 1 and number 2 (SBL1) wet etching silicon oxide film etching rate is slowed down (SBL2) consist of quality has a wet etching etching rate disclosed. I.e., number 1 number 2 (SBL2) silicon oxide film is a silicon oxide film (SBL1) wet etching than etching rate disclosed. Wherein, wet etching the silicon oxide layer etching BOE etch rate etching solution (1:20) based on the reference, number 1 (SBL1) etching rate of wet etching on the silicon oxide film 12. 01 To 100. 00 Å / sec and, number 2 (SBL2) etching rate of wet etching on the silicon oxide film 8. 00 To 12. Implementation being 00 Å / sec.

[59]

Thickness of the buffer layer of the present invention number 1 (MSBL) 20 to 5000 nm can be made. Wherein, the plastic substrate with a silicon oxide film (SBL1) number 1 (PIS) buckling prevention and insulating film has a thickness of 5 to 1000 nm for serves as can be made. Number 2 silicon oxide film has a thickness of 5 to 1000 nm for blocking the ingress of moisture (SBL2) can be made. In one embodiment, the thickness of the silicon oxide film (SBL1) number 1 and number 2 (SBL2) each other such that the silicon oxide film can be formed. However number 1 and number 2 (SBL1) silicon oxide film of a silicon oxide film (SBL2) may be filled at different thicknesses depending upon the form.

[60]

The buffer layer of the present invention number 1 number 1 and number 2 (SBL1) (MSBL) silicon oxide film including silicon oxide film (SBL2), generated between a plastic substrate (PIS) can be can be to prevent a penetration of moisture and prevent buckling.

[61]

In one embodiment, the silicon oxide film (SBL1) number 1 and number 2 number 1 buffer layer (MSBL) (SBL2) is by alternating silicon oxide film can be stacked disclosed. As shown in fig. 5, the plastic substrate (PIS) buffer layer number 1 (MSBL) number 1 (SBL1) and located on silicon oxide film, a silicon oxide film on the silicon oxide film (SBL2) number 1 (SBL1) of its number 2 can be located. The, plastic substrate (PIS) number 1 (SBL1) can be prevent buckling is in contact with the silicon oxide film, a silicon oxide film (SBL2) number 2 through external or plastic substrate (PIS) can be blocks moisture penetration. In addition, as shown in also 6, number 1 (MSBL) buffer layer on a plastic substrate (PIS) number 1 number 1 and number 2 (SBL1) silicon oxide film located on silicon oxide film is a silicon oxide film (SBL1) (SBL2) located on silicon oxide film (SBL2) back to the number 1 number 2 (SBL1) structure formed by a silicon oxide film can be made. In addition, as shown in fig. 7, a silicon oxide film on a plastic substrate (PIS) buffer layer (MSBL) number 1 number 1 and number 2 (SBL1) located on silicon oxide film and silicon oxide film (SBL1) number 1 number 2 (SBL2) located on silicon oxide film and silicon oxide film (SBL2) back to the number 1 position (SBL1), silicon oxide film (SBL1) number 1 number 2 can be made as a structure formed by a silicon oxide film (SBL2) back on.

[62]

Alternatively described above, the buffer layer of the present invention number 1 number 1 and number 2 (MSBL) silicon oxide film (SBL1) stack of silicon oxide film (SBL2) dual inputting disapproval. In one embodiment, the 8 also reference, number 2 and number 2 on plastic substrate (PIS) silicon oxide film (SBL2) located on silicon oxide film is a silicon oxide film (SBL2) number 1 (SBL1) located, silicon oxide film (SBL1) number 1 number 2 on silicon oxide film located on silicon oxide film (SBL2) number 1 and number 2 (SBL2) silicon oxide film (SBL1) located disapproval. Number 1 in the buffer layer of the present invention in the embodiment shown and described hereinafter in layer 4 (MSBL) but, not limited to a silicon oxide film (SBL1) number 1 and number 2 (SBL2) silicon oxide film can be formed as layers of the alternating prefetch more.

[63]

The buffer layer of silicon oxide of the present invention number 1 (MSBL) consisting of single material. Buffer layer made from a different material layers laminated pends, laminated layers of reflection occurs at the interface between the refractive index difference optical loss occurs. The present invention refers to number 1 (MSBL) buffer layer of silicon oxide single material so that the different but density is, according to an optical refractive index difference can be, can be a transparent.

[64]

As aforementioned, organic light emitting display device of the present invention number 1 in the embodiment according to the first conductive layer including silicon oxide films by different density, in the interface between a plastic substrate can be prevent buckling of water to prevent a penetration of the pin is turned off.

[65]

In addition, organic light emitting display device of the present invention number 1 in the embodiment according to single material by forming a silicon oxide buffer layer, light can be adjusted to a transparent refractive index difference according to copyright 2001.

[66]

<Number 2 in the embodiment>

[67]

Figure 9 shows a cross-sectional drawing and organic light emitting display device of the present invention number 2 in the embodiment according to also indicating, buffer layer 10 and Figure 11 of the present invention indicating various cross-section also are disclosed.

[68]

The reference also 9, organic light emitting display device (DIS) is released at a lower rear view of the present invention number 2 in the embodiment according to a light emitting type, thin film transistor (TFT) on a plastic substrate (PIS) organic light-emitting diode (OLED) on without using a tool. For example polyimide (Polyimide) plastic substrate (PIS) may be the substrate disclosed. The, organic light emitting display device (OLED) of the present invention has a flexible a (flexible) properties.

[69]

(PIS) and TFT (TFT) plastic substrate number 1 and number 2 buffer layer (BUF) between buffer layer (MSBL) located therein. Plastic substrate (PIS) impurity ion diffusion from number 1 buffer layer (MSBL) or interrupted, blocking external moisture could be bonded each other. Number 1 buffer layer (MSBL) at description below for details description is equal to carry. Number 1 number 2 on buffer layer (BUF) buffer layer (MSBL) located therein. A thin film transistor (BUF) number 2 buffer layer to prevent contaminated by impurities in the active layer, silicon oxide (SiOx) connected to the chamber. The buffer layer has a thickness of 1 to 3000 nm (BUF) number 2 can be made.

[70]

Said thin film transistor (TFT) using an active layer (ACT), (GAT) gate electrode, a source electrode and a drain electrode (DEL) (SEL) comprises. More carefully, number 2 (BUF) (ACT) active layer located on the buffer layer, an active layer (ACT) a gate insulating film (GI) is the lungs. A gate insulating film (GI) (GAT) located on the gate electrode, gate electrode (GAT) (ILD) on the first oxide layer is the lungs. Interlayer dielectric (ILD) on both sides of the active layer (ACT), e.g. source region and the drain contact hole exposing (CH) are combined with each other. Interlayer dielectric (ILD) (SEL) (DEL) located within the source electrode on the drain electrode, interlayer dielectric (ILD) (CH) is filled through each active layer (ACT) connected with each other.

[71]

Thin film transistor (TFT) is arranged at a distance from, color filter on interlayer dielectric (ILD) (CF) is the lungs. An organic light emitting diode (OLED) is color filter (CF) emits light in a particular color white light converter. (CF) is a red color filter array with a red color filter, a green color filter is while a blue green pixel is a blue color filter is combined with each other. The in the embodiment shown and described only one pixel in the plasma, red, green or blue color can be one of a color filter. In accordance with the color filter (CF) (OC) on the lungs. (OC) has a source electrode (SEL) in accordance with a via hole exposing comprises (VIA).

[72]

On the other hand, organic light emitting diode (OLED) in accordance with (OC) is located on the substrate. Organic light emitting diode (OLED) is number 1 (ANO) electrode, the organic light emitting layer (EML) and number 2 electrode comprises (CAT). More carefully, in accordance with number 1 (ANO) (OC) electrode located on the substrate. The detecting electrode number 1 (ANO) act, the source electrodes of the thin film transistor through a via hole (VIA) (SEL) (TFT) connected with each other. The ITO electrode number 1 (ANO) PMOS regions (Indium Tin Oxide), IZO (Indium Zinc Oxide) or ZnO (Zinc Oxide) 4. transmission electrode made of materials before such as transparency.

[73]

(ANO) number 1 electrode including a plastic substrate (PIS) pixels (BAN) compartment on the bank layer is the lungs. The bank layer (BAN) exposing electrode number 1 (ANO) pixel definition part (OP) is the lungs. Bank layer (BAN) (OP) number 1 (ANO) pixel definition part is a contact to the organic light emitting layer (EML) electrode positioned substrate. The organic light emitting layer (EML) electron binding layer emit light, and the organic light emitting layer (EML) number 1 (ANO) comprising a chemical formula or hole injection layer between the electrode can be, comprising metal-containing fullerene or injecting layer on the organic light emitting layer (EML) can be.

[74]

(CAT) number 2 electrode on the organic light emitting layer (EML) is the lungs. The workfunction of the cathode electrode electrode number 2 (CAT) low magnesium (Mg), calcium (Ca), aluminum (Al), is (Ag) or an alloy thereof can be made. A reflective electrode number 2 (CAT) can be light-reflective electrode consisting of a jacket thickness.

[75]

On the other hand, the present invention refers to plastic substrate (PIS) ion diffusion from external moisture or impurities for blocking the blocking, plastic substrate (PIS) and TFT (TFT) number 1 between buffer layer (MSBL) with each other.

[76]

A silicon oxide film of the present invention number 2 in the embodiment according to number 1 and number 2 (SBL1) silicon oxide film (SBL2) including number 1 (MSBL) on the aforementioned number 1 in the embodiment are the same feature of the buffer layer. For example, a silicon oxide film (SBL1) number 1 indicates a relatively low density and the porous (porous) mounting, by having a small compressive stress value generated between a plastic substrate (PIS) and silicon oxide (SBL1) number 1 can be can be prevent buckling. Number 2 (SBL2) relatively high density silicon oxide film dense (dense) to prevent a penetration of moisture from the outside can be represented head. Wet etching of the silicon oxide film etching rate number 1 (SBL1) 12. 01 To 100. 00 Å / sec and, number 2 (SBL2) etching rate of wet etching on the silicon oxide film 8. 00 To 12. Implementation being 00 Å / sec. Number 1 and number 2 silicon oxide film has a thickness of 5 to 1000 nm silicon oxide film (SBL2) (SBL1) respectively can be made. The number 1 and number 2 (SBL1) silicon oxide buffer layer (MSBL) number 1 (SBL2) is by alternating silicon oxide film can be stacked disclosed. Number 1 buffer layer (MSBL) silicon nitride single material so that, according to an optical refractive index difference can be, can be a transparent.

[77]

On the other hand, progressively increasing or decreasing buffer layer of the present invention number 2 in the embodiment according to number 1 (MSBL) have a density gradient.

[78]

10 Also reference surface, plastic substrate (PIS) number 1 and number 2 (SBL2) located on silicon oxide film (SBL1) silicon oxide film (PIS) away from the plastic substrate consisting of progressively increasing density gradient. Number 1 number 2 (SBL2) lower in density than the silicon oxide film (SBL1) relatively low since the silicon oxide film, a silicon oxide film (SBL1) from plastic substrate (PIS) number 1 through number 2 on top of silicon oxide film (SBL2) consisting of an incrementally increasing until the density gradient. Number 1 and number 2 silicon oxide film (SBL1) the density of the silicon oxide film deposition process SiH (SBL2) silicon oxide film4 To control or reduce power while increasing the amount of gas can be increasing or decreasing. For example, number 1 (SBL1) SiH in deposition conditions of silicon oxide film4 Incrementally adjusted while reducing the amount of power gradually, progressively increasing density gradient of number 1 (SBL1) silicon oxide film can be formed.

[79]

And, a silicon oxide film (SBL1) number 1 and number 2 silicon oxide film (SBL2) the one group, each group progressively increasing in density gradient direction domains. As also shown in 10, plastic substrate (PIS) located directly above the number 1 and number 1 and number 2 (SBL2) group (SBL1) silicon oxide film is a silicon oxide film, a silicon oxide film (SBL1) located thereon number 1 and number 2 (SBL2) the silicon oxide film can be group number 2. These group number 1 number 2 group within each group density gradient increases progressively pushes the substrate.

[80]

While, the reference also 11, number 2 (SBL2) is located directly on a plastic substrate (PIS) silicon oxide film, a silicon oxide film on the silicon oxide film by a number 1 number 2 (SBL2) (SBL1) when, plastic substrate (PIS) away from decreases progressively density gradient consisting of. The silicon oxide film (SBL2) number 1 number 2 (SBL1) relatively lower in density than a high silicon oxide film, a silicon oxide film (SBL2) number 1 through number 2 from plastic substrate (PIS) on top of a silicon oxide film (SBL1) decreases progressively until the density gradient consisting of. 10 As well as the aforementioned hole are, one group of number 1 and number 2 (SBL2) silicon oxide film is a silicon oxide film (SBL1), decreases progressively density gradient in each group to the Optocomponents.

[81]

Number 1 and number 2 of the present invention number 2 in the embodiment in silicon oxide film (SBL1) (SBL2) gradually increasing or decreasing the density of the silicon oxide film are formed and then gradient to yield, number 1 and number 2 (SBL2) silicon oxide film (SBL1) silicon oxide film can be formed continuously...copyright 2001 can increase productivity.

[82]

In addition, organic light emitting display device of the present invention number 2 in the embodiment according to the first conductive layer including silicon oxide films by different density, in the interface between a plastic substrate can be prevent buckling of water to prevent a penetration of the pin is turned off. In addition, organic light emitting display device of the present invention number 2 in the embodiment according to single material by forming a silicon oxide buffer layer, light can be adjusted to a transparent refractive index difference according to copyright 2001.

[83]

Hereinafter, a buffer layer of the present invention the above-mentioned experiment in which code to less than 1000. But, in the embodiment of the present invention disclosure for the experiments testing the present invention limited to the one provided to one and not the.

[84]

Experiment 1: Buffer layer Measuring the water vapor permeability

[85]

Comparison example 1><

[86]

Polyimide (PI) 2000 Å on-gate silicon oxide film and cleaning. Ear 2000 Å-gate silicon oxide film and cleaning. Next 3000 Å of stacked-gate silicon oxide layer. The, silicon oxide film has a density of all his high pressure liquid coolant to the same number.

[87]

<In the embodiment 1>

[88]

Polyimide (PI) number 1 number 2 of 1000 Å on the substrate are patterned-gate silicon oxide layer of 1000 Å silicon oxide film continuous cleaning. Next 1000 Å of silicon oxide layer number 1 number 2 are patterned-gate silicon oxide layer of 1000 Å continuous cleaning. The silicon oxide film on-gate 3000 Å. Wherein, silicon oxide film is formed to have a relatively low number number 1 number 2 silicon oxide film contrast density high pressure liquid coolant, the aforementioned silicon oxide film is formed to have the same density number 3000 Å comparison example 1 was high pressure liquid coolant.

[89]

In the embodiment 1 and comparison example 1 according to the aforementioned water vapor permeability (WVTR; Water Vapor Transmission Rate) determined the number of produced therewith. Comparison example 1 was controlled substrate prepared by the number 12 also diagram according shown, also shown in the embodiment 1 according to controlled diagram substrate prepared by the number 13.

[90]

The reference also 12, all have a same density comparison example 1 is about 1 stacked silicon having a water vapor permeability. 3 × 10-2 G/m2day appeared to. Also while the reference 13, relatively high density silicon oxide layer having a water vapor permeability is about 3 stacked by alternating low silicon oxide film in the embodiment 1. 0 × 10-7 G/m2day hereinafter to foods. Through the result, different density in the embodiment 1 layer to form the silicon oxide layer is to prevent a penetration of moisture can be can be proven unworkable. Thus, the present invention refers to density stacked with other silicon oxide buffer layer, to prevent a penetration of moisture can be.

[91]

Experiment 2: Buffer layer Structure according to substrate permeability measurement

[92]

Glass (glass) substrate of the mirror head toward 100% transmittance, polyimide substrate and buffer layer 14 according to various and normalized to measure substrate to table 1 and to also shown.

[93]

Common layerNumber 1 layerNumber 2 layerNumber 3 layerNumber 4 layerRelative transmittance (%)
Comparison example 2Polyimide substrate 10 micro mSiNx1000 ÅSiO2 1000 ÅSiNx1000 ÅSiO2 3000 Å86
Comparison example 3SiO2 1000 ÅSiNx1000 ÅSiO2 3000 Å-90
Comparison example 4SiNx1000 ÅSiO2 1000 ÅSiO2 3000 Å-92
In the embodiment 2SiO2 3000 Å-94
Polyimide substrate-91
A glass substrate-100

[94]

the reference table 1, based on the 100% transmittance of a glass substrate, the polyimide substrate mistletoe a transmittance of 91%. Polyimide substrate/silicon nitride/silicon oxide/silicon nitride layer 4 comparison example 2 substrate is laminated by alternating mistletoe a transmittance of 86%. A silicon oxide film/silicon nitride/silicon layer on the polyimide substrate 3 comparison example 3 substrate is laminated by alternating mistletoe a transmittance of 90%. A silicon oxide film/silicon/silicon nitride polyimide substrate layer 3 comparison example 4 substrate is laminated by alternating mistletoe a transmittance of 92%. Polyimide substrate stacked on a silicon oxide film monolayer in the embodiment 2 substrate is 94% transmittance of mistletoe.

[95]

Through the result, according to these rate when stacked by alternating silicon nitride silicon heating element can be an indirectly-pressure drop occurs. In addition, the waste of refraction when stacked monolayer silicon oxide film to a very good light transmittance can be boosted. Thus, the present invention refers to a single composite with silicon oxide buffer layer, can be a transparent.

[96]

Experiment 3: Buffer layer According to structure Thin film transistor Characteristic measuring

[97]

5><Comparison example

[98]

Polyimide substrate silicon oxide film and on 1000 Å, 1000 Å of depositing the silicon nitride film, silicon oxide film and 1000 Å, 1000 Å layers of silicon nitride, silicon oxide layer is 3000 Å percent buffer layer. Ear, buffer layer including thin film transistor IGZO active layer number on his high pressure liquid coolant.

[99]

<In the embodiment 3>

[100]

The same conditions described in the embodiment 1, 3000 Å IGZO active layer including silicon oxide layer on the thin film transistor number was high pressure liquid coolant.

[101]

The aforementioned comparison example 5 and 15 shown in the embodiment 3 according to the current thin film transistor prepared by the number On/Off also.

[102]

The reference 15 also, comparison example 5 thin film transistor prepared by the number according to the size of the normal range beyond current On/Off appears to point, while, in the embodiment 3 according to the thin film transistor prepared by the number On/Off current exhibit normal can be know.

[103]

Through the result, H2 gas existing in the silicon nitride buffer layer are included silicon nitride active layer diffuse into IGZO, carrier concentration varies in the conductors in the channels to be darker On takes place can be know. While, not present in the buffer layer is a silicon nitride passivation layer IGZO conductor takes place not to be coated. Thus, the present invention refers to by only a silicon oxide film as a buffer layer, a top layer on the active layer conductor can be prevent.

[104]

Experiment 4: Buffer layer According to structure Buckling Observation

[105]

Comparison example 6><

[106]

PET substrate is formed on the support film polyimide (PI), polyimide substrate 2000 Å on-gate silicon oxide film and cleaning. Ear 2000 Å-gate silicon oxide film and cleaning. The 3000 Å silicon oxide layers of PET support film and the right. The, silicon oxide film has a density of all his high pressure liquid coolant to the same number.

[107]

<In the embodiment 4>

[108]

PET substrate is formed on the support film polyimide (PI), polyimide substrate number 1 number 2 continuous patterned-gate silicon oxide layer of 1000 Å silicon oxide film of 1000 Å on cleaning. Number 1 number 2 continuous patterned silicon oxide layer of 1000 Å silicon oxide film of 1000 Å then cleaning-gate. The silicon oxide film on-gate 3000 Å. Wherein, silicon oxide film is formed to have a relatively low number number 1 number 2 silicon oxide film contrast density high pressure liquid coolant, the aforementioned silicon oxide film is formed to have the same density number 3000 Å comparison example 6 was high pressure liquid coolant.

[109]

The aforementioned comparison example 6 and in the embodiment 4 according to the PET support film substrate prepared by the number 10 is a stand-alone in the room number uppermost shelf substrate after observed. Comparison example 6 according to the Image of the substrate also has been shown 16, also shown in the embodiment 4 according to the Image of the substrate 17.

[110]

The reference 16 and 17 also also, comparison example 6 buckling occurs but the number prepared by the substrate, the substrate is prepared by the number in the embodiment 4 according not buckling occurs.

[111]

Through the result, 2 sheets of PET support formed between the neutral surface (neutral plane) is formed multilayer silicon oxide film, silicon oxide film under the influence of stress is not expressed. However, PET support film number when volatile silicon oxide film for the silicon oxide layer at the interface between the polyimide substrate strong compressive stress (compress stress) is expressed were that of a buckling occurs. Thus, the present invention refers to a silicon oxide film is formed by a relatively low density porous film, silicon oxide film stress value increases to polyimide with pin can be generated between a silicon oxide film can be prevent buckling.

[112]

As aforementioned, organic light emitting display device according to an embodiment of the present invention includes a first conductive layer including silicon oxide films by different density, in the interface between a plastic substrate can be prevent buckling of water to prevent a penetration of the pin is turned off.

[113]

In addition, organic light emitting display device according to an embodiment of the present invention single material by forming a silicon oxide buffer layer, light can be adjusted to a transparent refractive index difference according to copyright 2001.

[114]

In addition, organic light emitting display device according to an embodiment of the present invention gradually increasing or decreasing in number 1 number 2 silicon oxide film includes a silicon oxide layer by forming density gradient to yield a, silicon oxide layer is formed by etching silicon oxide layer number 1 number 2 increase is preventable disclosed.

[115]

Or more of the present invention in the embodiment described with reference to the attached drawing but, the present invention is the technical configuration of the present invention the above-described technical idea of the present invention belongs or essential characteristics and is one skilled art without changing other specific embodiment can form can be understand are disclosed. The exemplary embodiment described above examples in all of which it will not definitive provided should. In addition, description of the present invention range represented by said claim rather than carry vehicle from the outside. In addition, the meaning of the claim of the present invention derived from equivalent general outline all the modification or modified form thereof and range range should interpreted.

[116]

PIS: plastic substrate MSBL: number 1 buffer layer SBL1: number 1 silicon oxide film SBL2: number 2 silicon oxide film BUF: number 2 buffer layer TFT: thin film transistor PAS: passivation film OC: overcoat layer ANO: number 1 electrode EML: light emitting layer CAT: number 2 electrode OLED: organic light emitting diode DIS: display device.



[1]

According to an embodiment of the present invention, a display device comprises a plastic substrate, a first buffer layer, a thin film transistor, and an organic light emitting diode. The first buffer layer is located on the plastic substrate and includes at least two silicone oxide films having different density. The thin film transistor is located on the first buffer layer and the organic light emitting diode is connected to the thin film transistor. Therefore, the display device can prevent electrical features of the thin film transistor from being lowered.

[2]

COPYRIGHT KIPO 2018

[3]



Plastic substrate; is positioned on said plastic substrate, at least two other density silicon oxide layer including number 1 buffer layer; said number 1 buffer layer located on a thin film transistor; and said display device including a thin film transistor which is connected to the organic light-emitting diode.

According to Claim 1, said number 1 number 1 and less buffer layer is a silicon oxide layer, a silicon oxide film including silicon oxide layer such that display device relatively to said number 1 number 2.

According to Claim 2, said number 2 silicon oxide film is formed by alternating said number 1 silicon oxide film stacked display device.

According to Claim 2, said number 1 adjacent to the display device at least one of the silicon oxide film silicon oxide layer said number 2 said plastic substrate.

According to Claim 2, said number 1 wet etching silicon oxide film etching rate is faster display device said number 2 wet etching silicon oxide film etching rate.

According to Claim 5, BOE (1:20) said number 1 wet etching silicon oxide film etching solutions etch rate is 12. 01 To 100. 00 Å / sec and, said number 2 wet etching silicon oxide film etching rate is 8. 00 To 12. 00 Å / sec in display device.

According to Claim 2, silicon oxide film is formed in each film density gradually changing said number 2 said number 1 silicon oxide film display device.

According to Claim 2, said number 1 to 5 each silicon oxide layer thickness of the silicon oxide 1000mn said number 2 the display device.

According to Claim 2, said number 1 silicon oxide film compressive stress value is -50 to -250 mpa and, said number 2 silicon oxide film compressive stress value is -251 to -1000 mpa in display device.

According to Claim 1, said buffer layer further including said number 1 number 2 buffer layer between the thin film transistor display device.