LIQUID DISPLAY DEVICE
Relates to the present invention refers to liquid crystal display device. The present invention refers to liquid crystal display device is provided to device for driving, in particular horizontal crosstalk device display the cover relates to device for driving. General liquid crystal display device two array panel therebetween that dielectric anisotropy liquid crystal layer including an (dielectric anisotropy). And applying an electrical field liquid crystal layer, is electric field to the pixel layer covers of the light passing through the by the TFT obtain a desired Image. The liquid crystal device a easily-portable and flat panel display device (flat panel display, FPD) as representative in, is, among other things, thin film transistor (thin film transistor, TFT) switching device using primarily either TFT-LCD. used. At this time, liquid crystal connected to the primary coil take place the characteristic degradation application long, to prevent this the applied voltage polarity of a data driver-period period, same polarity inversion driving method is:a buffer. Polarity inversion driving method the-frame inversion, line shift, column shift, is dot inversion driving method, a polarity of the data voltage applied to of rows of the pixels differently, a dot inversion driving method is defined, for example, an error pixel input part selects a desired broadcasting signal are used generally. On the other hand, liquid crystal display device for brightness enhancing of in color filter layer transparent region, including pixel RGBW been structure is proposed, in pixel structure RGBW 2 used is high, typically at dot inversion method of wet liquid to flow down. The, RGBW 2 in pixel structure when the mother pipe having a dot inversion method, neighboring column direction different configurations width of shading members between pixels is a plurality of data ICs are. the problem is. Furthermore, insulating substrate number 2 dielectric substrate and the number 1 the gate 124,120a parasitic capacitance with the pixel electrode and line generated by a kickback voltage (Vkb) .the clamping circuit performs the clamping when a local. The present purpose of the invention the a plurality of data ICs are stain and voltage level and guides light ohmic contact layer is the liquid crystal display is applied electrode 104 is provided under the device. According to an embodiment of the present invention for solving the above problem the liquid crystal display device a plurality of gate line may be insulated and said plurality of gate lines and data lines cross; and said said plurality of gate lines, the data line, and the plurality of data lines includes a plurality of unit pixels, having a plurality of unit pixels a pixel number 1 a column 1 row 1, pixel number 2 a column 2 row 1, pixel number 3 a column 1 row 2, column 2 row 2 and a and including the pixel of number 4, said number 2 and said number 3 source and drain is connected to the number 1 between pixels between the pixel said number 4 source and drain is connected to the gate lines number 1 number 2 is disposed side-by-side gate line, a black matrix gate line said number 1 different pixel said number 3 pixel and said number 1 each in a row is coupled to a mechanical, said number 2 gate line each in a row different a black matrix it is connected,[...] said number 2 pixel and said number 4 is connected. Neighboring to one another in a column direction outside the gate electrode gate said number 1 which are interconnected, said number 2 neighboring to one another in a column direction gate the gate electrode can be connected to one another at out. Said transmission areas corresponding to the light focusing the plurality of data lines is arranged next to a plurality of pixel is disposed between and, row a plurality of pixel arranged in the direction positive (+) and negative polarity (-) may have alternately. said second DAC converts high-scale as a negative polarity voltage (+) and (-) the plurality of data lines of the data voltage applied to, with a polar data voltage can be opposite. Said heat plurality of data lines arranged in the direction a plurality of pixel and may be connected to alternately zigzag-type multi nozzle. Said row direction and direction that is oriented below in the stomach, a picture corresponding a left said mandrel in a direction towards the filter function and a viewing angle compensation means can be. Said intersecting one another with the source electrodes on the basis said gate lines said data line can be bounded by. Said number 1 are pixels color display red pixel, said number 2 are pixels color display of green pixel, blue pixel said number 3 are pixels color display, white, pixel said number 4 can be pixel color display. Said plurality of pixel number 1 number 2 and sub-pixel electrode may include a sub-pixel electrode. Said number 2 gate line gate lines said number 1 said number 1 sub-pixel electrode and said number 2 sub-pixel electrode can be disposed side-by-side in between. Said number 1 number 1 which are in communication with the sub-pixel electrode thin film transistor; said number 2 number 2 which are in communication with the sub-pixel electrode thin film transistor; and reference thin film transistor and said number 2, the data line, and the omitted number 3 may comprise an thin film transistor. Said number 1 to number 3 a thin film transistor gate electrode, semiconductor layer, source electrode, and the drain electrode and, said number 1 and number 2 said drain electrode the contact sub-pixel electrode may be connected to through the aperture. Said number 1 thin film transistor, said number 2 thin film transistor, and said said number 3 a thin film transistor or gate said number 1 gate line said number 2. may be positioned above. Contact with said said number 1 and number 2 sub-pixel number 2 and said number 1 gate lines can be placed between the electrodes. Said number 1 thin film transistor, said number 2 thin film transistor, said said number 3 thin film transistor, said number 2 and said number 1 contact with said gate lines can be disposed between the gate line. Said number 1 thin film transistor, said number 2 thin film transistor, said said number 3 thin film transistor, and contact with said can be disposed side-by-side horizontal direction. Constitution of the present invention a is from 600 to 3,000 in terms in addition, other aspects and advantages of the present invention are hereinafter described in or, from a description and such techniques in the present invention is in the field of the person with skill in the art can be understood clearly to 2000. According to the present invention than that of the second body the following.. The present invention refers to a disposed side-by-side in pixel region gate lines are disposed as a number 1 and number 2, number 1 and number 2 column direction each gate line different from the pixels adjacent to each other and simultaneously connects in a row, number 1 gate line neighboring transmission areas corresponding to the light focusing is coupled to a mechanical one pixel, number 2 gate line neighboring transmission areas corresponding to the light focusing so as to thereby pixels the other, in a row direction an inter-pixel width of shading members free from uneven inversed the formation of the, switching element of terminals are generated by the parasitic capacitance in a kickback voltage capable of improving quality.. The present invention refers to number 1 thin film transistor, thin film transistor number 2, number 3 thin film transistor, and contact hole by, arranged serially in the horizon, width keep ink for forming the color filters of the first ng the pull-up, parasitic drain electrodes gate lines can be insulating. Even out, , examples of the present invention embodiment through another aspects and advantages of the present invention to grasp first code may still be is. Figure 1 shows a one embodiment of the present invention also: an signal wiring and for aligning pixel is of general outline. Also Figure 2 shows a one embodiment of the present invention: an LCD of the device. a circuit regard to either one of a brightness. Figure 3 shows a one embodiment of the present invention also: an LCD is the plane unit pixel of device. Figure 4 shows a IV-IV and to short a structure of the light with improved brightness to is cross-sectional drawing of Figure 3. Figure 5 shows a V-V along a light with improved brightness to is cross-sectional drawing of Figure 3. One embodiment of the present invention: an LCD also Figure 6 shows a device of the electric field generating electrode of the is plane shown in the basic region. Figure 7 shows a other embodiment of the present invention also: an LCD is the plane unit pixel of device. Figure 8 shows a signal wiring and also of the present invention: an compared is general outline of for aligning pixel. Number 9 of the present invention compared the: an LCD device is for unit pixel of plane view. Figure 10 shows a device of the present invention also: an LCD compared representing unevenness INT1-INT5. surface thereof, and the. Figure 11 shows a device of the present invention also: an LCD compared kickback voltage account for deviation of. plane from the. Then with reference to a drawing based on a text content of the focuses of the present invention embodiment in the present invention is in the field of the person with skill in the art easily embodiment. as further described can be. However the present invention refers to variety of different is embodied in the form described where can be embodiment aspect is not limited. In drawing where the different layers and area of a porous ceramic so that its wall thickness for securely presenting showed thus expanding the. Specification similar parts throughout the drawing the same to he glued his code. Layer, film, region, wave, for example, exhibiting an the parts which when wall of the rectangular "on", "directly on the" the other portion as well as when another its intermediate includes even in the case of a section where a. Opposite some the parts which when wall of the rectangular "directly on the" the intermediate further meant the people, Letters and the thing which.. In the present invention used a term "pixel" one of pixel electrodes (191) the first switching units.. Furthermore, a term "polarity" used in the present invention a predetermined voltage to a reference high and low as indicating that, data voltage to a reference common as one example applied through high positive when the driving voltage (+), when the driving voltage (-) reliable.. Furthermore, a term used in the present invention in "column direction" means direction that is oriented below, a picture corresponding a left "function and a viewing angle compensation function" in. a direction towards the mandrel. First, also 1 reference to one embodiment of the present invention: an signal wiring and. described for aligning pixel. Figure 1 shows a one embodiment of the present invention also: an signal wiring and for aligning pixel as concept of, RGBW of pixel structures are 2 of liquid crystal display device to illustrate the. plane from the. Also with a 1, one embodiment of the present invention: an LCD device (PX) of pixels the row and column format in the can be arranged. Heat plurality of pixels arranged in the direction (G) plurality of gate lines and a plurality of gate line (G) and may be insulated and intersect row arranged in the direction (D) plurality of data lines is connected. One embodiment of the present invention: an LCD pixels when even pixels are saturated in all directions the right, or the left a device electrodes of time data is measures that reduce or vice versa, same shielding ability and contains a dot inversion 2. The, liquid crystal display device (D) data line to which cross one another (G) and gate lines of a 4 are distinguished by one of pixels are 2 X 2 matrix (matrix) in correspondence to the unit pixels is disposed at may comprise an. I.e., having a plurality of unit pixels a pixel number 1 a column 1 row 1 (PX (1)), a column 2 row 1 pixel number 2 (PX (2)), a column 1 row 2 pixel number 3 (PX (3)), a column 2 row 2 and number 4 pixel (PX (4)) may comprise an. As example, the row 1 right direction to red color display pixels, green color display pixel, blue color display pixel, pixel color display white scan may be repeated several times, which in turn may be formed, the row 2 pixel color display blue confirmed, white color display pixel, red color display pixel, green color display pixel scan may be repeated several times, which in turn can be formed. Number 1 unit pixel number 1 pixel (PX (1)) are pixels color display of red, pixel number 2 (PX (2)) are pixels color display of the green, pixel number 3 (PX (3)) converts the blue of color display are pixels, pixel number 4 (PX (4)) the white color display consisting of a plurality of pixels can be, neighboring direction and the row unit pixel number 1 number 2 unit pixel number 1 pixel (PX (1)) at a wavelength of blue-of color display are pixels, pixel number 2 (PX (2)) the white color display are pixels, pixel number 3 (PX (3)) are pixels color display of the red, pixel number 4 (PX 8880 000031888 (4)) of the green can be consisting of a plurality of pixels color display. The, diagonal arranged in the direction (PX (1)) and a pixel number 1 number 4 pixel (PX (4)) of the data voltage applied to data voltage, with a polar are identical to each other and, arranged in the direction the dehydration inverse pixel number 2 (PX (2)) and a pixel number 3 (PX (3)) of the data voltage applied to, with a polar data voltage can be similar to that of the. Furthermore, pixel number 1 (PX (1)) of the data voltage applied to the pixel number 1, with a polar data voltage (PX (1)) and the column direction or neighboring number 2 pixel (PX (2)) and number 3 pixel (PX (3)) of the data voltage applied to is opposite, with a polar data voltage. For example, pixel number 1 (PX (1)) and a number 4 pixel (PX (4)) exhibit the positive polarity (+), (PX (2)) pixel number 2 and number 3 pixel (PX (3)) the scale as a negative polarity voltage may indicate (-). Although not shown further, as other in the embodiment of the present invention, in correspondence to the unit pixels in a row direction exhibit the same polarity, the plurality of transmission areas corresponding to the light focusing different unit pixel can exhibit polarity. For example, included in the unit pixel number 1 pixel (PX (1)) number 1, number 2 pixel (PX (2)), (PX (3)) pixel number 3, and number 4 pixel (PX (4)) exhibit (+) the second DAC converts high-both, are placed adjacent direction and the row unit pixel number 1 a number 2 unit pixel pixel (PX (1)) number 1, number 2 pixel (PX (2)), (PX (3)) pixel number 3, and number 4 pixel (PX (4)) both may indicate scale as a negative polarity voltage (+). Furthermore, unit pixel number 1 a are placed adjacent column direction and number 2 unit pixel pixel (PX (1)) number 1, number 2 pixel (PX (2)), (PX (3)) pixel number 3, and number 4 pixel (PX (4)) may indicate (+) the second DAC converts high-both. Such transmission areas corresponding to the light focusing or from a photoelectric transducer unit pixel can be formed scan may be repeated several times. A number of pixel neighboring column direction between i.e., pixel number 1 (PX (1)) and a pixel number 3 (PX (3)) between pixel number 2 and number 4 (PX (2)) and a pixel (PX (4)) between the gate line number 1 number 2 gate line (G1) and (G2) is disposed side-by-side is. Number 1 gate line (G1) heat a first direction, transmission areas corresponding to the light focusing 2n-1 second source and drain is connected to the (n is a natural number) can be connected, of a thermal gate line number 2 (G2) a first direction, transmission areas corresponding to the light focusing 2n (n is a natural number) may be connected to second source and drain is connected to the. For example, number 1 gate line (G1) pixel number 1 and which are adjacent in a row direction (PX (1)) and number 3 pixel (PX (3)) and capable of being connected to a, pixel number 1 (PX (1)) and a first secondary winding connection with pixel number 3 (PX (3)) different. can be done in a row. The, number 1 neighboring to one another in a column direction (G1) between the pixel areas along a first gate line is connected to one another at out. I.e., number 1 gate line (G1) different neighboring column direction in a row number 1 pixel (PX (1)) and number 3 pixel (PX (3)) is connected to (PX (1)) by pixel number 1 and number 3 pixel (PX (3)) or off simultaneously. Number 2 gate line pixel number 2 and which are adjacent in a row direction (G2) (PX (2)) and number 4 pixel (PX (4)) and capable of being connected to a, pixel number 2 number 4 (PX (2)) and a first secondary winding connection with pixel (PX (4)) different. can be done in a row. The, number 2 neighboring to one another in a column direction (G2) between the pixel areas along a first gate line is connected to one another at out. Number 2 (G2) also different gate line neighboring column direction in a row number 2 pixel (PX (2)) and number 4 pixel (PX (4)) is connected to (PX (2)) by pixel number 2 and number 4 pixel (PX (4)) or off simultaneously. Data line (D) the transmission areas corresponding to the light focusing are arranged next to a plurality of pixel between the positive polarity (+) and negative polarity (-) can be arranged to is alternate. Also to 2 is hereinafter by referring to 5, one embodiment of the present invention: an LCD respect to the description the device. Also Figure 2 shows a one embodiment of the present invention: an LCD of the device and also for a ling time. regard to either one of a brightness, one Figure 3 of the present invention: an LCD unit pixel of embodiment for device plane view and, Figure 4 shows a IV-IV cross-sectional drawing and light with improved brightness to and to short a structure of the, cross-sectional area along a Figure 5 of Figure 3 V-V is of Figure 3. Also first refers to surface 2, one embodiment of the present invention: an LCD device is the (PX) the pixel including sub-pixel number 1 and number 2 (PXa) includes a sub-pixel (PXb). Number 1 sub-pixel (PXa) at least gate line and at least a data line (Dj) (Gi) is connected to the number 1 and number 1 (Qa) switching element (Qa) switching element a is connected includes lines, a liquid crystal capacitor (Clca) number 1, number 2 sub-pixel (PXb) at least gate line and at least a data line (Dj) (Gi) number 2 is connected to the switching element (Qb), partial pressure switching element (dividing switching element) (Qr), and which are in communication with the number 2 (Clcb) includes lines, a liquid crystal capacitor. Number 1 (Qa) of the thin film switching element such as a transistor gate line (Gi) connected to three-stage electron device as a control terminal, is connected to data line (Dj) input terminal that is, number 1 and is connected to lines, a liquid crystal capacitor (Clca) includes an output terminal. According to driving method of the present invention, switching element number 1 (Gi) the delivery the (Qa) has a gate line is controlled according to the gate signal lines (Dj) the delivery a data voltage (Clca) number 1. capable of transferring a lines, a liquid crystal capacitor. Number 2 switching element (Qb) of the thin film such as a transistor gate line (Gi) connected to three-stage electron device as a control terminal, is connected to data line input terminal that is (Dj), and number 2 (Qr) (Clcb) and partial pressure lines, a liquid crystal capacitor connected to the input terminals of switching element for male and female and an output terminal. According to driving method of the present invention, number 2 switching element (Qb) has a gate line (Gi) the delivery the is controlled according to the gate signal lines (Dj) the delivery a data voltage lines, a liquid crystal capacitor (Clcb) capable of transferring a number 2.. Partial pressure of the thin film (Qr) switching element such as a transistor gate line (Gi) connected to three-stage electron device as a control terminal, number 2 switching element (Qb) are connected to the output terminals of the input terminal that is, reference omitted is connected to (Vst) includes an output terminal. Partial pressure switching element (Qr) has a gate line (Gi) the delivery the is controlled in such a manner that according to the gate signal, partial pressure switching element (Qr) and number 2 switching element (Qb) is connected a the delivery (Dj) data line data voltage (Qr) switching element partial pressure and number 2 switching element (Qb) is partial pressure by number 2. can be transmitted to (Clcb) lines, a liquid crystal capacitor. Number 1 sub-pixel (PXa) and one (PXb) sub-pixel number 2 input video signal (IDAT) to different gamma curves according to may Image is displayed in an according to gamma curves identical to display an Image is possible,. Acids to epoxygenated fatty acids therein gamma curve wherein input video signal divided into red (IDAT) for luminance or transmittance. a curve. According to one embodiment of the present invention, processing based on the determined gamma properties is followed by sub-pixel number 2 (PXb) (Qr) switching element partial pressure curve number 2 and a resistance ratio of switching element (Qb), a record head capable of going reference voltage is adjusted by. Number 2 and lines, a liquid crystal capacitor (Qr) switching element voltage obtained by dividing the charging voltage of (Clcb), reference voltage control such as two by adjusted by the sub-pixel (PXa, Pxb) which can be suitably made into a changed luminance, (Clca) lines, a liquid crystal capacitor (Clca) voltage filled with number 1 and number 2 (Clcb) lines, a liquid crystal capacitor can easily and effectively affect a human a voltage of filled in side of an Image looked maximally an Image to look at the front can be member, includes at least two first electrodes and the can be improved. Also refers to surface 5 also to 3, one embodiment of the present invention: an LCD device a unit pixel of pixel number 1 (PX (1)), (PX (2)) pixel number 2, number 3 pixel (PX (3)), number 4 pixel (PX (4)) may comprise an. Composed array panel (100) relates to. Transparent glass or plastics or the like made insulating substrate number 1 (110) on gate conductor is formed. Gate conductor laterally a pixel region is a long gate line (121), gate line positioned transversely on top of each other, a number 1 sustain electrode line (131a, 131b), pixel region positioned transversely on top of each other, a number 2 sustain electrode line (136a, 136b) includes. The gate line (121) a disposed side-by-side in between the pixel areas along a first gate line number 1 (121a) and gate line number 2 (121b) includes. Number 1 gate line (121a) pixel region the number 1 and number 2 pixel region (PX (1)) (PX (2)) laterally extending in the direction a lateral line pixel region number 3 and number 4 pixel region (PX (3)) (PX (4)) laterally lateral line is connected to one another at outer pixel region. Number 2 gate line (121b) also number 1 pixel region number 2 pixel region (PX (1)) and (PX (2)) laterally extending in the direction a lateral line pixel region number 3 and number 4 pixel region (PX (3)) (PX (4)) laterally lateral line is connected to one another at outer pixel region. The, gate line number 1 (121a) different pixel region number 1 in a row (PX (1)) the pixels locating electrode and number 3 pixel region (PX (3)) the pixels locating is respectively connected to electrode. Number 2 gate line (121b) also different pixel region number 2 in a row (PX (2)) the pixels locating electrode and number 4 pixel region (PX (4)) the pixels locating is respectively connected to electrode. Gate line (121) and maintaining electrode line (131a, 131b) on the gate insulation layer (140) is located a. Gate insulating layer (140) number 1 on the semiconductor (154a), number 2 semiconductor (154b) and number 3 semiconductor (154c). is located. Number 1 semiconductor (154a), number 2 semiconductor (154b) and number 3 semiconductor (154c) the number 1 gate line (121a) or number 2 gate line (121b) are intersected with the data lines to gate insulating layer (140). is positioned over. For example, pixel region neighboring column direction (PX (1)) number 1 and number 3 pixel region (PX (3)) a number 1 semiconductor (154a), number 2 semiconductor (154b) and number 3 semiconductor (154c) the number 1 gate line (121a) located are intersected with the data lines to, number 2 pixel region neighboring column direction (PX (2)) and number 4 pixel region (PX (4)) a number 1 semiconductor (154a), number 2 semiconductor (154b) 888000 0302888 and number 3 semiconductor (154c) the number 2 gate line (121b) are intersected with the data lines to. may be positioned. Semiconductor (154a, 154b, 154c) on the plurality of resistive contact member (163a, 165a, 163b, 165b, 163c, 165c). is located. Just, semiconductor (154a, 154b, 154c) when the oxide semiconductor is, plurality of resistive contact member (163a, 165a, 163b, 165b, 163c, 165c) the drive, can be dispensed with.. Plurality of resistive contact member (163a, 165a, 163b, 165b, 163c, 165c) and gate insulating layer (140) on the source electrode number 1 (173a) and number 2 source electrode (173b) for including plurality of data lines (171), drain electrode number 1 (175a), drain electrode number 2 (175b), number 3 source electrode (173c) and number 3 drain electrode (175c) for including data conductor is the stomach. The data conductor and below it which are located at contacting member resistance semiconductor and simultaneously single mask, with the can be formed. Number 1 source electrode (173a) and drain electrode number 1 (175a) the number 1 semiconductor (154a) at the number 1 (or number 1 thin film transistor) switching element (thin film transistor, TFT) and changes resistance value by (Qa), the second transistor (channel) the source electrode number 1 (173a) and drain electrode number 1 (175a) between (154a) is formed on. Similarly, gate electrode number 2 (124b), source electrode number 2 (173b) and drain electrode number 2 (175b) the number 2 semiconductor (154b) at the number 2 switching element (Qb) and changes resistance value by (or number 2 thin film transistor), channel source electrode number 2 (173b) and drain electrode number 2 (175b) between (154b) is formed, number 3 gate electrode (124c), number 3 source electrode (173c) 888000039 4888 (175c) drain electrode number 3 and the number 3 semiconductor (154c) at the number 3 switching element (or partial pressure switching element, number 3 thin film transistor) and changes resistance value by (Qc), number 3 channel source electrode (173c) number 3 and drain electrode (175c) between (154c) is formed on. The drain electrode number 2 (175b) the number 3 source electrode (173c) is connected. Data conductor (171,173c, 175a, 175b, 175c) and an exposed semiconductor (154a, 154b, 154c) over a portion the number 1 protective film (180p) a is located. Number 1 protective film (180p) silicon nitride-oxide or silicon oxide for forming an inorganic insulating layer may include. Number 1 protective film (180p) the color filter (230) of a pigment is the exposed semiconductor (154a, 154b, 154c) to prevent the flow of oil to portion can be. Number 1 protective film (180p) on the color filter (230) is located a. Color filter (230) each other the two adjacent of data lines (171) constitution: longitudinally extending along the. Colour filter therefor according to one embodiment of the present invention (230) is made out of a low dielectric constant material may be, also the color filter as shown in 5 (230) thereof at a specified interval in the spaced-apart reference omitted by (133a) and the pixel electrode (191a) coupling between the inside of the container to be. Color filter (230) on the protective film number 2 (180r) can be is located. Number 1 protective film (180p) and number 2 protective film (180r) the drain electrode number 1 (175a) and drain electrode number 2 (175b) contact hole (contact hole) (185a) mores number 1 and number 2 contact hole (185b) is formed. Number 1 contact hole (185a) the gate line number 1 (185a) and refers to number 1 sub-pixel electrode (191a) which is located between, number 2 contact hole (185b) the gate line number 2 (185b) and refers to number 2 sub-pixel electrode (191b) .may be positioned between the. Number 2 protective film (180r) (pixel electrode) (191) a plurality of pixel electrodes on the a is located. Of the pixel electrode (191) substrate is formed with (121) and separate from each other with respect to two non, gate line (121) neighboring in the column direction about number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) includes. Pixel electrode (191) the ITO IZO and thickness can be material. Pixel electrode (191) the aluminum in addition, the, chromium or an alloy thereof, and the reflective metallic material such as may be. Number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) shape is given overall square transverse stem and perpendicular to a longitudinal stem part transmits the next command fine extending therefrom and stem cross having part. Pixel electrode (191) in the shape of the described more hereinafter. Reference omitted longitudinal part (133a, 133b) each number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) longitudinal stem end. the mask is properly positioned. The, longitudinal part (133a, 133b) width of a sub-pixel electrode of stem according to the size of a pellicle may be discharge pulses is narrower than the. Number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) the number 1 contact hole (185a) and number 2 contact hole (185b) through each drain electrode number 1 (175a) and drain electrode number 2 (175b) and physical, electric are electronically coupled to each, drain electrode number 1 (175a) and drain electrode number 2 (175b) inversely proportional to the level change of voltage data from. The, drain electrode number 2 (175b) number 3 and certain of the data voltage applied to source electrode (173c) is partial pressure through, number 1 sub-pixel electrode (191a) the size of the voltage applied to number 2 sub-pixel electrode (191b) supplies the. is greater than. Number 1 sub-pixel electrode applied data voltage (191a) and number 2 sub-pixel electrode (191b) the upper array panel (200) common electrode of (270) is adapted to generate an electric field with two electrodes by (191,270) between a liquid crystal layer (3) of. for determining the orientation of a liquid crystal molecules. Film for liquid crystal is the thus determined insert liquid crystal layer (3) of the light passing through the brightness than θ1.. Now upper array panel (200) relates to. Transparent glass or plastics or the like made insulating substrate number 2 (210) the light shielding member (light blocking member) (220) is formed. Shielding member (220) has a black matrix (black matrix) the irradiated light housing surrounds referred.. The present specification the light shielding member (220) the upper array panel (200) thereby, the cold air flows but the embodiment shown, is at the lower array panel (100) are located at a. member is inserted and fixed. Shielding member (220) the lower array panel (100) of (Qa) switching element number 1, number 2 switching element (Qb) and partial pressure switching element (Qr), and number 1 to number 3 contact hole (185a, 185b, 185c) is an area positioned is diffusion barrier layer formed to cover both, gate line (121) extending in the same direction in relation to, data line (171) is superposed on a part of the are positioned so as to. Shielding member (220) one of pixel areas both sides of the two of data lines (171) and at least an opaque material located, data line (171) and gate lines of a (121) can be generated in proximity to an adheres the LCD panel to and, plurality of switching device (Qa, Qb, Qc) is located in a region in which adheres the LCD panel to the. Shielding member (220) on the capping film (overcoat) (250) is located a. Capping film (250) the (organic) can be made to the, provides the front surface of the display. Capping film (250) can be located. Capping film commonly on the electrode (270) is located a. Common electrode (270) on the upper alignment film (not shown) can be placed is, upper reflective vertical orientation alignment layers. Liquid crystal layer (3) are biased with a negative dielectric constant anisotropy and, liquid crystal layer (3) of a liquid crystal molecule without any electric field and the major the two array panel (100,200) with respect to the surface of the both constitution: is then oriented such that the. Furthermore, also consults a 6, one embodiment of the present invention: an LCD relates to electrode basic device. One embodiment of the present invention: an LCD also Figure 6 shows a device of the electric field generating electrode of the is plane shown in the basic region. Also 8 consults a surface, basic electrode (191) shape is given overall square transverse stem part (193) and perpendicular to a longitudinal stem part (192) consisting the common divisor of the stem part. In addition basic electrode (191) are defined between transversely adjacent projections stem part (193) and a longitudinal stem part (192) by (Da) region number 1, number 2 (Db) region, (Dc) region number 3, and number 4 wherein each of said wires or ribbons (Dd) region (Da-Dd) region is divided into a plurality of number 1 to number 4 fine tine (194a, 194b, 194c, 194d) includes. Number 1 fine tine (194a) a transverse stem part (193) or a vertical position stem part (192), and are tied to an upwardly left from extends obliquely in, number 2 fine tine (194b) a transverse stem part (193) or a vertical position stem part (192) has a central rotary axis extending obliquely in, and are tied to an upwardly right from.. In addition number 3 fine tine (194c) a transverse stem part (193) or a vertical position stem part (192) extends downward left from, number 4 fine tine (194d) a transverse stem part (193) or a vertical position stem part (192) has a central rotary axis extending obliquely downward right from.. Number 1 to number 4 fine tine (194a, 194b, 194c, 194d) has a gate line (121a) or transverse stem part (193) and approximately 45 or 135 degrees. angularly. In addition from each other region (Da, Db, Dc, Dd) of tine (194a, 194b, 194c, 194d) can be predetermined space between each other. Liquid crystal layer (3) applying an electrical field on the lower surface, number 1 to number 4 fine tine (194a, 194b, 194c, 194d) to form a fringe field side. The, liquid crystal molecules (31) a fine tine (194a, 194b, 194c, 194d) are tilted in one direction parallel with the longitudinal direction of.. Basic electrode (191) are composed of microstructures tine (194a, 194b, 194c, 194d) longitudinal direction of a fourth loops, different drives liquid crystal molecules includes (Da-Dd) region (31) is inclined approximately the directions you direction the liquid crystal molecules (31) domain a fourth loops, other their orientation directions of the liquid crystal layer (3) is formed on. And and moves whose liquid crystal molecules are communication line is varying the reference device 2000 wide viewing angle. In hereinafter, reference to 7 also, other embodiment of the present invention: an LCD. also disclosed to device. Also other embodiment of the present invention Figure 7 shows a device: an LCD plane view as for unit pixel of, thin film transistor (thin film transistor, TFT) has been altered (Qa) position of the aforementioned except for the host supplying. equal to 3 according to liquid crystal display device. Thus a structure similar to that of the drawing the same to the n bit parallel data inputted imparting code, the repeating to a structure similar to that of the dispensed to the described. Also with a 7, one embodiment of the present invention: an LCD device a unit pixel of pixel number 1 (PX (1)), (PX (2)) pixel number 2, number 3 pixel (PX (3)), number 4 pixel (PX (4)) may comprise an. Gate line (121) a disposed side-by-side in between the pixel areas along a first gate line number 1 (121a) and gate line number 2 (121b) includes. Each pixel areas (Qa) thin film transistor number 1, number 2 thin film transistor (Qb), and number 3 may comprise an (Qc) thin film transistor. Number 1 the number 1 (Qa) thin film transistor gate electrode (124a), number 1 semiconductor (154a), source electrode number 1 (173a), and drain electrode number 1 (175a) may comprise, the number 2 number 2 (Qb) thin film transistor gate electrode (124b), number 1 semiconductor (154b), source electrode number 1 (173b), and drain electrode number 1 (175b) may comprise, the number 8 880001806888 number 3 (Qc) thin film transistor gate electrode (124c), number 1 semiconductor (154c), source electrode number 1 (173c), and drain electrode number 1 (175c) may comprise an. The, (Qa) thin film transistor number 1, number 2 thin film transistor (Qb), the number 1 and number 3 (Qc) thin film transistor gate line (121a) and gate line number 2 (121b) between the island form being located. Furthermore, number 1 contact hole (185a) and number 2 contact hole (185b) also number 1 gate line (121a) and gate line number 2 (121b) between the island form being located. The, number 1 (Qa) thin film transistor, thin film transistor (Qb) number 2, number 1 number 3 thin film transistor (Qc) and a contact hole (185a) and number 2 contact hole (185b) is extracted from a liquid metal, arranged serially in the may be proposed. The, 3 also shown in one embodiment of the present invention compared with a device: an LCD, gate line (121) and the drain electrode (175) and is the second insulating layer between, . formed. More particularly, also with a 3, one embodiment of the present invention: an LCD a device number 1 (Qa) thin film transistor, thin film transistor (Qb) number 2, number 3 and number 1 is (Qc) thin film transistor gate line (121a) and gate line number 2 (121b) overlapping is the, number 1 contact hole (185a) and number 2 contact hole (185b) each gate line number 1 (121a) and gate line number 2 (121b) being located at the outside. Number 1 (Qa) thin film transistor, thin film transistor (Qb) number 2, number 3 and number 1 and a thin film transistor (Qc) contact hole (185a) and number 2 contact hole (185b) is vertical or diagonal direction is disposed in the direction in. Furthermore, gate line number 1 (121a) and drain electrode number 1 (175a) extended between and, gate line number 2 (121b) and drain electrode number 2 (175b) cross each other is the gate line (121) and the drain electrode (175) is which has the same number as the second insulating layer between. With a 7 also again, other embodiment of the present invention: an LCD a device number 1 (Qa) thin film transistor, thin film transistor (Qb) number 2, number 1 number 3 thin film transistor (Qc) and a contact hole (185a) and number 2 contact hole (185b) by, arranged serially in is extracted from a liquid metal, shielding member (220) of the first ng width of 0.4 to 0.6.. Furthermore, gate line number 1 (121a) and drain electrode number 1 (175a) and does not intersect a each other, gate line number 2 (121b) and drain electrode number 2 (175b) each other does not intersect a a gate line (121) and the drain electrode (175) can be insulating parasitic between. In hereinafter, also consults a 11 to 8 of the present invention compared the described: an LCD device. Figure 8 shows a signal wiring and also of the present invention: an compared and concept of for aligning pixel, the number 9:an LCD device of the present invention compared to as unit pixel of plane view, a unit pixel region of Figure 8 P and plane view, Figure 10 of the present invention: an LCD compared indicative of unevenness INT1-INT5 device drawing and, Figure 11 of the present invention: an LCD compared kickback voltage device account for deviation of. plane from the. First, also 8 with a, device of the present invention: an LCD compared (PX) of pixels the row and column format in the can be arranged. A device: an LCD of the present invention compared the right, or the left in all directions adjacent pixel time data electrodes of vice versa can be driven, one of pixels are 2 X 2 matrix (matrix) 4 is disposed at in correspondence to the unit pixels may comprise an. The, heat a plurality of pixel arranged in the direction between gate line on each of the capacitor is arranged to face (G), row arranged in the direction between a plurality of pixel (D) on each of data lines is so positioned as to. Gate line (G) rows is arranged or even odd-numbered electrode layers and a direction, the second thin film transistors column direction and concurrently associates with, heat (D) data line arranged in the direction in the form on the semiconductor substrate having source and drain is connected to the may be connected to. I.e., data line (D) row has a plurality of pixel arranged in the direction positive polarity between (+) and negative polarity (-) can be arranged to is alternate Furthermore, also refers to surface 9, compared: an LCD device of the present invention a unit pixel of pixel number 1 (PX (1)), (PX (2)) pixel number 2, number 3 pixel (PX (3)), number 4 pixel (PX (4)) may comprise an. Number 1 pixel (PX (1)) and a pixel number 3 (PX (3)) between pixel number 2 and number 4 (PX (2)) and a pixel (PX (4)) between the one gate line (121) sense.. The, pixel number 1 (PX (1)) and a pixel number 3 (PX (3)) is disposed between gate lines (121) (PX (1)) the pixel number 1 and number 3 pixel (PX (3)) is connected, and simultaneously with the, pixel number 2 (PX (2)) and a number 4 pixel (PX (4)) is disposed between gate lines (121) (PX (2)) the pixel number 2 and number 4 pixel (PX 88800009138 88 (4)) is connected do not go. I.e., pixel number 1 (PX (1)) and a pixel number 3 (PX (3)) between the pixel number 1 (PX (1)) and a pixel number 3 (PX (3)) is linked with the thin film transistor is arranged, (PX (2)) and a pixel number 2 number 4 pixel (PX (4)) between the pixel number 2 (PX (2)) and a number 4 pixel (PX (4)) thin film transistor is connected is disposed do not go. The, pixel number 1 (PX (1)) and a pixel number 3 (PX (3)) is formed between the width of the light shielding member is (A) (PX (2)) and a pixel number 2 number 4 pixel (PX (4)) is formed between the width of the light shielding member formed larger than the (B). Also 10 with a, number 1 pixel (PX (1)) and a pixel number 3 (PX (3)) is formed between the pixel number 2 (A) and width of the light shielding member (PX (2)) and a number 4 pixel (PX (4)) is formed between the width of the light shielding member is (B) by different configurations, a dark bright line array block, and by dividing 6 is signal controller generates and viewable, .the problem. Also again refers to surface 9, of the present invention: an LCD compared device a plurality of pixels of a number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) may comprise an. Neighboring transmission areas corresponding to the light focusing (PX (1)) and a pixel number 1 number 2 pixel (PX (2)) each number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) the top and bottom oppositely formed is, neighboring transmission areas corresponding to the light focusing pixel number 3 (PX (3)) and a number 4 pixel (PX (4)) each number 1 sub-pixel electrode (191a) and number 2 sub-pixel electrode (191b) the top and bottom oppositely formed is of a surface acoustic insulating substrate number 2 dielectric substrate and the number 1 the line city which will freeze switching element of terminals are the parasitic capacitance, in particular gate line (121) and the pixel electrode (191) 88800 00982888 between in the ISDN switching (Vkb) generated by a kickback voltage occurs a local. Also 11 with a, device of the present invention: an LCD compared of number 2 dielectric substrate and the number 1 the lower interval RPR insulating board is provided with a a local height (Vkb) quick back voltage it is foreseen to. Liquid crystal display device according to an embodiment of the present invention a disposed side-by-side in a pixel region number 1 gate line (121a) and gate line number 2 (121b) includes, number 1 gate line (G1) and (G2) each gate line number 2 column direction different from the pixels adjacent to each other and simultaneously connects in a row, number 1 gate line (121a) neighboring direction rows is coupled to a mechanical one pixel, gate line number 2 (121b) neighboring the transmission areas corresponding to the light focusing so as to thereby pixels the other, in a row direction an inter-pixel width of shading members free from uneven inversed the formation of the, switching element of terminals are generated by the parasitic capacitance in a kickback voltage capable of improving quality.. The present invention taught or more prescribed in the embodiment and appends a drawing which not limited to, beyond technical idea of the present invention within such a range that causes no replaced by variously, deformation and able to change it's a, in the present invention is in the field of the will apparent to person with skill in the art. 100,200: array panel 3: liquid crystal layer 121: gate line 124: gate electrode 131,136: sustain electrode line 133: reference omitted 140: gate insulating layer 154: semiconductor 163,165: resistive contact member 171:173 data line: source electrode 175: drain electrode 180p, 180r: protective film 185: contact hole 191: pixel electrode 220: shielding member 230: color filter 250: capping film 270: common electrode Number 1 pixel: PX (1) number 2 pixel: PX (2) Number 3 pixel: PX (3) number 4 pixel: PX (4) A liquid crystal display according to the present invention comprises: a plurality of gate lines; a plurality of data lines crossing the gate lines while being insulated from the gate lines; and a plurality of unit pixels connected to the gate lines and the data lines. The unit pixels include a first pixel positioned in row 1 and column 1, a second pixel positioned in row 1 and column 2, a third pixel positioned in row 2 and column 1, and a fourth pixel positioned in row 2 and column 2. A first gate line and a second gate line are disposed in parallel between the first pixel and the third pixel and between the second pixel and the fourth pixel. The first gate line is connected to the first pixel and the third pixel in different neighboring rows, and the second gate line is connected to the second pixel and the fourth pixel in different neighboring rows. Therefore, the liquid crystal display of the present invention can improve image quality by reducing a variation in kickback voltage. COPYRIGHT KIPO 2016 Plurality of gate lines cross said plurality of gate lines and data lines may be insulated and; and said said plurality of gate lines, the data line, and the plurality of data lines includes a plurality of unit pixels, having a plurality of unit pixels a pixel number 1 a column 1 row 1, pixel number 2 a column 2 row 1, pixel number 3 a column 1 row 2, column 2 row 2 and a and including the pixel of number 4, said number 2 and said number 3 source and drain is connected to the number 1 between pixels between the pixel said number 4 source and drain is connected to the gate lines number 1 number 2 is disposed side-by-side gate line, a black matrix gate line said number 1 different pixel said number 3 pixel and said number 1 each in a row is coupled to a mechanical, said number 2 gate line each in a row different a black matrix pixel said number 4 pixel and said number 2 is connected to liquid crystal display device. According to Claim 1, neighboring to one another in a column direction outside the gate electrode gate said number 1 which are interconnected, said number 2 neighboring to one another in a column direction are connected to one another at out the gate electrode gate each other, the liquid crystal display device. According to Claim 1, said transmission areas corresponding to the light focusing the plurality of data lines is arranged next to a plurality of pixel is disposed between and, row a plurality of pixel arranged in the direction positive (+) and negative polarity (-) an alternate liquid crystal display device. According to Claim 3, said (-) (+) the second DAC converts high-scale as a negative polarity voltage and the plurality of data lines of the data voltage applied to data voltage, with a polar opposite liquid crystal display device. According to Claim 3, heat said plurality of data lines arranged in the direction a plurality of pixel and is connected alternately zigzag-type multi nozzle liquid crystal display device. According to Claim 1, said row direction and direction that is oriented below in the stomach, in a picture corresponding a left filter function and a viewing angle compensation said which means that, in a direction towards the container as a liquid crystal display device. According to Claim 1, said intersecting one another with the source electrodes on the basis said gate lines are distinguished by data line said liquid crystal display device. According to Claim 7, said number 1 are pixels color display red pixel, green pixel said number 2 are pixels color display of, said number 3 are pixels color display blue pixel, pixel said number 4 are pixels color display white, liquid crystal display device. According to Claim 1, said plurality of pixel number 1 number 2 and sub-pixel electrode including sub pixel electrodes liquid crystal display device. According to Claim 9, said number 2 gate line gate lines said number 1 said number 1 between sub-pixel electrode said number 2 and sub-pixel electrode is disposed by the side of each other, the liquid crystal display device. According to Claim 12, said number 1 number 1 which are in communication with the sub-pixel electrode thin film transistor; said number 2 number 2 which are in communication with the sub-pixel electrode thin film transistor; and said number 2 thin film transistor and reference omitted number 3 which are in communication with the liquid crystal display device including thin film transistor. According to Claim 11, said number 1 to number 3 a thin film transistor gate electrode, semiconductor layer, source electrode, and the drain electrode and, said number 1 and number 2 said drain electrode through a hole the contact sub-pixel electrode which is connected with a Counselor telephone liquid crystal display device. According to Claim 12, said number 1 thin film transistor, said number 2 thin film transistor, and said said number 3 a thin film transistor or gate said number 1 is located at a height above a gate line said number 2 liquid crystal display device According to Claim 13, said number 1 and number 2 contact with said said number 1 and number 2 gate lines is disposed between sub-pixel electrode liquid crystal display device. According to Claim 14, said number 1 thin film transistor, said number 2 thin film transistor, said said number 3 thin film transistor, and said number 1 contact with said gate lines is disposed between gate line said number 2 liquid crystal display device. According to Claim 15, said number 1 thin film transistor, said number 2 thin film transistor, said said number 3 thin film transistor, and said, arranged serially in horizontal direction contact with each other, the liquid crystal display device.
